 Today SanDisk asserts that the company expects to continue to use conventional NAND structures into a second node in the 10–19 nm range.This implies that standard device structures could stay in place until the industry reaches 10 nm, however the challenges of producing a reliable floating gate become more severe with each process shrink.On the other hand, the International Technology Roadmap for Semiconductors (ITRS) process technology roadmap's 2010 Process Integration, Devices, and Structures (PIDS) tables show adoption of charge trapping starting at 22 nm in 2012, and becoming mainstream in 2014 with the 20 nm process.