 Very similar to the current 6T-SRAM, or SRAM memories with 6 cell transistors, is substantially different because the SRAM latch CMOS, consisting of 4 of the 6 transistors of each cell, is replaced by a bipolar latch PNP -NPN of a single Thyristor.The result is to significantly reduce the area occupied by each cell, thus obtaining a highly scalable memory that has already reached storage density several times higher than the current SRAM.The Thyristor-RAM provides the best density / performance ratio available between the various integrated memories, matching the performance of an SRAM memory, but allowing 2-3 times greater storage density and lower power consumption.