 They demonstrated that short-channel effects can be significantly reduced by sandwiching a fully depleted silicon-on-insulator (SOI) device between two gate electrodes connected together.The ETL demonstration inspired Grenoble INP researchers including Francis Balestra, Sorin Cristoloveanu, M. Benachir and Tarek Elewa to fabricate a double-gate MOSFET using silicon thin film in 1987.The double-gate control of SOI transistors was used to force the whole silicon film (interface layers and volume) in strong inversion (called “Volume-Inversion MOSFET”) or strong accumulation (called “Volume-Accumulation MOSFET”).