 NAND relies on ECC to compensate for bits that may spontaneously fail during normal device operation.A typical ECC will correct a one-bit error in each 2048 bits (256 bytes) using 22 bits of ECC, or a one-bit error in each 4096 bits (512 bytes) using 24 bits of ECC.If the ECC cannot correct the error during read, it may still detect the error.