 In order for the processor to correctly respond to an abort, system logic must assert (negate) the input as soon as a valid address has been placed on the bus and it has been determined that the address constitutes a page fault, memory access violation or other anomaly (e.g., attempted execution of a privileged instruction).Hence the logic must not assert until the processor has asserted the or signals.Also, must remain asserted until the fall of the phase-two clock and then be immediately released.