title: Andrew Flintoff

text: On 15 July 2009, Flintoff announced he would retire from Test cricket at the end of the 2009 Ashes Series. He said that "Since 2005 I have just been plagued with injury so I've got the opportunity now to finish on a high by helping England to win the Ashes and it will give me great pleasure if I can play my last Test at the Oval and we can win the Ashes – it doesn't get any bigger than that." He was man of the match in England's victory at Lords in the Second Test Match, taking 5 wickets in the second innings after a fine display of fast bowling and achieving the rare feat of making both Lord's Honours Boards. On 23 August 2009, England defeated Australia at The Oval to seal a 2–1 series win, with Flintoff notably running out the Australian captain Ricky Ponting, ensuring Flintoff ended his England career on a high.


title: Andrew Flintoff

text: On 16 September 2010, Flintoff retired from all forms of professional cricket, having consulted medical advisers. He continued to play recreationally for Penwortham Cricket Club alongside his brother Chris Flintoff.


title: Andrew Flintoff

text: Flintoff came out of retirement in May 2014, returning to Lancashire to play Twenty20 only. He featured in the final of the competition, dismissing Ian Bell with the ball and hitting two sixes in the penultimate over as Lancashire fell just short against Birmingham Bears. After this season he was signed by the Brisbane Heat in the Australian Big Bash League for the 2014–15 season. Flintoff disappointed on the field, ending the season with a high score of 46, with only one other score in double figures (15), along with three wickets at an average of 45.33.


title: Andrew Flintoff

text: He had an on-field microphone for most matches and memorably sang In the Ghetto by Elvis Presley during one game while on air. He also began commentating matches for Network Ten. These experiences endeared him to Australian crowds, a far cry from his England days. After the 2014-15 Big Bash League season, he finally retired from cricket. He returned to Australia for the 2015-16 Big Bash League season as a commentator for Network Ten.


title: Andrew Flintoff

text: His newfound popularity in Australia enabled him to win the first series of the Australian version of "I'm a Celebrity...Get Me Out of Here!".


title: Andrew Flintoff

text: In March 2010, Flintoff became a team captain on the Sky One television sports panel show "A League of Their Own", hosted by James Corden. In December 2010, Flintoff became a guest commentator during a number of matches in the 2011 PDC World Darts Championship event. He returned to commentary during the 2012 World Matchplay, where he called Michael van Gerwen's nine dart finish against Steve Beaton. He also currently hosts a radio show on BBC Radio Five Live on Monday nights.


title: Andrew Flintoff

text: As of 2011 Flintoff was named as a brand ambassador for big men's fashion brand Jacamo and had his own range produced in 2012. In early 2011 he also became the face of Morrisons supermarkets.


title: Andrew Flintoff

text: Flintoff also produced a documentary entitled "Freddie Flintoff: Hidden Side of Sport", about his and other sports stars' suffering of clinical depression. This was first aired on BBC1 on Wednesday, 11 January 2012.


title: Andrew Flintoff

text: In 2014, Flintoff made a cameo appearance in Sky TV series, "Trollied". In the same year, he also appeared as a contestant on "Celebrity Deal or No Deal".


title: Andrew Flintoff

text: On 15 February 2015, Flintoff entered the first Australian series of "I'm a Celebrity...Get Me Out of Here!", held in the Kruger National Park in South Africa. Entering on Day 17 of the series, he was crowned "King of the Jungle" after winning the series on 15 March 2015 after spending 29 days in the jungle. He was also a commentator for Network Ten's Big Bash League coverage and appeared as a regular panellist on their current affairs show "The Project".


title: Andrew Flintoff

text: In 2014, Flintoff started the Sky One TV series "Flintoff: Lord of the Fries", touring around the UK exploring the places, people and food with co-host Rob Penn. The series was aired from 2015, the second series (2016) was titled "Freddie Fries again". In December 2016, Flintoff and Penn took the series to Australia titled "Freddie Fries Down Under" AKA "Freddie Down Under" with challenges along the way.


title: Andrew Flintoff

text: Along with close friend and former Blackburn Rovers captain Robbie Savage and journalist and former table tennis professional Matthew Syed, Flintoff hosts a BBC Radio 5 Live podcast called "Flintoff, Savage & The Ping Pong Guy" in which hot sporting topics are discussed. The podcast won two categories at the 2017 Radio Academy Awards – Best Podcast and Best New Show – and Flintoff himself was awarded the Best New Presenter category.


title: Andrew Flintoff

text: Flintoff is a co-host for "Australian Ninja Warrior", which first aired on the Nine Network in July 2017. Currently on its fourth season, he had to leave after the quarter finals due to the COVID-19 Pandemic.


title: Andrew Flintoff

text: In September 2017, Flintoff was the main presenter for "Cannonball" on ITV with Frankie Bridge, Radzi Chinyanganya, Ryan Hand and Maya Jama as poolside reporters.


title: Andrew Flintoff

text: He appeared in the BBC drama "Love, Lies & Records". In November 2017, Flintoff made his musical theatre debut as Kevin Mergatroyd in Kay Mellor's "Fat Friends The Musical" (based on the ITV series) in Leeds before touring the UK in early 2018. He also hosted "All Star Musicals" for ITV in December 2017.


title: Andrew Flintoff

text: In October 2018, it was announced that Flintoff would be the new host of "Top Gear" alongside Paddy McGuinness and Chris Harris. Filming for the 27th series of the BBC Two show began in early 2019, and first aired in June 2019. On 11 February 2019, it was reported that Flintoff had crashed into a market stall in Mansfield while filming for the show. He remains a host into July 2019.


title: Andrew Flintoff

text: On 10 September 2019 Flintoff crashed while riding a head-first trike at 124 mph during one of the car show's signature competitions. He was not injured and resumed filming afterwards. Flintoff was involved in a second accident when filming on the 13th of December 2022, at the Dunsfold Park Aerodome. Flintoff was airlifted to hospital after the second accident.


title: Andrew Flintoff

text: In 2018, it was reported that he was involved in a development to build a new tower block in Castlefield, along Mancunian Way. The two buildings were dubbed the "Flintoff towers". After the original was rejected for being too tall, in June 2019 Flintoff continued seeking permission for a 23-storey residential tower in Castlefield. A shorter version was approved in July 2019, with the tower designed by SimpsonHaugh. The new development will be 23 storeys, not 35.


title: Andrew Flintoff

text: Flintoff married Rachael Wools in March 2005 at Knightsbridge, London. He has four children. He has the names of his wife and children tattooed on his left shoulder. Flintoff is a supporter of Preston North End. In his 2005 autobiography, "Being Freddie", Flintoff admitted he had little or no interest in football at the time and only visited the Etihad Stadium for the social atmosphere.


title: Andrew Flintoff

text: Flintoff's father, Colin, and his brother, Chris, both played cricket, with Colin still playing for Whittingham Cricket Club near Preston. During his innings of 167 against the West Indies at Edgbaston in July 2004, one six off Jermaine Lawson was hit high into the Ryder Stand and was almost caught by his father, who fumbled the ball and dropped it. Colin Flintoff remarked "If I'd taken it he'd have been the first Test batsman to be caught out by his dad!"


title: Andrew Flintoff

text: In 2011, Flintoff was awarded an Honorary Fellowship of Preston-based Myerscough College. Flintoff's cousins include John-Paul Flintoff, an author, broadcaster and journalist. "Flintoff Way" in Preston is named after John-Paul's grandparents, Tom and Alice.


title: Andrew Flintoff

text: His career has been subject of a number of TV films and documentaries. In "Freddie Flintoff: Hidden Side of Sport" broadcast on the BBC One in 2012, he talks candidly in moving interviews with Steve Harmison, Vinnie Jones and Ricky Hatton and others about the serious effects of depression. He confronts his own issues as captain of England under pressure and under fire at the top of his game. Freddie reveals the stigma attached to talking about depression in the face of an often unforgiving public.


title: Andrew Flintoff

text: In the documentary "Flintoff: From Lord's to the Ring" in 2012 broadcast on Sky 1, the cricket champion is followed in a 3-episode series while pursuing a possible career as a professional boxer under the guidance of trainers Barry McGuigan and his son Shane McGuigan. "Biggie", Sugar Ray Leonard, Mike Tyson make appearances in the documentary where Flintoff is preparing for a boxing match.


title: Andrew Flintoff

text: In 2020, Flintoff presented a documentary that aired on the BBC One called "Freddie Flintoff: Living With Bulimia". In the documentary, Flintoff talks with other men who have suffered with Bulimia and discusses the stigma around men who suffer with eating disorders. Flintoff has suffered with Bulimia for over 20 years, since he was 20 years old. At the end of the documentary, Flintoff said that he would like to seek treatment for his eating disorder, which he has never done previously, despite the long period he had been struggling with it.


title: Coming-of-age story

text: In genre studies, a coming-of-age story is a genre of literature, theatre, film, and video game that focuses on the growth of a protagonist from childhood to adulthood, or "coming of age". Coming-of-age stories tend to emphasize dialogue or internal monologue over action, and are often set in the past. The subjects of coming-of-age stories are typically teenagers. The "Bildungsroman" is a specific subgenre of coming-of-age story.


title: Coming-of-age story

text: The plot points of coming of age stories are usually emotional changes within the character(s) in question.


title: Coming-of-age story

text: In literary criticism, coming-of-age novels and "Bildungsroman" are sometimes interchangeable, but the former is usually a wider genre. The "Bildungsroman" (from the German words "Bildung", "education", alternatively "forming" and "Roman", "novel") is further characterized by a number of formal, topical, and thematic features. It focuses on the psychological and moral growth of the protagonist from childhood to adulthood (coming of age), in which character change is important.


title: Coming-of-age story

text: The genre evolved from folk tales of young children exploring the world to find their fortune. Although the "Bildungsroman" arose in Germany, it has had extensive influence first in Europe and later throughout the world. Thomas Carlyle translated Goethe's novel into English, and after its publication in 1824, many British authors wrote novels inspired by it.


title: Coming-of-age story

text: Many variations of the "Bildungsroman" exist, such as the "Künstlerroman" ("artist novel"), which focuses on the self-growth of an artist.


title: Coming-of-age story

text: In film, coming-of-age is a genre of teen films. Coming-of-age films focus on the psychological and moral growth or transition of a protagonist from youth to adulthood. A variant in the 2020s is the "delayed-coming-of-age film, a kind of story that acknowledges the deferred nature of 21st-century adulthood", in which young adults may still be exploring short-term relationships, living situations, and jobs even into their late 20s and early 30s.


title: Coming-of-age story

text: Personal growth and change is an important characteristic of the genre, which relies on dialogue and emotional responses, rather than action. The story is sometimes told in the form of a flashback. Historically, coming-of-age films usually centred on young boys, although coming-of-age films focusing on girls have become more common in the early 21st century, such as "The Poker House" (2008), "Winter's Bone" (2010), "Hick" (2011), "Girlhood" (2014), "Mustang" (2015), "The Diary of a Teenage Girl" (2015), "Mistress America" (2015), "The Edge of Seventeen" (2016), "Lady Bird" (2017), "Sweet 20" (2017).


title: Facial (sexual act)

text: A facial is a sexual activity in which a man ejaculates semen onto the face of one or more sexual partners. A facial is a form of non-penetrative sex, though it is generally performed after some other means of sexual stimulation, such as vaginal sex, anal sex, oral sex or masturbation. Facials are regularly portrayed in pornographic films and videos, often as a way to close a scene.


title: Facial (sexual act)

text: The performance of a facial is typically preceded by activities that result in the sexual arousal and stimulation of the ejaculating participant. After the prerequisite level of sexual stimulation has been achieved, and ejaculation becomes imminent, the male will position his penis so that the semen discharged will be deposited onto his partner's face.


title: Facial (sexual act)

text: The volume of semen that is ejaculated depends on several factors, including the male's health, age, degree of sexual excitement, and the time since his last ejaculation. Normal quantities of ejaculate range from 1.5 to 5.0 milliliters (1 teaspoon). Seconds after being deposited onto the face, the semen thickens, before liquefying 15–30 minutes later.


title: Facial (sexual act)

text: Any sexual activity that involves contact with the bodily fluids of another person contains the risk of transmission of sexually transmitted infections (STIs/STDs). Semen is in itself generally harmless on the skin or if swallowed. However, semen can be the vehicle for many sexually transmitted infections, such as HIV and hepatitis. The California Occupational Safety and Health Administration categorizes semen as "other potentially infectious material" or OPIM.


title: Facial (sexual act)

text: The risks incurred by the giving and receiving partner during the facial sexual act are drastically different. For the ejaculating partner there is almost no risk of contracting an STI. For the receiving partner, the risk is higher. Since potentially infected semen could come into contact with broken skin or sensitive mucous membranes (i.e., eyes, lips, mouth), there is a risk of contracting an infectious disease.


title: Facial (sexual act)

text: In rare cases, people have been known to experience allergic reactions to seminal fluids, known as human seminal plasma hypersensitivity. Symptoms can be either localized or systemic, and may include itching, redness, swelling, or blisters within 30 minutes of contact. They may also include hives and even difficulty breathing.


title: Facial (sexual act)

text: Treatment options for semen allergy include avoiding exposure to seminal fluid by use of condoms and attempting desensitization.


title: Facial (sexual act)

text: Predating the modern age of pornography, facials were described in literature. As an example, the French aristocrat Marquis de Sade wrote about performing facials in his work "The 120 Days of Sodom", written in 1785. One passage of the novel reads "… I show them my prick, then what do you suppose I do? I squirt the fuck in their face… That's my passion my child, I have no other… and you're about to behold it."


title: Facial (sexual act)

text: In the 1970s, the hardcore pornography genre introduced the stereotypical cumshot (also known as the money shot) scene as a central element (leitmotif) of the hardcore film, in which the male actor ejaculates in a way ensuring maximum visibility of the act itself. These scenes may involve the female actor "calling for" the shot to be directed at some specific part of her body. Now facial cumshots are regularly portrayed in pornographic films, videos, magazines and internet web sites.


title: Facial (sexual act)

text: In addition to mainstream pornography, the popularity of facials has led to creation of its own niche market, like video series that specialize in showing the act. Psychologist Ana Bridges and colleagues conducted a content analysis of best-selling heterosexual pornographic videos showing that over 96% of all scenes concluded with a male performer ejaculating onto the body of his female partner. The mouth was the most common area to be ejaculated upon. When all regions of the face are included, facial cum shots occur in approximately 62% of scenes where external ejaculation occurs.


title: Facial (sexual act)

text: There are a variety of views ranging from facials being an act of degradation and elicit humiliation to being grounded in mutual respect and elicit pleasure. Sex therapist Ruth Westheimer believes facials are "humiliating and not sexy". She advises the average person contemplating oral sex to not think that a facial is a necessary part of the act. In response to an inquiry from a reader, sex columnist Dan Savage wrote: "Facials are degrading—and that's why they're so hot." "Daily Nexus" columnist Nina Love Anthony views the practice of facials in a non-threatening light, feeling that it adds variety to the sexual experience. In one of her weekly articles she wrote, "But let's give credit where credit is due: The money shot, by itself, is great for a number of reasons. Blowing it on someone's face is like a change-up pitch—if you've been throwing the heat for a while, maybe you should consider hooking the curve ball." She continues with, "Also, being on the receiving end of the shot can satisfy the secret porn star in everyone and it's minor kink for beginners."


title: Facial (sexual act)

text: Feminist views of the depiction of male-on-female facials are primarily critical. Sociologists Gail Dines, Robert Jensen and Russo echo these sentiments in the book "Pornography: The Production and Consumption of Inequality". It asserts, "In pornography, ejaculating onto a woman is a primary method by which she is turned into a slut, something (not really someone) whose primary, if not only, purpose is to be sexual with men." Radical feminist and noted critic of pornography Andrea Dworkin said "it is a convention of pornography that the sperm is on her not in her. It marks the spot, what he owns and how he owns it. The ejaculation on her is a way of saying (through showing) that she is contaminated with his dirt; that she is dirty."


title: Facial (sexual act)

text: In Padraig McGrath's review of Laurence O'Toole's book "Pornocopia – Porn, Sex, Technology and Desire", he rhetorically asks whether "…women enjoy having men ejaculate on their faces?" He suggests that the role of such a scene is to illustrate that "…it doesn't matter what the woman likes—she'll like whatever the man wants her to like because she has no inner life of her own, in turn because she's not a real person". McGrath argues that there is a "power-aspect" to depictions such as cum shots. He suggests that the "…central theme [of pornography] is power…[,] implicitly violent… eroticized hatred."


title: Facial (sexual act)

text: Gail Dines, writing in "Pornland: How Porn Has Hijacked Our Sexuality", describes the money shot of a man ejaculating on the face or body of a woman as "one of the most degrading acts in porn". To Dines, the ejaculate on the female performer's body "marks the woman as used goods", conveying a sense of ownership, and she quotes veteran porn actor and producer Bill Margold as saying, "I'd like to really show what I believe the men want to see: violence against women. I firmly believe that we serve a purpose by showing that. The most violent we can get is the cum shot in the face. Men get off behind that because they get even with the women they can't have." She adds that at least for some posters on adult forums discussing such scenes, the pleasure is derived from watching a woman suffer. However, Dines also describes that "when you speak to pornographers, they tend themselves not to know" the origins of these sorts of things.


title: Facial (sexual act)

text: Another critic of "cum shot" scenes in heterosexual pornography is the pornography-actress-turned-filmmaker Candida Royalle. She produced pornography films aimed at women and their partners that avoid the "misogynous predictability" and depiction of sex in "…as grotesque and graphic [a way] as possible." Royalle also criticizes the male-centredness of the typical pornography film, in which scenes end when the male actor ejaculates.


title: Facial (sexual act)

text: Author Lisa Moore suggests that Dworkin's explanation does not take into account that it is the pleasure the actresses exhibit that the male partners enjoy, and that it is more accurate to think men want their semen to be wanted. Correspondingly it used to be a porn industry standard for the actress to act eager and loving for the facial she receives, and not in displeasure. If displeasure was shown it was usually considered a failed shot.


title: Facial (sexual act)

text: Women's activist Beatrice Faust argued, "since ejaculating into blank space is not much fun, ejaculating over a person who responds with enjoyment sustains a lighthearted mood as well as a degree of realism." She goes on to say "Logically, if sex is natural and wholesome and semen is as healthy as sweat, there is no reason to interpret ejaculation as a hostile gesture." Joseph Slade, professor at Ohio University, notes in his book "Pornography and sexual representation: a reference guide" that adult industry actresses in the 1960s and 1970s did not trust birth control methods, and that more than one actress of the period told him that ejaculation inside her body was deemed inconsiderate if not rude.


title: Facial (sexual act)

text: Sexologist Peter Sándor Gardos argues that his research suggests that "… the men who get most turned on by watching cum shots are the ones who have positive attitudes toward women" (on the annual meeting of the Society for the Scientific Study of Sex in 1992). Later, on The World Pornography Conference in 1998, he reported a similar conclusion, namely that "no pornographic image is interpretable outside of its historical and social context. Harm or degradation does not reside in the image itself".


title: Facial (sexual act)

text: Cindy Patton, activist and scholar on human sexuality, claims that in western culture male sexual fulfillment is synonymous with orgasm and that the male orgasm is an essential punctuation of the sexual narrative. No orgasm, no sexual pleasure. No cum shot, no narrative closure. In other words, the cum shot is the period at the end of the sentence. In her essay "Speaking Out: Teaching In", Patton reached the conclusion that critics have devoted too little space to discovering the meaning that viewers attach to specific acts such as cum shots.


title: Ken Curtis

text: Ken Curtis (born Curtis Wain Gates; July 2, 1916 – April 28, 1991) was an American singer and actor best known for his role as Festus Haggen on the CBS western television series "Gunsmoke". Although he appeared on "Gunsmoke" earlier in other roles (such as “Brisco” in S4E32’s “Change Of Heart), he was first cast as Festus in season 8 episode 13, December 8, 1962 "Us Haggens." His next appearance was Season 9, episode 2, October 5, 1963 as Kyle Kelly, in "Lover Boy." Curtis joined the cast of "Gunsmoke" permanently as Festus in "Prairie Wolfer," season 9 episode 16, January 18, 1964; though this fact is often confused with a 1969 episode of the same name ("Prairie Wolfer") made five years later (S13E10).


title: Ken Curtis

text: Born the youngest of three boys in Lamar in Prowers County in southeastern Colorado, Curtis lived his first ten years on a ranch on Muddy Creek in eastern Bent County. In 1926, the family moved to Las Animas, the county seat of Bent County, so that his father, Dan Sullivan Gates, could run for sheriff. The campaign was successful, and Gates served from 1926 to 1931 as Bent County sheriff. The family lived below the jail, since the jail was the whole second floor and his mother, Nellie Sneed Gates, cooked for the prisoners. The jail is located for historical preservation purposes on the grounds of the Bent County Courthouse in Las Animas.


title: Ken Curtis

text: Curtis was the quarterback of his Bent County High School football team and played clarinet in the school band. He graduated in 1935. During World War II, Curtis served in the United States Army from 1943 to 1945.


title: Ken Curtis

text: He attended Colorado College to study medicine, but left after a short time to pursue his musical career.


title: Ken Curtis

text: Curtis was a singer before moving into acting, and combined both careers once he entered films. Curtis was with the Tommy Dorsey band in 1941, and succeeded Frank Sinatra as vocalist until Dick Haymes contractually replaced Sinatra in 1942. Curtis may have served simply as insurance against Sinatra's likely defection, and it was Dorsey who suggested that Gates change his name to Ken Curtis. Curtis then joined Shep Fields and His New Music, an all-reeds band that dispensed with a brass section.


title: Ken Curtis

text: Curtis met his first wife, Lorraine Page, at Universal Studios, and they were married in 1943. For much of 1948, Curtis was a featured singer and host of the long-running country music radio program "WWVA Jamboree".


title: Ken Curtis

text: Ken Curtis joined the Sons of the Pioneers as a lead singer from 1949 to 1952. His big hits with the group included "Room Full of Roses" and "".


title: Ken Curtis

text: Columbia Pictures signed Curtis to a contract in 1945. He starred in a series of musical Westerns with the Hoosier Hot Shots, playing singing cowboy romantic leads.


title: Ken Curtis

text: By virtue of his second marriage, Curtis was a son-in-law of film director John Ford. Curtis teamed with Ford and John Wayne in "Rio Grande". He was a singer in the movie's fictional band "The Regimental Singers" that actually consisted of the "Sons of the Pioneers"; Curtis is not listed as a member of the principal cast. It is possible that he played a bit part, but Curtis is best remembered as Charlie McCorry in "The Searchers", "The Quiet Man", "The Wings of Eagles", "The Horse Soldiers", "The Alamo", and "How The West Was Won". Curtis also joined Ford, along with Henry Fonda, James Cagney, William Powell, and Jack Lemmon, in the comedy Navy classic "Mister Roberts". He was featured in all three of the only films produced by Cornelius Vanderbilt Whitney's C. V. Whitney Pictures: "The Searchers" (1956); "The Missouri Traveler" (1958) with Brandon deWilde and Lee Marvin; and "The Young Land" (1959) with Patrick Wayne and Dennis Hopper. In "5 Steps to Danger" (1957 film), he is uncredited as FBI Agent Jim Anderson. Curtis also produced two extremely low-budget monster films in 1959, "The Killer Shrews" and "The Giant Gila Monster". Also, in the film adaptation "Conagher" based on a book by popular writer Louis L'Amour, he starred opposite Sam Elliott as an aging cattleman.


title: Ken Curtis

text: Curtis guest-starred five times on the Western television series "Have Gun – Will Travel" with Richard Boone. In 1959, he appeared as cowhand Phil Jakes on the "Gunsmoke" season four episode, "Jayhawkers". He also guest-starred as circus performer Tim Durant on an episode of "Perry Mason", "The Case of the Clumsy Clown", which originally aired on November 5, 1960. Later, he appeared in "Ripcord", a first-run syndicated action/adventure series about a company of its namesake providing skydiving services, along with its leading star Larry Pennell. This series ran from 1961 to 1963 with 76 half-hour episodes in total. Curtis played the role of James (Jim) Buckley and Pennell was his young disciple Theodore (Ted) McKeever. This television show helped generate interest in sport parachuting.


title: Ken Curtis

text: In 1964, Curtis appeared as muleskinner Graydon in the episode "Graydon's Charge" of the syndicated Western television series, "Death Valley Days", also guest-starring Denver Pyle and Cathy Lewis.


title: Ken Curtis

text: Curtis remains best known for his role as Festus Haggen, the scruffy, cantankerous, and illiterate deputy in "Gunsmoke." He joined the "Gunsmoke" cast in 1967, superseding the previous deputy, Thaddeus "Thad" Greenwood, played by Roger Ewing. While Marshal Matt Dillon had a total of five deputies over two decades, Festus held the role the longest (11 years), in 304 episodes. Festus was patterned after "Cedar Jack" (Frederick Munden), a man from Curtis' Las Animas childhood. Cedar Jack, who lived 15 miles south of town, made a living cutting cedar fence posts. Curtis observed many times that Jack came to Las Animas, where he would often end up drunk and in Curtis' father's jail. Festus' character was known, in part, for the nasally, twangy, rural accent which Curtis developed for the role, but which did not reflect Curtis' actual voice.


title: Ken Curtis

text: Besides engaging in the usual personal appearances most television stars undertake to promote their program, Curtis also traveled around the country performing at Western-themed stage shows at fairs, rodeos, and other venues when "Gunsmoke" was not in production, and even for some years after the show was cancelled. Curtis also campaigned for Ronald Reagan in 1976, during the future President's attempt to secure the Republican nomination from incumbent Gerald Ford.


title: Ken Curtis

text: In two episodes of "Gunsmoke", Carroll O'Connor was a guest-star; years later, Curtis guest-starred as a retired police detective on O'Connor's NBC program "In the Heat of the Night". He voiced Nutsy the vulture in Disney's 1973 animated film "Robin Hood". A decade later, he returned to television in the short-lived Western series "The Yellow Rose", in which he performed most of his scenes with Noah Beery, Jr.


title: Ken Curtis

text: In 1981, Curtis was inducted into the Western Performers Hall of Fame at the National Cowboy & Western Heritage Museum in Oklahoma City, Oklahoma.


title: Ken Curtis

text: Curtis' last acting role was as the aging cattle rancher "Seaborn Tay" in the television production "Conagher" (1991), by western author Louis L'Amour. Sam Elliott starred in the lead role, and Curtis' "Gunsmoke" co-star Buck Taylor (Newly O'Brien) played a bad man in the same film. Buck Taylor's father, Dub Taylor, had a minor role in it.


title: Ken Curtis

text: Curtis married Torrie Connelly in 1966. They were married until his death in 1991 and he had two step-children.


title: Ken Curtis

text: A statue of Ken Curtis as Festus can be found at 430 Pollasky Avenue in Clovis, California, in Fresno County in front of the Educational Employees Credit Union. In his later years, Curtis resided in Clovis.


title: Ken Curtis

text: Curtis was a Republican and supported Barry Goldwater in the 1964 United States presidential election.


title: Ken Curtis

text: Curtis died on April 28, 1991, in his sleep of a heart attack in Fresno, California. He was cremated, and his ashes were scattered in the Colorado flatlands.


title: Xhosa language

text: Xhosa (, ) also isiXhosa as an endonym, is a Nguni language and one of the official languages of South Africa and Zimbabwe. Xhosa is spoken as a first language by approximately 8.2 million people and by another 11 million as a second language in South Africa, mostly in Eastern Cape, Western Cape, Northern Cape and Gauteng. It has perhaps the heaviest functional load of click consonants in a Bantu language (approximately tied with Yeyi), with one count finding that 10% of basic vocabulary items contained a click.


title: Xhosa language

text: Xhosa is part of the branch of Nguni languages, which also include Zulu, Southern Ndebele and Northern Ndebele. Nguni languages effectively form a dialect continuum of variously mutually intelligible varieties.


title: Xhosa language

text: Xhosa is, to some extent, mutually intelligible with Zulu and with other Nguni languages to a lesser extent. Nguni languages are, in turn, classified under the much larger abstraction of Bantu languages.


title: Xhosa language

text: Xhosa is the most widely distributed African language in South Africa, though the most widely spoken African language is Zulu. It is the second most common Bantu home language in South Africa as a whole. approximately 5.3 million Xhosa-speakers, the majority, live in the Eastern Cape, followed by the Western Cape (approximately 2 million), Gauteng (671,045), the Free State (246,192), KwaZulu-Natal (219,826), North West (214,461), Mpumalanga (46,553), the Northern Cape (51,228), and Limpopo (14,225). There is a small but significant Xhosa community of about 200,000 in Zimbabwe. Also, a small community of Xhosa speakers (18,000) live in Quthing District, Lesotho.


title: Xhosa language

text: The Xhosa language employs 26 letters from the Latin alphabet. However, some of the letters have a different pronunciation from English. Additional phonemes use sequences of multiple letters. Tone, stress and vowel length are not indicated.


title: Xhosa language

text: Xhosa has an inventory of ten vowels: , , , and written "a", "e", "i", "o" and "u" in order, all occurring in both long and short. The /i/ vowel is long in the penultimate syllable and short in the last syllable.


title: Xhosa language

text: Xhosa is a tonal language with two inherent phonemic tones: low and high. Tones are rarely marked in the written language, but they can be indicated "a" , "á" , "â" , "ä" . Long vowels are phonemic but are usually not written except for "â" and "ä", which are each sequences of two vowels with different tones that are realized as long vowels with contour tones ("â" high–low = falling, "ä" low–high = rising).


title: Xhosa language

text: Xhosa is rich in uncommon consonants. Besides pulmonic egressive sounds, which are found in all spoken languages, it has a series of ejective stops and one implosive stop.


title: Xhosa language

text: It has 18 click consonants (in comparison, Juǀ'hoan, spoken in Botswana and Namibia, has 48, and Taa, with roughly 4,000 speakers in Botswana, has 83). There is a series of six dental clicks, represented by the letter ⟨c⟩, similar to the sound represented in English by "tut-tut" or "tsk-tsk"; a series of six alveolar lateral clicks, represented by the letter ⟨x⟩, similar to the sound used to call horses; and a series of alveolar clicks, represented by the letter ⟨q⟩, that sound somewhat like a cork pulled from a bottle.


title: Xhosa language

text: The following table lists the consonant phonemes of the language, with the pronunciation in IPA on the left and the orthography on the right:


title: Xhosa language

text: In addition to the ejective affricate , the spelling "tsh" may also be used for either of the aspirated affricates and .


title: Xhosa language

text: The ejectives tend to be ejective only in careful pronunciation or in salient positions and, even then, only for some speakers. Otherwise, they tend to be tenuis (plain) stops. Similarly, the tenuis (plain) clicks are often glottalised, with a long voice onset time, but that is uncommon.


title: Xhosa language

text: The murmured clicks, plosives and affricates are only partially voiced, with the following vowel murmured for some speakers. That is, "da" may be pronounced (or, equivalently, ). They are better described as slack voiced than as breathy voiced. They are truly voiced only after nasals, but the oral occlusion is then very short in stops, and it usually does not occur at all in clicks. Therefore, the absolute duration of voicing is the same as in tenuis stops. (They may also be voiced between vowels in some speaking styles.) The more notable characteristic is their depressor effect on the tone of the syllable.


title: Xhosa language

text: When consonants are prenasalised, their pronunciation and spelling may change. The murmur no longer shifts to the following vowel. Fricatives become affricated and, if voiceless, they become ejectives as well: "mf" is pronounced , "ndl" is pronounced , "n+hl" becomes "ntl" , "n+z" becomes "ndz" , "n"+"q" becomes [n͡ŋǃʼ] "etc." The orthographic "b" in "mb" is the voiced plosive . Prenasalisation occurs in several contexts, including on roots with the class 9 prefix /iN-/, for example on an adjective which is feature-matching its noun:


title: Xhosa language

text: When aspirated clicks ("ch, xh, qh)" are prenasalised, the silent letter "k" is added ("nkc, nkx, nkq") to prevent confusion with the nasal clicks "nc, nx, nq," and are actually distinct sounds. The prenasalized versions have a very short voicing at the onset which then releases in an ejective, like the prenasalized affricates, while the phonemically nasal clicks have a very long voicing through the consonant. When plain voiceless clicks ("c", "x", "q") are prenasalized, they become slack voiced nasal ("ngc", "ngx", "ngq").


title: Xhosa language

text: Palatalisation is a change that affects labial consonants whenever they are immediately followed by . While palatalisation occurred historically, it is still productive, as is shown by palatalization before the passive suffix /-w/ and before diminutive suffix /-ana/. This process can skip rightwards to non-local syllables (i.e. uku-sebenz-is-el + wa -> ukusetyenziselwa "be used for"), but does not affect morpheme-initial consonants (i.e. uku-bhal+wa -> ukubhalwa "to be written", instead of illicit *ukujalwa). The palatalization process only applies once, as evidenced by ukuphuphumisa+wa -> ukuphuphunyiswa "to be made to overflow", instead of the illicit alternative, *ukuphutshunyiswa.


title: Xhosa language

text: In keeping with many other Bantu languages, Xhosa is an agglutinative language, with an array of prefixes and suffixes that are attached to root words. As in other Bantu languages, nouns in Xhosa are classified into morphological classes, or genders (15 in Xhosa), with different prefixes for both singular and plural. Various parts of speech that qualify a noun must agree with the noun according to its gender. Agreements usually reflect part of the original class with which the word agrees. The word order is subject–verb–object, like in English.


title: Xhosa language

text: The verb is modified by affixes to mark subject, object, tense, aspect and mood. The various parts of the sentence must agree in both class and number.


title: Xhosa language

text: The Xhosa noun consists of two essential parts, the prefix and the stem. Using the prefixes, nouns can be grouped into noun classes, which are numbered consecutively, to ease comparison with other Bantu languages.


title: Xhosa language

text: The following table gives an overview of Xhosa noun classes, arranged according to singular-plural pairs.


title: Xhosa language

text: The following is a list of phrases that can be used when one visits a region whose primary language is Xhosa:


title: Xhosa language

text: Xhosa-speaking people have inhabited coastal regions of southeastern Africa since before the 16th century. They refer to themselves as the "amaXhosa" and their language as "isiXhosa". Ancestors of the Xhosa migrated to the east coast of Africa and came across Khoisan-speaking people; "as a result of this contact, the Xhosa people borrowed some Khoisan words along with their pronunciation, for instance, the click sounds of the Khoisan languages". The Bantu ancestor of Xhosa did not have clicks, which attests to a strong historical contact with a Khoisan language that did. An estimated 15% of Xhosa vocabulary is of Khoisan origin.


title: Xhosa language

text: John Bennie was a Scottish Presbyterian missionary and early Xhosa linguist. Bennie, along with John Ross (another missionary), set up a printing press in the Tyhume Valley and the first printed works in Xhosa came out in 1823 from the Lovedale Press in the Alice region of the Eastern Cape. But, as with any language, Xhosa had a rich history of oral traditions from which the society taught, informed, and entertained one another. The first Bible translation was in 1859, produced in part by Henry Hare Dugmore.


title: Xhosa language

text: The role of indigenous languages in South Africa is complex and ambiguous. Their use in education has been governed by legislation, beginning with the Bantu Education Act, 1953.


title: Xhosa language

text: At present, Xhosa is used as the main language of instruction in many primary schools and some secondary schools, but is largely replaced by English after the early primary grades, even in schools mainly serving Xhosa-speaking communities. The language is also studied as a subject.


title: Xhosa language

text: The language of instruction at universities in South Africa is English or Afrikaans (to a diminishing extent), and Xhosa is taught as a subject, both for native and for non-native speakers.


title: Xhosa language

text: Literary works, including prose and poetry, are available in Xhosa, as are newspapers and magazines. The South African Broadcasting Corporation broadcasts in Xhosa on both radio (on Umhlobo Wenene FM) and television, and films, plays and music are also produced in the language. The best-known performer of Xhosa songs outside South Africa was Miriam Makeba, whose "Click Song #1" (Xhosa "Qongqothwane") and "Click Song #2" ("Baxabene Ooxam") are known for their large number of click sounds.


title: Xhosa language

text: "Nkosi Sikelel' iAfrika" is part of the national anthem of South Africa, national anthem of Tanzania and Zambia, and the former anthem of Zimbabwe and Namibia. It is a Methodist hymn written in Xhosa by Enoch Sontonga in 1897. The original stanza was:


title: Xhosa language

text: Additional stanzas were written later by Sontonga and other writers, with the original verse translated into Sotho and Afrikaans, as well as English.


title: Xhosa language

text: In the Marvel Cinematic Universe films "", "Black Panther", "", "", and "", the language spoken in the fictional African nation of Wakanda is Xhosa. This came about because South African actor John Kani, a native of the Eastern Cape province who plays Wakandan King T'Chaka, speaks Xhosa and suggested that the directors of the fictional "Civil War" incorporate a dialogue in the language. For "Black Panther", director Ryan Coogler "wanted to make it a priority to use Xhosa as much as possible" in the script, and provided dialect coaches for the film's actors.


title: Sexy

text: Sexy is an adjective to describe a sexually appealing person (or thing), primarily referring to physical attractiveness. It may also refer to:


title: Tan France

text: Tanveer Wasim "Tan" France ( Safdar; born 20 April 1983) is a British-American fashion designer and television personality. Of Pakistani descent, he is one of the first openly gay South Asian men on a major show and one of the first out Muslim gay men on western television as the fashion expert for the Netflix series "Queer Eye", host of the web series "Dressing Funny" and co-host of "Next In Fashion". His memoir, "Naturally Tan", was released in June 2019.


title: Tan France

text: Tanveer "Tan" Wasim Safdar was born and raised in South Yorkshire, England, to Muslim Pakistani parents. In his memoir, France has discussed how he felt alienated due to his experience of growing up in a strict Muslim household where homosexuality was viewed negatively, the lack of representation in media of his community (and of LGBTQ South Asian people in particular) and his personal experiences of physical and verbal racism in his childhood and adult life. France said: "Our home wasn't super religious but we had a profound connection to our Muslim heritage."


title: Tan France

text: France's interest in fashion began at a young age, inspired by the Disney clothing that was made in his grandparents' denim factory in Bury, England, where he spent time working. By the age of thirteen, he had learned how to construct and embellish a denim jacket. In 2019, he allegedly learned that his grandfather had to close the factory due to the products being Disney knockoffs. Tan France has been a fan of Bollywood music and movies.


title: Tan France

text: France attended Hall Cross School and later Doncaster College, where he studied fashion, after which he moved to Manchester, and then to London.


title: Tan France

text: France began work as designer and director for Zara, Selfridges, and Bershka, among other retailers, to further improve his knowledge of the wholesale business of retail; he later went on to work at a number of brands in order to learn more about manufacturing. He started in menswear and later progressed in womenswear, which he majored in for his fashion degree. France commented that he would often work as a stylist if a high-profile client came into the stores where he was working.


title: Tan France

text: France began working in the United States in 2008, initially living in New York City, and immigrated to the US in 2015. France was company director at Shade Clothing before he opened his solo fashion company in 2011, called Kingdom & State. The brand included clothing designed to meet Mormon clothing guidelines, a group that represented a significant population in Utah, where France was living. He later created two smaller apparel brands. France's designs were purchased by retailers ModCloth and Forever 21. The designs were displayed on the website and stores under the brand name for many years. In 2016 he later became co-founder, fashion designer, and CEO for the Rachel Parcell Inc clothing line, which was sold at Nordstrom.


title: Tan France

text: After selling his businesses, France officially retired, having the intention to start a family with his husband, but he was later contacted by Netflix. This started his journey as a media figure through his role as the fashion expert on "Queer Eye", which premiered in February 2018. In 2019, France appeared in the music video for Taylor Swift's song "You Need to Calm Down". He also appeared in 2020 in a special charity edition of "The Great British Bake Off", in order to raise funds for Stand Up To Cancer, and he was the winner of the episode That year, it was also announced that France would be co-hosting the new Netflix series "Next In Fashion" with Alexa Chung. In interviews with the ITV programme "This Morning" and with NPR, France disclosed that he had sold all three of his businesses after starting work for Netflix.


title: Tan France

text: In 2019 France designed an eyewear line by partnering with EyeBuyDirect. Since 2019, he is a "GQ" Middle East official columnist. From 2020, he is "Express"’s monthly stylist.


title: Tan France

text: France was nominated for an Emmy alongside his "Queer Eye" co-stars for best hosting as reality or competition program in July 2020. In September 2020, France was announced as a style instructor on MasterClass, an educational streaming video platform. In September 2020 The Tan France x Etsy limited edition collection was launched. France co-designed a collection of home decor and foods with thirteen independent sellers.


title: Tan France

text: France currently lives in Salt Lake City, Utah, with his husband, Rob France, who is a pediatric nurse and illustrator.


title: Tan France

text: France married his husband twice, first in London and then in New York City, after marriage there became legal. On 13 April 2021, he announced on Instagram that he and Rob were expecting their first child, via surrogacy. Their son was born seven weeks early on 10 July 2021 and had to spend three weeks in the NICU.


title: Tan France

text: France has a deep love for cooking and especially baking, having learnt how to cook and sew from the age of nine.


title: Tan France

text: France was naturalized as a US citizen on 9 June 2020 after "working towards" it for ten years. He kept his British citizenship, making him a dual citizen of both countries.


title: Tan France

text: In September 2019, France, who is vocal about the colorism, racism, and Islamophobia he has endured throughout his life, created an Instagram account called "Shaded", in which he promotes black people, people of colour, and cultural diversity. In September 2020, France revealed on an episode of "The Carlos Watson Show" that one of the primary reasons for his leaving the UK for the United States was racism.


title: Tan France

text: Tan France released a memoir, "Naturally Tan", in June 2019 through St. Martin's Press. It became a NYT best seller. It is about his experience growing up "gay in a traditional Muslim family, as one of the few people of colour in Doncaster, England". The memoir starts with his childhood in England where episodes of racism were everyday occurrences – like having to run back to school to avoid getting beaten up by racist thugs. The book follows up with heavy topics, such as colourism within the South Asian community and the Islamophobia he faced before and after the 9/11 attacks.


title: Nautical mile

text: A nautical mile is a unit of length used in air, marine, and space navigation, and for the definition of territorial waters. Historically, it was defined as the meridian arc length corresponding to one minute ( of a degree) of latitude. Today the international nautical mile is defined as exactly . The derived unit of speed is the knot, one nautical mile per hour.


title: Nautical mile

text: The word mile is from the Latin word for a thousand paces: mille passus. Navigation at sea was done by eye until around 1500 when navigational instruments were developed and cartographers began using a coordinate system with parallels of latitude and meridians of longitude.


title: Nautical mile

text: By the late 16th century, Englishmen knew that the ratio of distances at sea to degrees was constant along any great circle such as the equator or any meridian, assuming that Earth was a sphere. Robert Hues wrote in 1594 that the distance along a great circle was 60 miles per degree, that is, one nautical mile per arcminute. Edmund Gunter wrote in 1623 that the distance along a great circle was 20 leagues per degree. Thus, Hues explicitly used nautical miles while Gunter did not.


title: Nautical mile

text: Since the Earth is not a perfect sphere but is an oblate spheroid with slightly flattened poles, a minute of latitude is not constant, but about 1,861 metres at the poles and 1,843 metres at the Equator. France and other metric countries state that in principle a nautical mile is an arcminute of a meridian at a latitude of 45°, but that is a modern justification for a more mundane calculation that was developed a century earlier. By the mid-19th century, France had defined a nautical mile via the original 1791 definition of the metre, one ten-millionth of a quarter meridian. Thus became the metric length for a nautical mile. France made it legal for the French Navy in 1906, and many metric countries voted to sanction it for international use at the 1929 International Hydrographic Conference.


title: Nautical mile

text: Both the United States and the United Kingdom used an average arcminute, specifically, a minute of arc of a great circle of a sphere having the same surface area as the Clarke 1866 ellipsoid. The "authalic" (equal area) radius of the Clarke 1866 ellipsoid is . The resulting arcminute is . The United States chose five significant digits for its nautical mile, 6,080.2 feet, whereas the United Kingdom chose four significant digits for its Admiralty mile, 6,080 feet.


title: Nautical mile

text: In 1929, the international nautical mile was defined by the First International Extraordinary Hydrographic Conference in Monaco as exactly 1,852 metres. The United States did not adopt the international nautical mile until 1954. Britain adopted it in 1970, but legal references to the obsolete unit are now converted to 1,853 metres.


title: Nautical mile

text: The metre was originally defined as of the length of the meridian arc from the North pole to the equator, thus one kilometre of distance corresponds to one centigrad (also known as centesimal arc minute) of latitude. The Earth's circumference is therefore approximately 40,000 km. The equatorial circumference is slightly longer than the polar circumference the measurement based on this ( = 1,855.3 metres) is known as the geographical mile.


title: Nautical mile

text: Using the definition of a degree of latitude on Mars, a Martian nautical mile equals to . This is potentially useful for celestial navigation on a human mission to the planet, both as a shorthand and a quick way to roughly determine the location.


title: ARM architecture family

text: ARM (stylised in lowercase as arm, formerly an acronym for Advanced RISC Machines and originally Acorn RISC Machine) is a family of reduced instruction set computer (RISC) instruction set architectures for computer processors, configured for various environments. Arm Ltd. develops the architectures and licenses them to other companies, who design their own products that implement one or more of those architectures, including system on a chip (SoC) and system on module (SOM) designs, that incorporate different components such as memory, interfaces, and radios. It also designs cores that implement these instruction set architectures and licenses these designs to many companies that incorporate those core designs into their own products.


title: ARM architecture family

text: There have been several generations of the ARM design. The original ARM1 used a 32-bit internal structure but had a 26-bit address space that limited it to 64 MB of main memory. This limitation was removed in the ARMv3 series, which has a 32-bit address space, and several additional generations up to ARMv7 remained 32-bit. Released in 2011, the ARMv8-A architecture added support for a 64-bit address space and 64-bit arithmetic with its new 32-bit fixed-length instruction set. Arm Ltd. has also released a series of additional instruction sets for different rules; the "Thumb" extension adds both 32- and 16-bit instructions for improved code density, while Jazelle added instructions for directly handling Java bytecode. More recent changes include the addition of simultaneous multithreading (SMT) for improved performance or fault tolerance.


title: ARM architecture family

text: Due to their low costs, minimal power consumption, and lower heat generation than their competitors, ARM processors are desirable for light, portable, battery-powered devices, including smartphones, laptops and tablet computers, and other embedded systems. However, ARM processors are also used for desktops and servers, including the world's fastest supercomputer (Fugaku) from 2020 to 2022. With over 230 billion ARM chips produced, , ARM is the most widely used family of instruction set architectures (ISA) and the ISAs produced in the largest quantity. Currently, the widely used Cortex cores, older "classic" cores, and specialised SecurCore cores variants are available for each of these to include or exclude optional capabilities.


title: ARM architecture family

text: Acorn Computers' first widely successful design was the BBC Micro, introduced in December 1981. This was a relatively conventional machine based on the MOS Technology 6502 CPU but ran at roughly double the performance of competing designs like the Apple II due to its use of faster dynamic random-access memory (DRAM). Typical DRAM of the era ran at about 2 MHz; Acorn arranged a deal with Hitachi for a supply of faster 4 MHz parts.


title: ARM architecture family

text: Machines of the era generally shared memory between the processor and the framebuffer, which allowed the processor to quickly update the contents of the screen without having to perform separate input/output (I/O). As the timing of the video display is exacting, the video hardware had to have priority access to that memory. Due to a quirk of the 6502's design, the CPU left the memory untouched for half of the time. Thus by running the CPU at 1 MHz, the video system could read data during those down times, taking up the total 2 MHz bandwidth of the RAM. In the BBC Micro, the use of 4 MHz RAM allowed the same technique to be used, but running at twice the speed. This allowed it to outperform any similar machine on the market.


title: ARM architecture family

text: 1981 was also the year that the IBM Personal Computer was introduced. Using the recently introduced Intel 8088, a 16-bit CPU compared to the 6502's 8-bit design, it offered higher overall performance. Its introduction changed the desktop computer market radically: what had been largely a hobby and gaming market emerging over the prior five years began to change to a must-have business tool where the earlier 8-bit designs simply could not compete. Even newer 32-bit designs were also coming to market, such as the Motorola 68000 and National Semiconductor NS32016.


title: ARM architecture family

text: Acorn began considering how to compete in this market and produced a new paper design named the Acorn Business Computer. They set themselves the goal of producing a machine with ten times the performance of the BBC Micro, but at the same price. This would outperform and underprice the PC. At the same time, the recent introduction of the Apple Lisa brought the graphical user interface (GUI) concept to a wider audience and suggested the future belonged to machines with a GUI. The Lisa, however, cost $9,995, as it was packed with support chips, large amounts of memory, and a hard disk drive, all very expensive then.


title: ARM architecture family

text: The engineers then began studying all of the CPU designs available. Their conclusion about the existing 16-bit designs was that they were a lot more expensive and were still "a bit crap", offering only slightly higher performance than their BBC Micro design. They also almost always demanded a large number of support chips to operate even at that level, which drove up the cost of the computer as a whole. These systems would simply not hit the design goal. They also considered the new 32-bit designs, but these cost even more and had the same issues with support chips. According to Sophie Wilson, all the processors tested at that time performed about the same, with about a 4 Mbit/second bandwidth.


title: ARM architecture family

text: Two key events led Acorn down the path to ARM. One was the publication of a series of reports from the University of California, Berkeley, which suggested that a simple chip design could nevertheless have extremely high performance, much higher than the latest 32-bit designs on the market. The second was a visit by Steve Furber and Sophie Wilson to the Western Design Center, a company run by Bill Mensch and his sister, which had become the logical successor to the MOS team and was offering new versions like the WDC 65C02. The Acorn team saw high school students producing chip layouts on Apple II machines, which suggested that anyone could do it. In contrast, a visit to another design firm working on modern 32-bit CPU revealed a team with over a dozen members which were already on revision H of their design and yet it still contained bugs. This cemented their late 1983 decision to begin their own CPU design, the Acorn RISC Machine.


title: ARM architecture family

text: The original Berkeley RISC designs were in some sense teaching systems, not designed specifically for outright performance. To the RISC's basic register-heavy and load/store concepts, ARM added a number of the well-received design notes of the 6502. Primary among them was the ability to quickly serve interrupts, which allowed the machines to offer reasonable input/output performance with no added external hardware. To offer interrupts with similar performance as the 6502, the ARM design limited its physical address space to 64 MB of total addressable space, requiring 26 bits of address. As instructions were 4 bytes (32 bits) long, and required to be aligned on 4-byte boundaries, the lower 2 bits of an instruction address were always zero. This meant the program counter (PC) only needed to be 24 bits, allowing it to be stored along with the eight bit processor flags in a single 32-bit register. That meant that upon receiving an interrupt, the entire machine state could be saved in a single operation, whereas had the PC been a full 32-bit value, it would require separate operations to store the PC and the status flags. This decision halved the interrupt overhead.


title: ARM architecture family

text: Another change, and among the most important in terms of practical real-world performance, was the modification of the instruction set to take advantage of page mode DRAM. Recently introduced, page mode allowed subsequent accesses of memory to run twice as fast if they were roughly in the same location, or "page", in the DRAM chip. Berkeley's design did not consider page mode and treated all memory equally. The ARM design added special vector-like memory access instructions, the "S-cycles", that could be used to fill or save multiple registers in a single page using page mode. This doubled memory performance when they could be used, and was especially important for graphics performance.


title: ARM architecture family

text: The Berkeley RISC designs used register windows to reduce the number of register saves and restores performed in procedure calls; the ARM design did not adopt this.


title: ARM architecture family

text: Wilson developed the instruction set, writing a simulation of the processor in BBC BASIC that ran on a BBC Micro with a second 6502 processor. This convinced Acorn engineers they were on the right track. Wilson approached Acorn's CEO, Hermann Hauser, and requested more resources. Hauser gave his approval and assembled a small team to design the actual processor based on Wilson's ISA. The official Acorn RISC Machine project started in October 1983.


title: ARM architecture family

text: Acorn chose VLSI Technology as the "silicon partner", as they were a source of ROMs and custom chips for Acorn. Acorn provided the design and VLSI provided the layout and production. The first samples of ARM silicon worked properly when first received and tested on 26 April 1985. Known as ARM1, these versions ran at 6 MHz.


title: ARM architecture family

text: The first ARM application was as a second processor for the BBC Micro, where it helped in developing simulation software to finish development of the support chips (VIDC, IOC, MEMC), and sped up the CAD software used in ARM2 development. Wilson subsequently rewrote BBC BASIC in ARM assembly language. The in-depth knowledge gained from designing the instruction set enabled the code to be very dense, making ARM BBC BASIC an extremely good test for any ARM emulator.


title: ARM architecture family

text: The result of the simulations on the ARM1 boards led to the late 1986 introduction of the ARM2 design running at 8 MHz, and the early 1987 speed-bumped version at 10 to 12 MHz. A significant change in the underlying architecture was the addition of a Booth multiplier, whereas formerly multiplication had to be carried out in software. Further, a new Fast Interrupt reQuest mode, FIQ for short, allowed registers 8 through 14 to be replaced as part of the interrupt itself. This meant FIQ requests did not have to save out their registers, further speeding interrupts.


title: ARM architecture family

text: The ARM2 was roughly seven times the performance of a typical 7 MHz 68000-based system like the Commodore Amiga or Macintosh SE. It was twice as fast as an Intel 80386 running at 16 MHz, and about the same speed as a multi-processor VAX-11/784 superminicomputer. The only systems that beat it were the Sun SPARC and MIPS R2000 RISC-based workstations. Further, as the CPU was designed for high-speed I/O, it dispensed with many of the support chips seen in these machines; notably, it lacked any dedicated direct memory access (DMA) controller which was often found on workstations. The graphics system was also simplified based on the same set of underlying assumptions about memory and timing. The result was a dramatically simplified design, offering performance on par with expensive workstations but at a price point similar to contemporary desktops.


title: ARM architecture family

text: The ARM2 featured a 32-bit data bus, 26-bit address space and 27 32-bit registers, of which 16 are accessible at any one time (including the PC). The ARM2 had a transistor count of just 30,000, compared to Motorola's six-year-older 68000 model with around 68,000. Much of this simplicity came from the lack of microcode, which represents about one-quarter to one-third of the 68000's transistors, and the lack of (like most CPUs of the day) a cache. This simplicity enabled the ARM2 to have low power consumption, yet offer better performance than the Intel 80286.


title: ARM architecture family

text: A successor, ARM3, was produced with a 4 KB cache, which further improved performance. The address bus was extended to 32 bits in the ARM6, but program code still had to lie within the first 64 MB of memory in 26-bit compatibility mode, due to the reserved bits for the status flags.


title: ARM architecture family

text: In the late 1980s, Apple Computer and VLSI Technology started working with Acorn on newer versions of the ARM core. In 1990, Acorn spun off the design team into a new company named Advanced RISC Machines Ltd., which became ARM Ltd. when its parent company, Arm Holdings plc, floated on the London Stock Exchange and NASDAQ in 1998. The new Apple-ARM work would eventually evolve into the ARM6, first released in early 1992. Apple used the ARM6-based ARM610 as the basis for their Apple Newton PDA.


title: ARM architecture family

text: In 1994, Acorn used the ARM610 as the main central processing unit (CPU) in their RiscPC computers. DEC licensed the ARMv4 architecture and produced the StrongARM. At 233 MHz, this CPU drew only one watt (newer versions draw far less). This work was later passed to Intel as part of a lawsuit settlement, and Intel took the opportunity to supplement their i960 line with the StrongARM. Intel later developed its own high performance implementation named XScale, which it has since sold to Marvell. Transistor count of the ARM core remained essentially the same throughout these changes; ARM2 had 30,000 transistors, while ARM6 grew only to 35,000.


title: ARM architecture family

text: In 2005, about 98% of all mobile phones sold used at least one ARM processor. In 2010, producers of chips based on ARM architectures reported shipments of 6.1 billion ARM-based processors, representing 95% of smartphones, 35% of digital televisions and set-top boxes, and 10% of mobile computers. In 2011, the 32-bit ARM architecture was the most widely used architecture in mobile devices and the most popular 32-bit one in embedded systems. In 2013, 10 billion were produced and "ARM-based chips are found in nearly 60 percent of the world's mobile devices".


title: ARM architecture family

text: Arm Ltd.'s primary business is selling IP cores, which licensees use to create microcontrollers (MCUs), CPUs, and systems-on-chips based on those cores. The original design manufacturer combines the ARM core with other parts to produce a complete device, typically one that can be built in existing semiconductor fabrication plants (fabs) at low cost and still deliver substantial performance. The most successful implementation has been the ARM7TDMI with hundreds of millions sold. Atmel has been a precursor design center in the ARM7TDMI-based embedded system.


title: ARM architecture family

text: In 2009, some manufacturers introduced netbooks based on ARM architecture CPUs, in direct competition with netbooks based on Intel Atom.


title: ARM architecture family

text: Arm Ltd. offers a variety of licensing terms, varying in cost and deliverables. Arm Ltd. provides to all licensees an integratable hardware description of the ARM core as well as complete software development toolset (compiler, debugger, software development kit), and the right to sell manufactured silicon containing the ARM CPU.


title: ARM architecture family

text: SoC packages integrating ARM's core designs include Nvidia Tegra's first three generations, CSR plc's Quatro family, ST-Ericsson's Nova and NovaThor, Silicon Labs's Precision32 MCU, Texas Instruments's OMAP products, Samsung's Hummingbird and Exynos products, Apple's A4, A5, and A5X, and NXP's i.MX.


title: ARM architecture family

text: Fabless licensees, who wish to integrate an ARM core into their own chip design, are usually only interested in acquiring a ready-to-manufacture verified semiconductor intellectual property core. For these customers, Arm Ltd. delivers a gate netlist description of the chosen ARM core, along with an abstracted simulation model and test programs to aid design integration and verification. More ambitious customers, including integrated device manufacturers (IDM) and foundry operators, choose to acquire the processor IP in synthesizable RTL (Verilog) form. With the synthesizable RTL, the customer has the ability to perform architectural level optimisations and extensions. This allows the designer to achieve exotic design goals not otherwise possible with an unmodified netlist (high clock speed, very low power consumption, instruction set extensions, etc.). While Arm Ltd. does not grant the licensee the right to resell the ARM architecture itself, licensees may freely sell manufactured products such as chip devices, evaluation boards and complete systems. Merchant foundries can be a special case; not only are they allowed to sell finished silicon containing ARM cores, they generally hold the right to re-manufacture ARM cores for other customers.


title: ARM architecture family

text: Arm Ltd. prices its IP based on perceived value. Lower performing ARM cores typically have lower licence costs than higher performing cores. In implementation terms, a synthesisable core costs more than a hard macro (blackbox) core. Complicating price matters, a merchant foundry that holds an ARM licence, such as Samsung or Fujitsu, can offer fab customers reduced licensing costs. In exchange for acquiring the ARM core through the foundry's in-house design services, the customer can reduce or eliminate payment of ARM's upfront licence fee.


title: ARM architecture family

text: Compared to dedicated semiconductor foundries (such as TSMC and UMC) without in-house design services, Fujitsu/Samsung charge two- to three-times more per manufactured wafer. For low to mid volume applications, a design service foundry offers lower overall pricing (through subsidisation of the licence fee). For high volume mass-produced parts, the long term cost reduction achievable through lower wafer pricing reduces the impact of ARM's NRE (non-recurring engineering) costs, making the dedicated foundry a better choice.


title: ARM architecture family

text: Companies that have developed chips with cores designed by Arm include Amazon.com's Annapurna Labs subsidiary, Analog Devices, Apple, AppliedMicro (now: MACOM Technology Solutions), Atmel, Broadcom, Cavium, Cypress Semiconductor, Freescale Semiconductor (now NXP Semiconductors), Huawei, Intel, Maxim Integrated, Nvidia, NXP, Qualcomm, Renesas, Samsung Electronics, ST Microelectronics, Texas Instruments, and Xilinx.


title: ARM architecture family

text: In February 2016, ARM announced the Built on ARM Cortex Technology licence, often shortened to Built on Cortex (BoC) licence. This licence allows companies to partner with ARM and make modifications to ARM Cortex designs. These design modifications will not be shared with other companies. These semi-custom core designs also have brand freedom, for example Kryo 280.


title: ARM architecture family

text: Companies can also obtain an ARM "architectural licence" for designing their own CPU cores using the ARM instruction sets. These cores must comply fully with the ARM architecture. Companies that have designed cores that implement an ARM architecture include Apple, AppliedMicro (now: Ampere Computing), Broadcom, Cavium (now: Marvell), Digital Equipment Corporation, Intel, Nvidia, Qualcomm, Samsung Electronics, Fujitsu, and NUVIA Inc. (acquired by Qualcomm in 2021).


title: ARM architecture family

text: On 16 July 2019, ARM announced ARM Flexible Access. ARM Flexible Access provides unlimited access to included ARM intellectual property (IP) for development. Per product licence fees are required once a customer reaches foundry tapeout or prototyping.


title: ARM architecture family

text: 75% of ARM's most recent IP over the last two years are included in ARM Flexible Access. As of October 2019:


title: ARM architecture family

text: Arm provides a list of vendors who implement ARM cores in their design (application specific standard products (ASSP), microprocessor and microcontrollers).


title: ARM architecture family

text: ARM cores are used in a number of products, particularly PDAs and smartphones. Some computing examples are Microsoft's first generation Surface, Surface 2 and Pocket PC devices (following 2002), Apple's iPads, and Asus's Eee Pad Transformer tablet computers, and several Chromebook laptops. Others include Apple's iPhone smartphones and iPod portable media players, Canon PowerShot digital cameras, Nintendo Switch hybrid, the Wii security processor and 3DS handheld game consoles, and TomTom turn-by-turn navigation systems.


title: ARM architecture family

text: In 2005, Arm took part in the development of Manchester University's computer SpiNNaker, which used ARM cores to simulate the human brain.


title: ARM architecture family

text: ARM chips are also used in Raspberry Pi, BeagleBoard, BeagleBone, PandaBoard, and other single-board computers, because they are very small, inexpensive, and consume very little power.


title: ARM architecture family

text: The 32-bit ARM architecture (ARM32), such as Armv7-A (implementing AArch32; see section on Armv8-A for more on it), was the most widely used architecture in mobile devices .


title: ARM architecture family

text: Since 1995, various versions of the "ARM Architecture Reference Manual" (see ) have been the primary source of documentation on the ARM processor architecture and instruction set, distinguishing interfaces that all ARM processors are required to support (such as instruction semantics) from implementation details that may vary. The architecture has evolved over time, and version seven of the architecture, ARMv7, defines three architecture "profiles":


title: ARM architecture family

text: Although the architecture profiles were first defined for ARMv7, ARM subsequently defined the ARMv6-M architecture (used by the Cortex M0/M0+/M1) as a subset of the ARMv7-M profile with fewer instructions.


title: ARM architecture family

text: Except in the M-profile, the 32-bit ARM architecture specifies several CPU modes, depending on the implemented architecture features. At any moment in time, the CPU can be in only one mode, but it can switch modes due to external events (interrupts) or programmatically.


title: ARM architecture family

text: The original (and subsequent) ARM implementation was hardwired without microcode, like the much simpler 8-bit 6502 processor used in prior Acorn microcomputers.


title: ARM architecture family

text: The 32-bit ARM architecture (and the 64-bit architecture for the most part) includes the following RISC features:


title: ARM architecture family

text: To compensate for the simpler design, compared with processors like the Intel 80286 and Motorola 68020, some additional design features were used:


title: ARM architecture family

text: ARM includes integer arithmetic operations for add, subtract, and multiply; some versions of the architecture also support divide operations.


title: ARM architecture family

text: ARM supports 32-bit × 32-bit multiplies with either a 32-bit result or 64-bit result, though Cortex-M0 / M0+ / M1 cores don't support 64-bit results. Some ARM cores also support 16-bit × 16-bit and 32-bit × 16-bit multiplies.


title: ARM architecture family

text: Registers R8 through R12 are the same across all CPU modes except FIQ mode. FIQ mode has its own distinct R8 through R12 registers.


title: ARM architecture family

text: R13 and R14 are banked across all privileged CPU modes except system mode. That is, each mode that can be entered because of an exception has its own R13 and R14. These registers generally contain the stack pointer and the return address from function calls, respectively.


title: ARM architecture family

text: Almost every ARM instruction has a conditional execution feature called predication, which is implemented with a 4-bit condition code selector (the predicate). To allow for unconditional execution, one of the four-bit codes causes the instruction to be always executed. Most other CPU architectures only have condition codes on branch instructions.


title: ARM architecture family

text: Though the predicate takes up four of the 32 bits in an instruction code, and thus cuts down significantly on the encoding bits available for displacements in memory access instructions, it avoids branch instructions when generating code for small codice_1 statements. Apart from eliminating the branch instructions themselves, this preserves the fetch/decode/execute pipeline at the cost of only one cycle per skipped instruction.


title: ARM architecture family

text: An algorithm that provides a good example of conditional execution is the subtraction-based Euclidean algorithm for computing the greatest common divisor. In the C programming language, the algorithm can be written as:


title: ARM architecture family

text: which avoids the branches around the codice_2 and codice_3 clauses. If codice_4 and codice_5 are equal then neither of the codice_6 instructions will be executed, eliminating the need for a conditional branch to implement the codice_7 check at the top of the loop, for example had codice_8 (less than or equal) been used.


title: ARM architecture family

text: One of the ways that Thumb code provides a more dense encoding is to remove the four-bit selector from non-branch instructions.


title: ARM architecture family

text: Another feature of the instruction set is the ability to fold shifts and rotates into the "data processing" (arithmetic, logical, and register-register move) instructions, so that, for example, the statement in C language:


title: ARM architecture family

text: This results in the typical ARM program being denser than expected with fewer memory accesses; thus the pipeline is used more efficiently.


title: ARM architecture family

text: The ARM processor also has features rarely seen in other RISC architectures, such as PC-relative addressing (indeed, on the 32-bit ARM the PC is one of its 16 registers) and pre- and post-increment addressing modes.


title: ARM architecture family

text: The ARM instruction set has increased over time. Some early ARM processors (before ARM7TDMI), for example, have no instruction to store a two-byte quantity.


title: ARM architecture family

text: The ARM7 and earlier implementations have a three-stage pipeline; the stages being fetch, decode, and execute. Higher-performance designs, such as the ARM9, have deeper pipelines: Cortex-A8 has thirteen stages. Additional implementation changes for higher performance include a faster adder and more extensive branch prediction logic. The difference between the ARM7DI and ARM7DMI cores, for example, was an improved multiplier; hence the added "M".


title: ARM architecture family

text: The ARM architecture (pre-Armv8) provides a non-intrusive way of extending the instruction set using "coprocessors" that can be addressed using MCR, MRC, MRRC, MCRR, and similar instructions. The coprocessor space is divided logically into 16 coprocessors with numbers from 0 to 15, coprocessor 15 (cp15) being reserved for some typical control functions like managing the caches and MMU operation on processors that have one.


title: ARM architecture family

text: In ARM-based machines, peripheral devices are usually attached to the processor by mapping their physical registers into ARM memory space, into the coprocessor space, or by connecting to another device (a bus) that in turn attaches to the processor. Coprocessor accesses have lower latency, so some peripherals—for example, an XScale interrupt controller—are accessible in both ways: through memory and through coprocessors.


title: ARM architecture family

text: In other cases, chip designers only integrate hardware using the coprocessor mechanism. For example, an image processing engine might be a small ARM7TDMI core combined with a coprocessor that has specialised operations to support a specific set of HDTV transcoding primitives.


title: ARM architecture family

text: All modern ARM processors include hardware debugging facilities, allowing software debuggers to perform operations such as halting, stepping, and breakpointing of code starting from reset. These facilities are built using JTAG support, though some newer cores optionally support ARM's own two-wire "SWD" protocol. In ARM7TDMI cores, the "D" represented JTAG debug support, and the "I" represented presence of an "EmbeddedICE" debug module. For ARM7 and ARM9 core generations, EmbeddedICE over JTAG was a de facto debug standard, though not architecturally guaranteed.


title: ARM architecture family

text: The ARMv7 architecture defines basic debug facilities at an architectural level. These include breakpoints, watchpoints and instruction execution in a "Debug Mode"; similar facilities were also available with EmbeddedICE. Both "halt mode" and "monitor" mode debugging are supported. The actual transport mechanism used to access the debug facilities is not architecturally specified, but implementations generally include JTAG support.


title: ARM architecture family

text: There is a separate ARM "CoreSight" debug architecture, which is not architecturally required by ARMv7 processors.


title: ARM architecture family

text: There are two different supported implementations, the Serial Wire JTAG Debug Port (SWJ-DP) and the Serial Wire Debug Port (SW-DP).


title: ARM architecture family

text: CMSIS-DAP is a standard interface that describes how various debugging software on a host PC can communicate over USB to firmware running on a hardware debugger, which in turn talks over SWD or JTAG to a CoreSight-enabled ARM Cortex CPU.


title: ARM architecture family

text: To improve the ARM architecture for digital signal processing and multimedia applications, DSP instructions were added to the set. These are signified by an "E" in the name of the ARMv5TE and ARMv5TEJ architectures. E-variants also imply T, D, M, and I.


title: ARM architecture family

text: The new instructions are common in digital signal processor (DSP) architectures. They include variations on signed multiply–accumulate, saturated add and subtract, and count leading zeros.


title: ARM architecture family

text: Jazelle DBX (Direct Bytecode eXecution) is a technique that allows Java bytecode to be executed directly in the ARM architecture as a third execution state (and instruction set) alongside the existing ARM and Thumb-mode. Support for this state is signified by the "J" in the ARMv5TEJ architecture, and in ARM9EJ-S and ARM7EJ-S core names. Support for this state is required starting in ARMv6 (except for the ARMv7-M profile), though newer cores only include a trivial implementation that provides no hardware acceleration.


title: ARM architecture family

text: To improve compiled code density, processors since the ARM7TDMI (released in 1994) have featured the "Thumb" instruction set, which have their own state. (The "T" in "TDMI" indicates the Thumb feature.) When in this state, the processor executes the Thumb instruction set, a compact 16-bit encoding for a subset of the ARM instruction set. Most of the Thumb instructions are directly mapped to normal ARM instructions. The space saving comes from making some of the instruction operands implicit and limiting the number of possibilities compared to the ARM instructions executed in the ARM instruction set state.


title: ARM architecture family

text: In Thumb, the 16-bit opcodes have less functionality. For example, only branches can be conditional, and many opcodes are restricted to accessing only half of all of the CPU's general-purpose registers. The shorter opcodes give improved code density overall, even though some operations require extra instructions. In situations where the memory port or bus width is constrained to less than 32 bits, the shorter Thumb opcodes allow increased performance compared with 32-bit ARM code, as less program code may need to be loaded into the processor over the constrained memory bandwidth.


title: ARM architecture family

text: Unlike processor architectures with variable length (16- or 32-bit) instructions, such as the Cray-1 and Hitachi SuperH, the ARM and Thumb instruction sets exist independently of each other. Embedded hardware, such as the Game Boy Advance, typically have a small amount of RAM accessible with a full 32-bit datapath; the majority is accessed via a 16-bit or narrower secondary datapath. In this situation, it usually makes sense to compile Thumb code and hand-optimise a few of the most CPU-intensive sections using full 32-bit ARM instructions, placing these wider instructions into the 32-bit bus accessible memory.


title: ARM architecture family

text: The first processor with a Thumb instruction decoder was the ARM7TDMI. All ARM9 and later families, including XScale, have included a Thumb instruction decoder. It includes instructions adopted from the Hitachi SuperH (1992), which was licensed by ARM. ARM's smallest processor families (Cortex M0 and M1) implement only the 16-bit Thumb instruction set for maximum performance in lowest cost applications.


title: ARM architecture family

text: "Thumb-2" technology was introduced in the "ARM1156 core", announced in 2003. Thumb-2 extends the limited 16-bit instruction set of Thumb with additional 32-bit instructions to give the instruction set more breadth, thus producing a variable-length instruction set. A stated aim for Thumb-2 was to achieve code density similar to Thumb with performance similar to the ARM instruction set on 32-bit memory.


title: ARM architecture family

text: Thumb-2 extends the Thumb instruction set with bit-field manipulation, table branches and conditional execution. At the same time, the ARM instruction set was extended to maintain equivalent functionality in both instruction sets. A new "Unified Assembly Language" (UAL) supports generation of either Thumb or ARM instructions from the same source code; versions of Thumb seen on ARMv7 processors are essentially as capable as ARM code (including the ability to write interrupt handlers). This requires a bit of care, and use of a new "IT" (if-then) instruction, which permits up to four successive instructions to execute based on a tested condition, or on its inverse. When compiling into ARM code, this is ignored, but when compiling into Thumb it generates an actual instruction. For example:


title: ARM architecture family

text: All ARMv7 chips support the Thumb instruction set. All chips in the Cortex-A series, Cortex-R series, and ARM11 series support both "ARM instruction set state" and "Thumb instruction set state", while chips in the Cortex-M series support only the Thumb instruction set.


title: ARM architecture family

text: "ThumbEE" (erroneously called "Thumb-2EE" in some ARM documentation), which was marketed as Jazelle RCT (Runtime Compilation Target), was announced in 2005 and deprecated in 2011. It first appeared in the "Cortex-A8" processor. ThumbEE is a fourth instruction set state, making small changes to the Thumb-2 extended instruction set. These changes make the instruction set particularly suited to code generated at runtime (e.g. by JIT compilation) in managed "Execution Environments". ThumbEE is a target for languages such as Java, C#, Perl, and Python, and allows JIT compilers to output smaller compiled code without reducing performance.


title: ARM architecture family

text: New features provided by ThumbEE include automatic null pointer checks on every load and store instruction, an instruction to perform an array bounds check, and special instructions that call a handler. In addition, because it utilises Thumb-2 technology, ThumbEE provides access to registers r8–r15 (where the Jazelle/DBX Java VM state is held). Handlers are small sections of frequently called code, commonly used to implement high level languages, such as allocating memory for a new object. These changes come from repurposing a handful of opcodes, and knowing the core is in the new ThumbEE state.


title: ARM architecture family

text: On 23 November 2011, Arm deprecated any use of the ThumbEE instruction set, and Armv8 removes support for ThumbEE.


title: ARM architecture family

text: "VFP" (Vector Floating Point) technology is a floating-point unit (FPU) coprocessor extension to the ARM architecture (implemented differently in Armv8 – coprocessors not defined there). It provides low-cost single-precision and double-precision floating-point computation fully compliant with the "ANSI/IEEE Std 754-1985 Standard for Binary Floating-Point Arithmetic". VFP provides floating-point computation suitable for a wide spectrum of applications such as PDAs, smartphones, voice compression and decompression, three-dimensional graphics and digital audio, printers, set-top boxes, and automotive applications. The VFP architecture was intended to support execution of short "vector mode" instructions but these operated on each vector element sequentially and thus did not offer the performance of true single instruction, multiple data (SIMD) vector parallelism. This vector mode was therefore removed shortly after its introduction, to be replaced with the much more powerful Advanced SIMD, also named Neon.


title: ARM architecture family

text: Some devices such as the ARM Cortex-A8 have a cut-down "VFPLite" module instead of a full VFP module, and require roughly ten times more clock cycles per float operation. Pre-Armv8 architecture implemented floating-point/SIMD with the coprocessor interface. Other floating-point and/or SIMD units found in ARM-based processors using the coprocessor interface include FPA, FPE, iwMMXt, some of which were implemented in software by trapping but could have been implemented in hardware. They provide some of the same functionality as VFP but are not opcode-compatible with it. FPA10 also provides extended precision, but implements correct rounding (required by IEEE 754) only in single precision.


title: ARM architecture family

text: In Debian Linux and derivatives such as Ubuntu and Linux Mint, armhf (ARM hard float) refers to the ARMv7 architecture including the additional VFP3-D16 floating-point hardware extension (and Thumb-2) above. Software packages and cross-compiler tools use the armhf vs. arm/armel suffixes to differentiate.


title: ARM architecture family

text: The "Advanced SIMD" extension (aka "Neon" or "MPE" Media Processing Engine) is a combined 64- and 128-bit SIMD instruction set that provides standardised acceleration for media and signal processing applications. Neon is included in all Cortex-A8 devices, but is optional in Cortex-A9 devices. Neon can execute MP3 audio decoding on CPUs running at 10 MHz, and can run the GSM adaptive multi-rate (AMR) speech codec at 13 MHz. It features a comprehensive instruction set, separate register files, and independent execution hardware. Neon supports 8-, 16-, 32-, and 64-bit integer and single-precision (32-bit) floating-point data and SIMD operations for handling audio and video processing as well as graphics and gaming processing. In Neon, the SIMD supports up to 16 operations at the same time. The Neon hardware shares the same floating-point registers as used in VFP. Devices such as the ARM Cortex-A8 and Cortex-A9 support 128-bit vectors, but will execute with 64 bits at a time, whereas newer Cortex-A15 devices can execute 128 bits at a time.


title: ARM architecture family

text: A quirk of Neon in Armv7 devices is that it flushes all subnormal numbers to zero, and as a result the GCC compiler will not use it unless , which allows losing denormals, is turned on. "Enhanced" Neon defined since Armv8 does not have this quirk, but as of the same flag is still required to enable Neon instructions. On the other hand, GCC does consider Neon safe on AArch64 for Armv8.


title: ARM architecture family

text: ProjectNe10 is ARM's first open-source project (from its inception; while they acquired an older project, now named Mbed TLS). The Ne10 library is a set of common, useful functions written in both Neon and C (for compatibility). The library was created to allow developers to use Neon optimisations without learning Neon, but it also serves as a set of highly optimised Neon intrinsic and assembly code examples for common DSP, arithmetic, and image processing routines. The source code is available on GitHub.


title: ARM architecture family

text: Helium is the M-Profile Vector Extension (MVE). It adds more than 150 scalar and vector instructions.


title: ARM architecture family

text: The Security Extensions, marketed as TrustZone Technology, is in ARMv6KZ and later application profile architectures. It provides a low-cost alternative to adding another dedicated security core to an SoC, by providing two virtual processors backed by hardware based access control. This lets the application core switch between two states, referred to as "worlds" (to reduce confusion with other names for capability domains), to prevent information leaking from the more trusted world to the less trusted world. This world switch is generally orthogonal to all other capabilities of the processor, thus each world can operate independently of the other while using the same core. Memory and peripherals are then made aware of the operating world of the core and may use this to provide access control to secrets and code on the device.


title: ARM architecture family

text: Typically, a rich operating system is run in the less trusted world, with smaller security-specialised code in the more trusted world, aiming to reduce the attack surface. Typical applications include DRM functionality for controlling the use of media on ARM-based devices, and preventing any unapproved use of the device.


title: ARM architecture family

text: In practice, since the specific implementation details of proprietary TrustZone implementations have not been publicly disclosed for review, it is unclear what level of assurance is provided for a given threat model, but they are not immune from attack.


title: ARM architecture family

text: Open Virtualization is an open source implementation of the trusted world architecture for TrustZone.


title: ARM architecture family

text: AMD has licensed and incorporated TrustZone technology into its Secure Processor Technology. Enabled in some but not all products, AMD's APUs include a Cortex-A5 processor for handling secure processing. In fact, the Cortex-A5 TrustZone core had been included in earlier AMD products, but was not enabled due to time constraints.


title: ARM architecture family

text: Samsung Knox uses TrustZone for purposes such as detecting modifications to the kernel, storing certificates and attestating keys.


title: ARM architecture family

text: The Security Extension, marketed as TrustZone for Armv8-M Technology, was introduced in the Armv8-M architecture. While containing similar concepts to TrustZone for Armv8-A, it has a different architectural design, as world switching is performed using branch instructions instead of using exceptions. It also supports safe interleaved interrupt handling from either world regardless of the current security state. Together these features provide low latency calls to the secure world and responsive interrupt handling. ARM provides a reference stack of secure world code in the form of Trusted Firmware for M and PSA Certified.


title: ARM architecture family

text: As of ARMv6, the ARM architecture supports no-execute page protection, which is referred to as "XN", for "eXecute Never".


title: ARM architecture family

text: The Large Physical Address Extension (LPAE), which extends the physical address size from 32 bits to 40 bits, was added to the Armv7-A architecture in 2011.


title: ARM architecture family

text: The physical address size may be even larger in processors based on the 64-bit (Armv8-A) architecture. For example, it is 44 bits in Cortex-A75 and Cortex-A65AE.


title: ARM architecture family

text: The Armv8-R and Armv8-M architectures, announced after the Armv8-A architecture, share some features with Armv8-A. However, Armv8-M does not include any 64-bit AArch64 instructions, and Armv8-R originally did not include any AArch64 instructions; those instructions were added to Armv8-R later.


title: ARM architecture family

text: The Armv8.1-M architecture, announced in February 2019, is an enhancement of the Armv8-M architecture. It brings new features including:


title: ARM architecture family

text: Announced in October 2011, Armv8-A (often called ARMv8 while the Armv8-R is also available) represents a fundamental change to the ARM architecture. It adds an optional 64-bit architecture named "AArch64" and the associated new "A64" instruction set. AArch64 provides user-space compatibility with Armv7-A, the 32-bit architecture, therein referred to as "AArch32" and the old 32-bit instruction set, now named "A32". The Thumb instruction set is referred to as "T32" and has no 64-bit counterpart. Armv8-A allows 32-bit applications to be executed in a 64-bit OS, and a 32-bit OS to be under the control of a 64-bit hypervisor. ARM announced their Cortex-A53 and Cortex-A57 cores on 30 October 2012. Apple was the first to release an Armv8-A compatible core in a consumer product (Apple A7 in iPhone 5S). AppliedMicro, using an FPGA, was the first to demo Armv8-A. The first Armv8-A SoC from Samsung is the Exynos 5433 used in the Galaxy Note 4, which features two clusters of four Cortex-A57 and Cortex-A53 cores in a big.LITTLE configuration; but it will run only in AArch32 mode.


title: ARM architecture family

text: To both AArch32 and AArch64, Armv8-A makes VFPv3/v4 and advanced SIMD (Neon) standard. It also adds cryptography instructions supporting AES, SHA-1/SHA-256 and finite field arithmetic. AArch64 was introduced in Armv8-A and its subsequent revision. AArch64 is not included in the 32-bit Armv8-R and Armv8-M architectures.


title: ARM architecture family

text: Optional AArch64 support was added to the Armv8-R profile, with the first ARM core implementing it being the Cortex-R82. It adds the A64 instruction set.


title: ARM architecture family

text: Announced in March 2021, the updated architecture places a focus on secure execution and compartmentalisation.