In this section we will describe some basis of hardware involved in Nano.
 Block Diagram
 Power Supply
Jz4720 support 3 different boot sources. The boot sequence is controlled by boot_sel pin values [1:0]. The configuration of BOOT_SEL1 and BOOT_SEL1 [1:0] is showed as below:
|0||0||Boot from external ROM at CS4|
|0||1||Boot from USB device|
|1||0||Boot from 512 page size NAND flash at CS1|
|1||1||Boot from 2048 page size NAND flash at CS1|
 Arquitectura General
It is necessary, for the operation of the Nanonote Board to store many sections of executable programs in volatile and non-volatile memories. The volatile memories are used like Random Access Memories (RAM) due to its low access time and unlimited number of Read/Write cycles. On the other hand, the Non-volatile memories (NAND, SD) stores for long periods of time the required information to operate the Embedded System.
Universal Serial Bus (USB) is a way of setting up communication between a computer and peripheral devices. USB is intended to replace many varieties of serial and parallel ports. USB can connect computer peripherals such as mice, keyboards, PDAs, gamepads and joysticks, scanners, digital cameras, printers, personal media players, flash drives, and external hard drives. For many of those devices, USB has become the standard connection method.
A USB system has an asymmetric design, consisting of a host, a multitude of downstream USB ports, and multiple peripheral devices connected in a tiered-star topology. Additional USB hubs may be included in the tiers, allowing branching into a tree structure with up to five tier levels. A USB host may have multiple host controllers and each host controller may provide one or more USB ports. Up to 127 devices, including the hub devices, may be connected to a single host controller.
 Serial and JTAG
The NAND in the Ben NanoNote:
- Has pages that are 4096 bytes in length
- Has blocks that are 128 pages in length
- Has 4096 blocks of storage in total
- 4096 × 128 × 4096 = 2147483648 bytes ( 2 GB)
root@ben:/# cat /proc/mtd dev: size erasesize name mtd0: 00400000 00080000 "NAND BOOT partition" mtd1: 00400000 00080000 "NAND KERNEL partition" mtd2: 7f800000 00080000 "NAND ROOTFS partition"
- size is the capacity of the partition in bytes. 7f800000 is just shy of 2 GB
- erasesize is the block size. 00080000 is 512 KB ( 128 × 4096 byte pages)
 Samsung K9GAG08X0M NAND flash chip, hardware info
1 Page = (4K + 128)Bytes 1 Block = 128 Pages (512K + 16K) Bytes 1 Devie = (512K + 16K) Bytes x 4,096 Blocks 1 Device = (4K+128)B x 128Pages x 4,096 Blocks = 16,896 Mbits
- NanoNote partitions
|Name||Size||Block offset||Page offset|
- NanoNote partitions AFTER OpenWrt_Software_Image#Image_2010-11-17, we change the rootfs to 512M
|Name||Size||Block offset||Page offset|
PCB 08.50 (ben)
 Micro-SD pins on testpads
Pin TP note ------------------ #1 TP14 data2 #2 TP15 cd/data3 / _CS #3 TP17 cmd / mosi #4 sdVCC switched by Q4 (fet?) controlled via line from cpu (on TP11) #5 TP16 clock #6 GND #7 TP12 data0 / miso #8 TP13 data1
 Serial pins
 System information
 GPIO pins
The Jz4720 has only a limited number of pins as outputs to the board. Furthermore, several functions take up gpio pins which are therefore not usable for other functions. Those devices are the sdram and nand controller, lcd controller and mmc+sd controller. Below is a table showing how they are used. Please complete this table. The missing entries are not connected to a pad in the Jz4720.
 Port A
- 01 sdram data 0
- 03 sdram data 1
- 05 sdram data 2
- 07 sdram data 3
- 08 sdram data 4
- 09 sdram data 5
- 10 sdram data 6
- 11 sdram data 7
- 12 sdram data 8
- 13 sdram data 9
- 15 sdram data 10
- 17 sdram data 11
- 22 sdram data 12
- 26 sdram data 13
- 28 sdram data 14
- 30 sdram data 15
 Port B
- 00 sdram address 0
- 01 sdram address 1
- 02 sdram address 2
- 03 sdram address 3
- 04 sdram address 4
- 05 sdram address 5
- 06 sdram address 6
- 07 sdram address 7
- 08 sdram address 8
- 09 sdram address 9
- 10 sdram address 10
- 11 sdram address 11
- 12 sdram address 12
- 13 sdram address 13
- 14 sdram address 14
- 15 nand command latch
- 16 nand address latch
- 17 SHDN_HOST???
- 18 TP23 (free)
- 19 sdram dcs
- 20 sdram ras
- 21 sdram cas
- 22 ???
- 23 sdram cke
- 24 sdram cko
- 25 sdram cs1
- 26 sdram cs2
- 27 USB ID
- 28 ???
- 29 Audio output enable
- 30 TP25 (free)
- 31 ???
 Port C
- 00 lcd data 0
- 01 lcd data 1
- 02 lcd data 2
- 03 lcd data 3
- 04 lcd data 4
- 05 lcd data 5
- 06 lcd data 6
- 07 lcd data 7
- 08 TP 35 (unused)
- 09 TP 36 (unused)
- 10 keyboard out 0
- 11 keyboard out 1
- 12 keyboard out 2
- 13 keyboard out 3
- 14 keyboard out 4
- 15 keyboard out 5
- 16 keyboard out 6
- 17 keyboard out 7
- 18 lcd pixel clock
- 19 lcd hsync
- 20 lcd vsync
- 21 LCD SPI chipselect
- 22 LCD SPI data
- 23 LCD SPI clock
- 24 sdram write enable 1
- 27 Charge detect
- 28 nand read enable
- 29 nand write enable
- 30 nand flash ready/busy
- 31 select uart or jtag on pad 147; not a gpio pin
 Port D
- 00 SD Card detect
- 02 SD Card power enable
- 04 Speaker AMP enable
- 06 Shutdown detect
- 08 SD Card command
- 09 SD Card clock
- 10 SD Card data 1
- 11 SD Card data 2
- 12 SD Card data 3
- 13 SD Card data 4
- 15 TP 38 (free)
- 18 Keyboard in 1
- 19 Keyboard in 2
- 20 Keyboard in 3
- 21 Keyboard in 4
- 22 Keyboard in 5
- 23 Keyboard in 6 (i2c?)
- 24 Keyboard in 7 (i2c?)
- 25 uart transmit
- 26 Keyboard in 8 (uart receive)
- 27 Buzzer, controlled with pwm4. Piezo-electric buzzer; not related to soundcard output.
- 28 USB detect
- 29 power button
 Test Points Under Battery
This page is to describe all test pins under battery label. You may want to probe or discover them as long as you tear off battery label. Also this whole page you can reference to the schematic of AVT2 RC1 Reference Board.
- TP 9, V33, system voltage 3.3V when power on
- TP 12, SDD0, MSC_D0/GPD10(in/out) of jz4720, MSC data bit 0, Please see MicroSD.
- TP 13, SDD1, MSC_D1/GPD11(in/out) of jz4720, MSC data bit 1, Please see MicroSD.
- TP 14, SDD2, MSC_D2/GPD12(in/out) of jz4720, MSC data bit 2, Please see MicroSD.
- TP 15, SDD3, MSC_D3/GPD13(in/out) of jz4720, MSC data bit 3, Please see MicroSD.
- TP 16, SDCLK, MSC_CLK/GPD9(out) of jz4720, MSC clock output, Please see MicroSD.
- TP 17, SDCMD, MSC_CMD/GPD8(in/out) of jz4720, MSC command, Please see MicroSD.
- TP 19, CS1_N, CS1_/GPB25(out) of jz4720, This connects to NAND (NAND chip enable).
- TP 20, CS2_N, CS2_/GPB26(out) of jz4720, This connects to NAND (NAND chip enable 2).
- TP 24, POP, GPB29(out) of jz4720, This pin is the purpose on eliminate POP sound free. Please also see Audio IN OUT.
- TP 25 COB TEST, GPB30 of jz4720, Purpose during production test.
- TP 26, FWE_N, FWE_/GPC29(out) of jz4720, This connects to NAND WE_(NAND flash write enable). Please see NAND.
- TP 29, FRB_N, FRB_/GPC30(in) of jz4720, This connects to NAND FRB(NAND flash ready/busy). Please see NAND.
- TP 32, CHARGE_N, GPC27(in) of jz4720, Through this input pin that shows if charging or not. Please see Power Supply Circuit & Battery Charger.
- TP 39, LCD0, pin 16 of CON2 FPC connector, GPC0(out) of jz4720, Please see LCD.
- TP 40, LCD1, pin 15 of CON2 FPC connector, GPC1(out) of jz4720, Please see LCD.
- TP 41, LCD2, pin 14 of CON2 FPC connector, GPC2(out) of jz4720, Please see LCD.
- TP 42, LCD3, pin 13 of CON2 FPC connector, GPC3(out) of jz4720, Please see LCD.
- TP 43, LCD4, pin 12 of CON2 FPC connector, GPC4(out) of jz4720, Please see LCD.
- TP 44, LCD5, pin 11 of CON2 FPC connector, GPC5(out) of jz4720, Please see LCD.
- TP 45, LCD6, pin 10 of CON2 FPC connector, GPC6(out) of jz4720, Please see LCD.
- TP 46, LCD7, pin 9 of CON2 FPC connector, GPC7(out) of jz4720, Please see LCD.
- TP 47, LCDDCLK, pin 17 of CON2 FPC connector, GPC18(out) of jz4720, Please see LCD.
- TP 48, VSYNC, pin 18 of CON2 FPC connector, GPC20(out) of jz4720, Please see LCD.
- TP 49, HSYNC, pin 19 of CON2 FPC connector, GPC19(out) of jz4720, Please see LCD.
- TP 50, LCDCS, pin 20 of CON2 FPC connector, GPC21(out) of jz4720, Please see LCD.
- TP 51, LCDSCL, pin 21 of CON2 FPC connector, GPC22(out) of jz4720, Please see LCD.
- TP 52, LCDSDA, pin 22 of CON2 FPC connector, GPC23(in/out) of jz4720, Please see LCD.
- TP 60, KEYOUT2, GPC11(out) of jz4720, Please see Keyboard.
- TP 62, KEYOUT4, GPC13(out) of jz4720, Please see Keyboard.
- TP 63, KEYOUT5, GPC14(out) of jz4720, Please see Keyboard.
- TP 64, KEYOUT6, GPC15(out) of jz4720, Please see Keyboard.
- TP 66, KEYOUT8, GPC17(out) of jz4720, Please see Keyboard.
- TP 67, KEYIN1, GPD18(in) of jz4720, Please see Keyboard.
- TP 74, KEYIN8, GPD26(in) of jz4720, Serial console RXD pin in, Please see Serial console.
- TP 75, TXD, GPD25(out) of jz4720, Serial console TXD pin out, Please see Serial console.
- TP 76, GND, System ground, Please see Serial console.
- TP 79, USBDET, GPD28(input) of jz4720, Jz4720 can detect a "LOW" status during usb host cable is plug in.