Catastrophic failure and fault-tolerant design of IGBT power electronic converters - an overview
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paper_title: Selected failure mechanisms of modern power modules

paper_content:

Abstract This paper reviews the main failure mechanisms occurring in modern power modules paying special attention to insulated gate bipolar transistor devices for high-power applications. This compendium provides the main failure modes, the physical or chemical processes that lead to the failure, and reports some major technological countermeasures, which are used for realizing the very stringent reliability requirements imposed in particular by the electrical traction applications.
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paper_title: Lifetime prediction of IGBT modules for traction applications

paper_content:

Bond wire lift-off caused by low-cycle fatigue is one among the dominant failure mechanisms of modern high power Insulated Gate Bipolar Transistors multichip modules used in traction applications. A model is proposed which is calibrated basing on data from accelerated tests and which predicts quantitatively the lifetime of devices submitted to cyclic loads as they are encountered in current converters of railway systems. It assumes linear accumulation of the thermal-cycle fatigue damage and takes into account the redundancy of the bond wires within a complex multichip module.
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paper_title: A Literature Review of IGBT Fault Diagnostic and Protection Methods for Power Inverters

paper_content:

This paper presents a survey on existing methods for fault diagnosis and protection of IGBT's, with special focus on those used in three-phase power inverters. Twenty one methods for open-circuit faults and ten methods for short-circuit faults are evaluated and summarized, based on their performance and implementation efforts. The gate-misfiring faults and their diagnostic methods are also briefly discussed. Finally, the promising methods are recommended for future work.
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paper_title: Toward Reliable Power Electronics: Challenges, Design Tools, and Opportunities

paper_content:

A new era of power electronics was created with the invention of the thyristor in 1957. Since then, the evolution of modern power electronics has witnessed its full potential and is quickly expanding in the applications of generation, transmission, distribution, and end-user consumption of electrical power. The performance of power electronic systems, especially in terms of efficiency and power density, has been continuously improved by the intensive research and advancements in circuit topologies, control schemes, semiconductors, passive components, digital signal processors, and system integration technologies.
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paper_title: Some diagnosis methods for voltage source inverters in variable speed drives with induction machines - a survey

paper_content:

Status monitoring and performance diagnosis for variable speed ac drives today is a need, more or less, depending on their application. Diagnosis can help to avoid unplanned standstill, to make possible to run an emergency operation in case of a fault or to keep the time to repair short in case of a fault. For the voltage source inverter several faults are possible. In this paper, these faults and their diagnosis are covered. Possible faults and remedial strategies are listed. It is enumerated, which faults in today's standard protection systems are diagnosed. The main faults, in general not covered in these systems, are the transistor open circuit fault and the dc bus capacitor fault. In these fields diagnosis methods are under research. Some of the various reports of research groups in this field are outlined here as a survey with respect to function and properties.
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paper_title: Prognostics and health management of electronics

paper_content:

There has been a growing interest in monitoring the ongoing "health" of products and systems in order to predict failures and provide warning to avoid catastrophic failure. Here, health is defined as the extent of degradation or deviation from an expected normal condition. While the application of health monitoring, also referred to as prognostics, is well established for assessment of mechanical systems, this is not the case for electronic systems. However, electronic systems are integral to the functionality of most systems today, and their reliability is often critical for system reliability. This paper presents the state-of-practice and the current state-of-research in the area of electronics prognostics and health management. Four current approaches include built-in-test (BIT), use of fuses and canary devices, monitoring and reasoning of failure precursors, and modeling accumulated damage based on measured life-cycle loads. Examples are provided for these different approaches, and the implementation challenges are discussed.
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paper_title: Performance of diagnosis methods for IGBT open circuit faults in three phase voltage source inverters for AC variable speed drives

paper_content:

Variable speed drives have become industrial standard in many applications. Therefore fault diagnosis of voltage source inverters is becoming more and more important. One possible fault within the inverter is an open circuit transistor fault. An overview of the different strategies to detect this fault is given, including the algorithms used to localize the open transistor. Previous work showed significant differences among the available methods to detect such a fault for a mains side active rectifier. This paper extends the performance evaluation for the inverter connected to the machine with variable stator voltage and frequency. Simulation results are presented. They show the influence of the applied standard field oriented control on the currents during a fault. An experimental setup in the laboratory is used to validate simulation results. Typical detection results are presented including time-to-detection measurements. Robust detection of open transistor faults has been found to be possible
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paper_title: An Industry-Based Survey of Reliability in Power Electronic Converters

paper_content:

A questionnaire survey was carried out to determine the industrial requirements and expectations of reliability in power electronic converters. The survey was subjective and conducted with a number of high-profile semiconductor manufacturers, integrators, and users in the aerospace, automation, motor drive, utility power, and other industry sectors. According to the survey, power semiconductor devices ranked the most fragile components. It was concluded that main stresses were from the environment, transients, and heavy loads, which should be considered during power electronic system design and normal operation. This paper has also highlighted that there is a significant need identified by the responders for better reliability-monitoring methods and indicators.
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paper_title: Condition Monitoring for Device Reliability in Power Electronic Converters: A Review

paper_content:

Condition monitoring (CM) has already been proven to be a cost effective means of enhancing reliability and improving customer service in power equipment, such as transformers and rotating electrical machinery. CM for power semiconductor devices in power electronic converters is at a more embryonic stage; however, as progress is made in understanding semiconductor device failure modes, appropriate sensor technologies, and signal processing techniques, this situation will rapidly improve. This technical review is carried out with the aim of describing the current state of the art in CM research for power electronics. Reliability models for power electronics, including dominant failure mechanisms of devices are described first. This is followed by a description of recently proposed CM techniques. The benefits and limitations of these techniques are then discussed. It is intended that this review will provide the basis for future developments in power electronics CM.
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paper_title: An overview of the reliability prediction related aspects of high power IGBTs in wind power applications

paper_content:

Abstract Reliability is becoming more and more important as the size and number of installed Wind Turbines (WTs) increases. Very high reliability is especially important for offshore WTs because the maintenance and repair of such WTs in case of failures can be very expensive. WT manufacturers need to consider the reliability aspect when they design new power converters. By designing the power converter considering the reliability aspect the manufacturer can guarantee that the end product will ensure high availability. This paper represents an overview of the various aspects of reliability prediction of high power Insulated Gate Bipolar Transistors (IGBTs) in the context of wind power applications. At first the latest developments and future predictions about wind energy are briefly discussed. Next the dominant failure mechanisms of high power IGBTs are described and the most commonly used lifetime prediction models are reviewed. Also the concept of Accelerated Life Testing (ALT) is briefly reviewed.
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paper_title: Insulated gate bipolar transistor reliability testing protocol for PV inverter applications

paper_content:

To decrease the cost of ownership of photovoltaic systems, less costly and more reliable photovoltaic inverters must be developed. Insulated gate bipolar transistors are a significant cause of inverter failures and system inefficiencies, so a thorough understanding of their strengths and weaknesses with regards to inverters is necessary. This paper summarizes the current state of experimentation surrounding the use of IGBTs in photovoltaic inverters and discusses their construction, use, lifetime, and reliability of IGBTs regularly used in photovoltaic inverters. Published 2013. This article is a U.S. Government work and is in the public domain in the USA.
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paper_title: A study on the short circuit destruction of IGBTs

paper_content:

The short-circuit destruction of class n-ch 600-V IGBTs (insulated-gate bipolar transistors) is investigated experimentally and analyzed with the help of device simulation, focusing on three major destruction modes (power constant, energy constant, and turn-off destruction). Measured power dissipation for power constant destruction is 2000 approximately 2400 kW/cm/sup 2/, which coincides with the simulation result. The energy constant destruction and turn-off destruction are found to depend on the thermal effect. The critical temperature for destruction is predicted to be 350 degrees C. >
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paper_title: Selected failure mechanisms of modern power modules

paper_content:

Abstract This paper reviews the main failure mechanisms occurring in modern power modules paying special attention to insulated gate bipolar transistor devices for high-power applications. This compendium provides the main failure modes, the physical or chemical processes that lead to the failure, and reports some major technological countermeasures, which are used for realizing the very stringent reliability requirements imposed in particular by the electrical traction applications.
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paper_title: A smart gate drive with self-diagnosis for power MOSFETs and IGBTs

paper_content:

This paper proposes a useful smart gate drive with self-diagnosis for power MOSFETs and IGBTs. This new method is based on monitoring of the gate charge and discharge currents. Two gate current monitoring circuits are proposed and validated with experimental results. The implemented smart functions include self-acknowledgement, gate drive connection verification, power device status diagnosis, gate dielectric wearout detection and prediction. The proposed method can detect abnormal conditions that occur either within the gate drive circuit itself or in the driven power device. It also features simple and low cost implementation and can be easily integrated into gate drive circuits or gate drive chips.
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paper_title: MOSFET gate open failure analysis in power electronics

paper_content:

The compliance to the fault tolerant operation requirement for power electronics is commonly assessed with reference to fault models applicable at component level. For switching MOSFET, the fault models include the short-circuit and open-circuit failures, implicitly assuming that the Gate open failure is equivalent to a switch open or short failure. MOSFET Gate open failure, also called floating Gate failure, may however entail a Drain to Source channel conduction with non-zero impedance and the subsequent power dissipation in the failed device may prove critical because of the thermal failure propagation risk. The present paper is dedicated to that question. It is shown that a power MOSFET with floating Gate is driven by leakage current from whatever initial conduction status either into a steady-state dissipative status or into run-away due to thermal instability. The analysis is confirmed by practical tests. As a conclusion, provisions to mitigate the MOSFET Gate open failure are proposed to be implemented at MOSFET level and/or at converter design level.
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paper_title: Wire Bond Reliability for Power Electronic Modules - Effect of Bonding Temperature

paper_content:

In this paper, thermal cycling reliability along with ANSYS analysis of the residual stress generated in heavy-gauge Al bond wires at different bonding temperatures is reported. 99.999% pure Al wires of 375 mum in diameter, were ultrasonically bonded to silicon dies coated with a 5mum thick Al metallisation at 25degC (room temperature), 100degC and 200degC, respectively (with the same bonding parameters). The wire bonded samples were then subjected to thermal cycling in air from -60degC to +150degC. The degradation rate of the wire bonds was assessed by means of bond shear test and via microstructural characterisation. Prior to thermal cycling, the shear strength of all of the wire bonds was approximately equal to the shear strength of pure aluminum and independent of bonding temperature. During thermal cycling, however, the shear strength of room temperature bonded samples was observed to decrease more rapidly (as compared to bonds formed at 100degC and 200degC) as a result of a high crack propagation rate across the bonding area. In addition, modification of the grain structure at the bonding interface was also observed with bonding temperature, leading to changes in the mechanical properties of the wire. The heat and pressure induced by the high temperature bonding is believed to promote grain recovery and recrystallisation, softening the wires through removal of the dislocations and plastic strain energy. Coarse grains formed at the bonding interface after bonding at elevated temperatures may also contribute to greater resistance for crack propagation, thus lowering the wire bond degradation rate.
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paper_title: Real-time detection of intermittent misfiring in a voltage-fed PWM inverter induction-motor drive

paper_content:

This paper develops a real-time condition-monitoring algorithm for pulsewidth modulation (PWM) inverter induction-motor drives. It is designed to detect the intermittent loss of firing pulses of an individual switching device within the inverter. The mathematical model of the induction machine is linearized in the field-torque coordinates, and the misfiring of the inverter is represented by pulse functions, which have effects in both the field and torque directions. Since the fault considered is of an intermittent nature, the time-domain response of the magnetizing and the torque-producing components of the motor stator current is used to form the condition-monitoring signal. The method is adaptive to changes in the operating point during variable-speed operation. Digital simulation and laboratory experiment are utilized to illustrate the method and to evaluate the computational effort required.
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paper_title: Over-current turn-off failure in high voltage IGBT modules under clamped inductive load

paper_content:

Considering typical conditions of railway traction applications, this paper presents an experimental and simulative analysis of over-current turn-off failure in IGBT devices packaged in parallel within IGBT multichip modules. Extensive experimental analysis is carried out by means of a dedicated test-circuit. Thus, for greater insight, electro-thermal simulations at device level have been carried out. The results show that mismatches in the electro-thermal properties of the IGBT device during transient operation can lead to uneven power dissipation, significantly enhancing the risk of failure.
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paper_title: Investigation of IGBT turn-on failure under high applied voltage operation

paper_content:

In this paper, a new failure mode of punch-through type insulated gate bipolar transistors (PT-IGBTs) at short circuit condition under high voltage operation has been presented. After turning on the IGBTs, this failure mode is characterized as an abrupt destruction mode that takes place several microseconds later under higher collector voltage short circuit conditions. The destruction mechanism of the IGBTs has been investigated using a 2-D and a 3-D device simulation. It is found that the hole-current caused by dynamic avalanche generation at the peripheral region of the device leads to concentrate on a certain point such as the emitter contact edge of the active cells. Subsequently the IGBTs plunge into destruction. This hole-current aggregation depends on geometrical structure of the active cells close to the device peripherals where a parasitic PMOS is formed. The generated hole-current path is varied by the gate voltage and this effect results in degradation of the short circuit capabilities depending on the gate voltages. This model has been evaluated experimentally by making punch-through type IGBTs with a rating current of 200A and the IGBTs have shown enough short circuit capabilities. These devices have successfully been adopted as power devices of invertors for a new hybrid vehicle.
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paper_title: Turn-Off Time as an Early Indicator of Insulated Gate Bipolar Transistor Latch-up

paper_content:

In this paper, effects preceding a latch-up fault in insulated gate bipolar transistors (IGBTs) are studied. Primary failure modes associated with IGBT latch-up faults are reviewed. Precursors to latch-up, primarily an increase in turn-off time as a consequence of elevated junction temperature, are examined for an IGBT. The relationship between junction temperature and turn-off time is explained by modeling the parasitic properties of an IGBT. A metric is derived from the model to standardize the relative estimates in junction temperature from measurements of turn-off time. To evaluate the effects preceding latch-up in-situ, seeded fault testing is conducted on a three-phase power inverter using aged transistors induced with a fault located in the die-attach solder layer. Experimental results demonstrated the feasibility of using the proposed metric as a precursor to transistor latch-up.
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paper_title: Investigations on the stability of dynamic avalanche in IGBTs

paper_content:

Simulation studies on dynamic avalanche exhibit self-extinguishing current filaments which move across the device. In spite of high current densities, there is no indication for subsequent latching. High power densities will probably result in high local transient temperatures and device failure. The benefit of prolonged channel current during turn-off is obviously due to suppression of current filaments.
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paper_title: Static and dynamic latchup in the LIGBT

paper_content:

An insightful study of static and dynamic latchup in the LIGBT, based on extensive two-dimensional numerical device simulations, is described. The insight is then used as a basis for developing a physical SPICE LIGBT model, which is useful for device simulation and design (e.g. for latchup immunity) as well as for power integrated circuit simulation. The basic mechanisms underlying latchup in the LIGBT are identified for various excitations. The significance of the effective p-i-n diode that materializes via the conductivity modulation in the regenerative process is stressed in the simulations, as is the importance of non-quasi-static bipolar transistor behavior, heretofore unrecognized. the SPICE model is supported by measurements of test devices and by the numerical device simulations. >
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paper_title: Investigation of Short-Circuit Failure Limited by Dynamic-Avalanche Capability in 600-V Punchthrough IGBTs

paper_content:

Short-circuit-failure energy of insulated gate bipolar transistors (IGBTs) is generally known to be constant, depending on the thermal capacity of the devices. However, apart from the intrinsic thermal-failure limit, a premature short-circuit failure was observed for 600-V punchthrough (PT) IGBTs at turn-off transition. The observed failure seems irrelevant to the electrical-failure mode as well as the thermal-failure mode, rather, it depends on the dynamic-breakdown voltage of the device. In this paper, with comprehensive investigations into an instant short-circuit failure, it is shown that the observed short-circuit failure of the PT IGBTs results from insufficient avalanche capability, which is initiated by dynamic-avalanche breakdown and can severely degrade the short-circuit ruggedness of the PT IGBTs independent of the duration of the short-circuit event.
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paper_title: Non thermal destruction mechanisms of IGBTs in short circuit operation

paper_content:

A number of experiments show that IGBTs have some non thermal destruction modes, which are similar to secondary breakdown in bipolar transistors. These are destruction just after turn-on, during the turn-off process in short circuit operation and during the turn-off process in an L-load operation. In this paper, the author reproduces the waves of the first and second destructions in isothermal transient simulations. In both cases, increasing the power supply voltage gradually, in a short circuit measurement, the pnp transistors in the IGBT would start to turn on, driven by electrons generated by impact ionization. Although this turn-on process has a positive feedback ability to increase the current, this current flows through a stray inductance (L/sub s/) and causes a voltage drop. So, an IGBT has an ability to sustain some current density at a certain V/sub CE/ originally. However, if there was a local area whose pnp transistor is easier to turn on than the other major part, its current would not cease to increase because the voltage drop due to L/sub s/ was mainly decided by the increasing ratio of the majority current. The local area would inevitably latch up in a very short time. An IGBT has no destruction mechanism which is characterized by a universal constant, such as 200 kW/cm/sup 2/ for npn bipolar transistors. Nevertheless, the destruction limit of IGBTs could be evaluated as the ultimate operating voltage in a quasi-stationary simulation.
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paper_title: A step by step methodology to analyze the IGBT failure mechanisms under short circuit and turn-off inductive conditions using 2D physically based device simulation

paper_content:

A systematic methodology is developed in order to clarify the punch through trench insulated gate bipolar transistor (T-IGBT) failure mechanisms which can occur under extreme operating conditions such as short circuit and clamped inductive switching. By considering a 2D dimensional physically based device simulation, and by analyzing some T-IGBT physical parameters, it is possible to identify if the failure mechanism is due to a breakdown, a latchup or a thermal runaway phenomenon.
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paper_title: Precursor Parameter Identification for Insulated Gate Bipolar Transistor (IGBT) Prognostics

paper_content:

Precursor parameters have been identified to enable development of a prognostic approach for insulated gate bipolar transistors (IGBT). The IGBT were subjected to thermal overstress tests using a transistor test board until device latch-up. The collector-emitter current, transistor case temperature, transient and steady state gate voltages, and transient and steady state collector-emitter voltages were monitored in-situ during the test. Pre- and post-aging characterization tests were performed on the IGBT. The aged parts were observed to have shifts in capacitance-voltage (C-V) measurements as a result of trapped charge in the gate oxide. The collector-emitter ON voltage VCE(ON) showed a reduction with aging. The reduction in the VCE(ON) was found to be correlated to die attach degradation, as observed by scanning acoustic microscopy (SAM) analysis. The collector-emitter voltage, and transistor turn-off time were observed to be precursor parameters to latch-up. The monitoring of these precursor parameters will enable the development of a prognostic methodology for IGBT failure. The prognostic methodology will involve trending precursor data, and using physics of failure models for prediction of the remaining useful life of these devices.
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paper_title: Short circuit properties of Trench-/Field-Stop-IGBTs-design aspects for a superior robustness

paper_content:

This paper will discuss the different principal short circuit failure modes of IGBTs focusing on the new Trench-/Field-Stop-IGBT device concept. Beside the short circuit robustness limitation regarding an over temperature destruction, a new failure mode, the so called short circuit current destruction mode, is described. Necessary design aspects for Trench-/Field-Stop devices resulting in a superior short circuit robustness at least as good as the well established Non Punch Through IGBTs - are derived and proved experimentally by extreme single (e.g. Tj=200/spl deg/C!) and repetitive short circuit pulse tests (e.g. 50.000 times).
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paper_title: Physical CAD model for high-voltage IGBTs based on lumped-charge approach

paper_content:

A new insulated gate bipolar transistor (IGBT) model developed on a physical basis is presented. The Lumped-Charge method has been revised in order to point out a more general methodology for implementing the model into a circuit form. As an example, a version of the model for the popular PSPICE simulator is presented. The N-channel IGBT structure is described by means of an evolution of the PSPICE level-1 metal oxide semiconductor field effect transistor model. An accurate mobility model has been included to precisely predict the voltage drop in the ON state. Simulation results agree well with the experiments both in static and in switching operations. The comparison between the proposed and the native IGBT PSPICE model shows the better behavior of the former. The reasons for this result have been verified by means of two-dimensional MEDICI simulations. Moreover, the proposed model is able to predict the device behavior also in critical operations like its latchup during a turn-off under short-circuit conditions.
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paper_title: Second breakdown and latch-up behavior of IGBTs

paper_content:

The semiconductor structure of bipolar transistors can cause failures by second breakdown. Also power MOSFETs and new semiconductor devices like IGBTs with a parasitic npn-structure may be damaged by this mechanism. First generation IGBTs with a parasitic thyristor inside the device are susceptible to the phenomenon of latch-up. Advances in technology improve the device characteristics. Modern IGBTs seem to show no latch-up despite the existing parasitic thyristor in their structure. This paper gives a short discussion of latch-up and second breakdown phenomena. IGBT of different semiconductor generations during latch-up under various conditions were investigated. A test circuit for these measurements is proposed. >
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paper_title: Experimental Detection and Numerical Validation of Different Failure Mechanisms in IGBTs During Unclamped Inductive Switching

paper_content:

The physics of the different failure modes that limit the maximum avalanche capability during unclamped inductive switching (UIS) in punchthrough (PT) and not PT (NPT) insulated-gate bipolar transistor (IGBT) structures is analyzed in this paper. Both 3-D electrothermal numerical simulations and experimental evaluations support the theoretical analysis. Experimental results for UIS test show that, at low time duration (or inductance value) of the test, the UIS limit moves from energy limitation to current limitation. While the energy limitation is well known, the current-limited failures are less studied. In this paper, the current limit for UIS test is analyzed in detail, and the cause is attributed to a filamentary current conduction due to the presence of a negative differential resistance (NDR) region in the IC- VCE curve in breakdown. The filamentary current conduction locally increases the current density causing early device latch-up and possible device failure at a current much lower than the one dictated by energy limitations. The physical parameters that affect both the onset of NDR region and the failure current are discussed for both an NPT trench IGBT structure with a local lifetime control and a PT trench IGBT structure with a field-stop layer.
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paper_title: Avalanche injection and second breakdown in transistors

paper_content:

A rapid type of second breakdown observed in silicon n+-p-n-n+transistors is shown to be due to avalanche injection at the collector n-n+junction. Localized thermal effects, which are usually associated With second breakdown, are shown to play a minor role in the initiation of the transition to the low voltage state. A useful tool in the analysis of avalanche injection is the n+-n-n+diode, which exhibits negative resistance at a critical voltage and current. A close correspondence between the behavior of the diode and the transistor (open base) is established both theoretically and experimentally. Qualitative agreement with the proposed model is obtained for both directions of base current flow. It is shown that transistors having thin, lightly doped collector regions are particularly susceptible to avalanche injection, which suggests that some compromise may be necessary in the design of high-frequency power transistors.
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paper_title: Failure dynamics of the IGBT during turn-off for unclamped inductive loading conditions

paper_content:

The internal failure dynamics of the insulated gate bipolar transistor (IGBT) for unclamped inductive switching (UIS) conditions are studied using simulations and measurements. The UIS measurements are made using a unique, automated nondestructive reverse bias safe operating area (RBSOA) test system. Simulations are performed with an advanced IGBT circuit simulator model for UIS conditions to predict the mechanisms and conditions for failure. It is shown that the conditions for UIS failure and the shape of the anode voltage avalanche sustaining waveforms during turn-off vary with the IGBT temperature, and turn-off current level. Evidence of single and multiple filament formation is presented and supported with both measurements and simulations.
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paper_title: A discussion on IGBT short-circuit behavior and fault protection schemes

paper_content:

IGBTs are available with short-circuit withstand times approaching those of bipolar transistors. These IGBTs can therefore be protected by the same relatively slow-acting circuitry. The more efficient IGBTs, however, have lower short-circuit withstand times. While protection of these types of IGBTs is not difficult, it does require a reassessment of the traditional protection methods used for bipolar transistors. An in-depth discussion on the behavior of IGBTs under different short-circuit conditions is carried out and the effects of various parameters on permissible short-circuit time are analyzed. The paper also rethinks the problem of providing short-circuit protection in relation to the special characteristics of the most efficient IGBTs. The pros and cons of some of the existing protection circuits are discussed and, based on the recommendations, a protection scheme is implemented to demonstrate that reliable short-circuit protection of these types of IGBTs can be achieved without difficulty in a PWM power convertor motor drive application. >
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paper_title: Experimental and numerical investigations on delayed short-circuit failure mode of single chip IGBT devices

paper_content:

Abstract This paper presents experimental and numerical investigations on the delayed failure mode of IGBT devices observed under short-circuit operations. For short-circuit energies lightly higher than a critical value, the default current may be successfully turned-off but a leakage current takes place leading to a thermal runaway and finally to a delayed failure. Numerical investigations have been carried out and a detailed analysis of the physical mechanisms occurring during the delayed failure mode is presented. We show that the classical short-circuit failure mode (energy limited) is a limit case of the delayed failure mode with zero delay time to failure. So, the analysis is extended to the energy limited case and give better understanding of the failure process of this last failure mode. An electro-thermal model including the device and the solder layer is presented as well as all leakage current components models like saturation, thermal and avalanche generation currents. A detailed description of the thermal runaway is given and main parameters influence on critical energy value are presented, especially, case temperature and solder layer thickness. Finally, numerical results allow to show that the critical energy which separates two failure modes corresponds to a threshold temperature of about 650 °C in the vicinity of the junction location which seems to be independent of test conditions.
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paper_title: Failure mechanism and improvement potential of IGBT's short circuit operation

paper_content:

In this work we will focus on the short circuit destruction of IGBTs after turn-off. Electro-thermal device simulations and experimental verifications have been carried out to study the failure mechanism and identify the improvement potential. Heat diffusion to the front and back side chip surfaces after the short circuit pulse causes temperature rises at the pn-junctions which in turn inject thermally induced leakage currents into the drift region. They can lead to self-heating up to device destruction if the heat transport out of the chip is limited by a poor thermal setup. The combination of a significant heat capacity at the chip front side with a significant reduction of the thermal resistance of the solder layer has been found to be most efficient for increasing the short circuit capability. 1200V trench field-stop IGBTs with a thick front side metallization – made of copper instead of aluminum – have been fabricated and have been attached to the DBC by a newly developed diffusion soldering process. This way the critical short circuit energy before destruction has been increased by 80% which has also been predicted by simulation. In contrast, attaching a separate heat capacity by soldering a molybdenum cube to the chip front side did not yield the expected improvement. Active IGBT cells which could be not covered by the heat sink failed at the original energy level.
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paper_title: Overview of catastrophic failures of freewheeling diodes in power electronic circuits

paper_content:

Emerging applications (e.g. electric vehicles, renewable energy systems, more electric aircrafts, etc.) have brought more stringent reliability constrains into power electronic products because of safety requirements and maintenance cost issues. To improve the reliability of power electronics, better understanding of failure modes and failure mechanisms of reliability–critical components in power electronic circuits are needed. Many efforts have been devoted to the reduction of IGBT failures, while the study on the failures of freewheeling diodes is less impressive. It is of importance to investigate the catastrophic failures of freewheeling diodes as they could induce the malfunction of other components and eventually the whole power electronic circuits. This paper presents an overview of those catastrophic failures and gives examples of the corresponding consequences to the circuits.
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paper_title: Short circuit properties of Trench-/Field-Stop-IGBTs-design aspects for a superior robustness

paper_content:

This paper will discuss the different principal short circuit failure modes of IGBTs focusing on the new Trench-/Field-Stop-IGBT device concept. Beside the short circuit robustness limitation regarding an over temperature destruction, a new failure mode, the so called short circuit current destruction mode, is described. Necessary design aspects for Trench-/Field-Stop devices resulting in a superior short circuit robustness at least as good as the well established Non Punch Through IGBTs - are derived and proved experimentally by extreme single (e.g. Tj=200/spl deg/C!) and repetitive short circuit pulse tests (e.g. 50.000 times).
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paper_title: Freewheeling diode reverse-recovery failure modes in IGBT applications

paper_content:

In this paper, reverse-recovery failure modes in modern fast power diodes are investigated. By the aid of semiconductor device simulation tools, a better view is obtained for the physical process, and operating conditions at which both diode snappy recovery and dynamic avalanching occur during the recovery period in modern high-frequency power electronic applications. The work presented here confirms that the reverse-recovery process can by expressed by means of diode capacitance effects which influence the reverse-recovery characteristics. The paper also shows that the control of the carrier gradient and the remaining stored charge in the drift region during the recovery phase influence both failure modes and determine if the diode exhibits soft, snappy, or dynamic avalanche recovery characteristics.
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paper_title: Failure mechanisms of Trench IGBT under various short-circuit conditions

paper_content:

Four short circuit electrical configurations leading to the Trench IGBT failures are studied in detail by the help a two dimensional physically-based device simulator. By analyzing different internal physical parameters, it was highlighted that the failure occurring during the turn-on is due to a high impact ionization generation rate, whereas the failures occurring during on- state, at the turn-off and the one occurring some microseconds after turn-off are due to a thermal runaway phenomenon.
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paper_title: Experimental behavior of single-chip IGBT and COOLMOS devices under repetitive short-circuit conditions

paper_content:

This work presents the behavior of single-chip insulated gate bipolar transistors (IGBT) devices under repetitive short-circuit operations. The 600 and 1200 V nonpunch through IGBTs as well as 600 V COOLMOS (trademark of Infineon Technologies) have been tested. The repetition of these severe working conditions is responsible for devices ageing, and results unavoidably in the components failure. A series of experimental tests were made in order to determine the number of short-circuit operations the devices can support before failure for different dissipated energies. The temperature influence has been also investigated. Results show two distinct failure modes depending on the dissipated energy during the tests. A critical value of short-circuit energy has been pointed out which separates these failure modes. Experimental and numerical investigations have been carried out in order to analyze these failure modes. A detailed analysis of the physical mechanisms occurring during the short-circuit failures for dissipated energies equal or lightly higher than the critical value is presented.
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paper_title: Three-Level Active Neutral-Point-Clamped (ANPC) Converter with Fault Tolerant Ability

paper_content:

Compared with traditional three-level neutral-point-clamped converter, the recently proposed three-level active neutral-point-clamped (ANPC) converter can overcome the unequal loss distribution among semiconductor devices, and therefore result in increased output power or switching frequency. In industrial applications, fault tolerance of power electronics converters is very important considering system availability, safety and reliability. This paper presents the fault tolerant ability of three-level ANPC converter. Control schemes are proposed to keep the neutral-point voltage balanced and get stable and continuous output under single device fault for both open-circuit fault and short-circuit fault cases. Simulation results show the effectiveness of the fault tolerant ability of the three-level ANPC inverter under the presented control strategies, which are promising to carry on further experimental validation.
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paper_title: A Control Method for Improvement of Reliability in Fault Tolerant NPC Inverter System

paper_content:

In this paper, a simple method for fault tolerance is proposed for improvement of reliability when the NPC inverter fault occurs in the switching device. The fault of switching device is detected by checking the change of a leg-voltage in NPC inverter. This method has some advantage of fast detection ability and a simple realization for fault detection, compared with conventional methods. Also, reconfiguration is performed by two phases control method which used to supply the balancing three phases voltage to the load continuously. This proposed method help the system minimize the harmful affection to the load caused by a delay of fault detection. The proposed method has been verified by simulation and experiment.
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paper_title: Study of neutral point potential variation for three-level NPC inverter under fault condition

paper_content:

Three-level Diode Clamped Multilevel Inverter, generally known as Neutral-Point-Clamped (NPC) Inverter, has an inherent problem causing Neutral Point (NP) potential variation. Until now, in many literatures NP potential problem has been investigated and lots of solutions have also been proposed. However, in the cases of fault and fault tolerant control state, distinctive feature of NP potential variation was rarely published from the standpoint of reliability. In this paper, NP potential is analytically investigated both normal and fault conditions under carrier based PWM. Subsequently, relation between fault detection time and size of capacitor is analyzed. This information is explored by simulation results, which contribute to enhance the reliability of inverter system.
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paper_title: 4.5kV press pack IGBT designed for ruggedness and reliability

paper_content:

A novel press pack IGBT (PPI) with a rating of up to 4500 V and 2000 A is presented. During the development of this new component, special emphasis was placed on the ease of use by system manufacturers. The mechanical design is optimized in order to facilitate the clamping of the PPI in long stacks. Even if the clamping in the stack has severe pressure nonuniformities, the PPI remains fully functional due to its unique design with individual press-pins for each chip. Furthermore, the choice of materials is optimized to achieve high reliability in the field. The trade-off between power-cycling capability and operation under shorted conditions was a major thrust of the development. The IGBT as well as the diode chip are based on SPT (soft punch through) technology. Together with an advanced planar cell design of the IGBT and the sophisticated lifetime engineering of the diode, this chip set offers an unprecedented safe operating area (SOA). This greatly facilitates system design by making clamps or snubbers obsolete.
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paper_title: The active NPC converter and its loss-balancing control

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The three-level neutral-point-clamped voltage-source converter (NPC VSC) is widely used in high-power medium-voltage applications. The unequal loss distribution among the semiconductors is one major disadvantage of this popular topology. This paper studies the loss distribution problem of the NPC VSC and proposes the active NPC VSC to overcome this drawback. The switch states and commutations of the converter are analyzed. A loss-balancing scheme is introduced, enabling a substantially increased output power and an improved performance at zero speed, compared to the conventional NPC VSC.
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paper_title: Strategies of fault tolerant operation for three-level PWM inverters

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This paper proposes fault tolerant operation strategies for three-level neutral point clamped pulsewidth modulation inverters in high power, safety-critical applications. Likely faults are identified and fault tolerant schemes based on the inherent redundancy of voltage vectors are presented. Simulation verification is performed to show fault handling capabilities. Prototyping and principle investigation are performed on a 150-KW inverter and testing results are presented.
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paper_title: Performance Evaluation of Fault-Tolerant Neutral-Point-Clamped Converters

paper_content:

This paper presents a study of the fault tolerance capacity of a neutral-point-clamped converter. Different faults in power semiconductors are considered, and the available postfault states of the converter are shown. In regard of the operation limits, two possible solutions are presented. In these solutions, adding a reduced number of additional components, the behavior of the converter when a switch fails improves considerably. Furthermore, an analysis of the neutral-point voltage balancing conditions after a fault and reconfiguration of the system is also evaluated. Experimental results that prove the correct operation of the proposed topologies are shown.
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paper_title: Development of high power press-pack IGBT and its applications

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Press-pack IGBT has been developed in recent years as a superior high power IGBT device to conventional IGBT module in reliability and performance. This type of IGBT is replacing GTO or thyristor in such applications as traction, power transmission and industrial motor drive because of its excellent advantages such as high performance, high reliability, compactness due to the both-sided cooling, rupture free feature, and so forth. This paper reviews the performance and structure of 2.5 kV and 4.5 kV press-pack IGBT's and their major applications.
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paper_title: Fault Detection for Modular Multilevel Converters Based on Sliding Mode Observer

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This letter presents a fault detection method for modular multilevel converters which is capable of locating a faulty semiconductor switching device in the circuit. The proposed fault detection method is based on a sliding mode observer (SMO) and a switching model of a half-bridge, the approach taken is to conjecture the location of fault, modify the SMO accordingly and then compare the observed and measured states to verify, or otherwise, the assumption. This technique requires no additional measurement elements and can easily be implemented in a DSP or microcontroller. The operation and robustness of the fault detection technique are confirmed by simulation results for the fault condition of a semiconductor switching device appearing as an open circuit.
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paper_title: Electro-thermal modeling for junction temperature cycling-based lifetime prediction of a press-pack IGBT 3L-NPC-VSC applied to large wind turbines

paper_content:

Reliability is a critical criterion for multi-MW wind turbines, which are being employed with increasing numbers in wind power plants, since they operate under harsh conditions and have high maintenance cost due to their remote locations. In this study, the wind turbine grid-side converter reliability is investigated regarding IGBT lifetime based on junction temperature cycling for the grid-side press-pack IGBT 3L-NPC-VSC, which is a state-of-the art high reliability solution. In order to acquire IGBT junction temperatures for given wind power profiles and to use them in IGBT lifetime prediction, the converter electro-thermal model including electrical, power loss, and dynamical thermal models is developed with the main focus on the thermal modeling regarding converter topology, switch technology, and physical structure. Moreover, these models are simplified for their practical implementation in computation platforms. Finally, the converter lifetimes for wind power profiles are predicted using the IGBT lifetime model available. Hence, the developed electro-thermal model's suitability for the lifetime predictions is shown.
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paper_title: Complete short-circuit failure mode properties and comparison based on IGBT standard packaging. Application to new fault-tolerant inverter and interleaved chopper with reduced parts count

paper_content:

Epoxy molded package and silicone gel module are compared in short-circuit failure mode with respect to critical energy, I2T melting and explosion energy capabilities. The molded technology yields a very low and stable R sc "residual ohmic value" of the dies in low energy short failure which are analyzed through a complete 3D reverse. A continuous thermal cycling test over a short term (duration sc property. These original and not enough known properties are afterwards used for new and original fail-safe X-phase inverter or interleaved chopper. All these proposed topologies use only one paralleled safety leg that is spontaneously connected in series with the faulty devices without any additional complexity or extra cost. Finally, a first lab. set-up provides additional properties during the disconnection of the faulty leg and the automatic connection of the safety leg.
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paper_title: Fault-Tolerant Operation of a Battery-Energy-Storage System Based on a Multilevel Cascade PWM Converter With Star Configuration

paper_content:

This paper focuses on fault-tolerant control for a battery-energy-storage system based on a multilevel cascade pulsewidth-modulation (PWM) converter with star configuration. During the occurrence of a single-converter-cell or single-battery-unit fault, the fault-tolerant control enables continuous operation and maintains state-of-charge balancing of the remaining healthy battery units. This enhances both system reliability and availability. A 200-V, 10-kW, 3.6-kW·h laboratory system combining a three-phase cascade PWM converter with nine nickel-metal-hydride battery units is designed, constructed, and tested to verify the validity and effectiveness of the proposed fault-tolerant control.
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paper_title: On the operation of a press pack IGBT module under short circuit conditions

paper_content:

Press pack insulated gate bipolar transistor (IGBT) modules connected in series for high-voltage direct current (HVDC) converter applications are designed such that when a failure occurs, it occurs in a safe manner by the formation of a stable short circuit, while redundant modules take up the voltage blocking function of the failed module. One such design using individual pressure contacts is described and the events occurring from the initiation of the short circuit to its final failure due to open circuit are reported from an electronics packaging materials design point of view. Experiments to hasten the failure under accelerated test conditions on modules were performed and interrupted at various stages of operation under a short circuit condition. The formation and subsequent aging of the metallurgical alloy under short circuit conditions was investigated by analyzing cross sections of the alloy forming the short circuit. Liquid metal corrosion along with the formation of intermetallics with poor conductivities lead to the final failure by open circuit
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paper_title: New Circuit Topology for Fault Tolerant H-Bridge DC–DC Converter

paper_content:

This paper describes a new design for a fault tolerant H-bridge dc-dc converter. Fault tolerance is achieved using a multilevel converter topology in combination with a pulsewidth modulation control strategy allowing a large set of converter switching states to produce bidirectional power flows at any required output voltage. For a given converter open-circuit or short-circuit fault, all potential switch combinations are compared in terms of converter losses and output voltage harmonics to identify the most suitable switching combinations to achieve the prefault output voltage level. The fault tolerant ability of the proposed converter to recover the required output voltage is verified by both computer simulations and experimentally using a 1 kW laboratory set.
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paper_title: Selected failure mechanisms of modern power modules

paper_content:

Abstract This paper reviews the main failure mechanisms occurring in modern power modules paying special attention to insulated gate bipolar transistor devices for high-power applications. This compendium provides the main failure modes, the physical or chemical processes that lead to the failure, and reports some major technological countermeasures, which are used for realizing the very stringent reliability requirements imposed in particular by the electrical traction applications.
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paper_title: Three-Level Converter Topologies With Switch Breakdown Fault-Tolerance Capability

paper_content:

This paper presents some modified topologies of the neutral-point-clamped converter. In all of them, the main change consists of adding a fourth leg, which is based on the flying-capacitor converter structure. The aim of this additional leg is to provide the converter with fault tolerance. Furthermore, during normal operation mode, this leg is able to provide a stiff neutral voltage. Consequently, the low-frequency voltage oscillations that appear at the neutral point of the standard three-level topology in some operating conditions no longer exist. As a result, the modulation strategy of the three main legs of the converter does not have to take care of voltage balance, and it can be designed to either achieve optimal output voltage spectra or improve the efficiency of the converter. Simulation and experimental results are presented to show the viability of this approach both under normal operation mode and in the event of faults.
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paper_title: Fault-Tolerant Strategy for a Photovoltaic DC--DC Converter

paper_content:

The photovoltaic (PV) technology has a small impact on the environment and is suitable for a wide range of applications. The main barrier for a more extensive implementation has been the reliability, mainly related to the power converters. According to this consideration, this paper presents an open-circuit fault diagnosis and fault-tolerant scheme for a three-level boost converter in a PV power system using batteries as storage devices. The fault diagnostic method takes advantage only of the control variables used for maximum power point tracking and output dc-link capacitor voltage balance. The fault-tolerant strategy requires only a few components added to the original three-level boost converter, so that, under an open-circuit power switch fault, it can be partly reconfigured into a two-level boost converter ensuring battery energy supply. Experimental results verify the proposed fault diagnostic method and reconfiguration for fault-tolerant operation.
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paper_title: Fault diagnosis for a sparse matrix converter using current patters

paper_content:

This paper presents a diagnosis method for sparse matrix converter according to the fault of any single switch or two switches. The sparse matrix converter is functionally-equivalent to the standard matrix converter but has a reduced number of switches. The proposed diagnosis method is based on the measurement of input and output currents. The currents have respective characteristic according to the location of faulty switches. This method not only detects the switches of open-circuit fault but identifies the location of faulty switching devices without complicated calculation. The simulation results verify that, based on the proposed method, the fault of sparse matrix converter can be easily and fast detected.
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paper_title: Diagnosis and Tolerant Strategy of an Open-Switch Fault for T-Type Three-Level Inverter Systems

paper_content:

This paper proposes a new diagnosis method of an open-switch fault and fault-tolerant control strategy for T-type three-level inverter systems. The location of the faulty switch can be identified by the average of the normalized phase current and the change of the neutral-point voltage. The proposed fault-tolerant strategy is explained by dividing into two cases: the faulty condition of half-bridge switches and neutral-point switches. The performance of the T-type inverter system improves considerably by the proposed fault-tolerant algorithm when a switch fails. The proposed method does not require additional components and complex calculations. Simulation and experimental results verify the feasibility of the proposed fault diagnosis and fault-tolerant control strategy.
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paper_title: Soft-Switching Topology for a Fault-Tolerant Neutral-Point-Clamped Converter

paper_content:

This paper presents a new three-level topology based on the neutral-point-clamped converter. The new topology includes a fourth leg that provides fault tolerance to the converter. Furthermore, during normal operation mode, this leg is able to provide a stiff neutral voltage. Consequently, the low- frequency voltage oscillations that appear in the neutral point of the standard three-level topology for some operation conditions no longer exist. As a result, the modulation strategy of the three main legs of the converter does not have to take care of voltage balance, and it can be design to improve the efficiency of the converter. On the other hand, the addition of a fourth leg to the converter produces additional losses. However, in order to eliminate switching losses of this leg, all the power devices commutate under zero-current or zero-voltage transitions. Some simulation results are presented to show viability of this approach under both, normal operation mode and fault event.
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paper_title: Fault-Tolerant Matrix Converter Motor Drives With Fault Detection of Open Switch Faults

paper_content:

This paper describes a novel fault-tolerant matrix converter motor drive system which requires an appropriate control strategy and the application of an effective fault detection technique. Two types of fault-tolerant matrix converter, a direct matrix converter and an indirect matrix converter, are proposed for a permanent magnet synchronous motor drive against open-circuit faults in safety-critical applications. A fault-tolerant control strategy is developed in order to maintain the continuous operation of the drive system with satisfactory performance. A high-speed fault detection strategy for detecting and identifying the faulty open-circuited switches located in the fault-tolerant four-phase direct matrix converter is also proposed. Simulation and experimental results are shown to demonstrate the effectiveness of the proposed fault-tolerant matrix converters and the developed fault detection strategy applied to the motor drive system under faulty operating conditions.
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paper_title: Fast power switch failure detection for fault tolerant voltage source inverters using FPGA

paper_content:

The design, implementation, experimental validation and performances of a fully digital fast power switch failure detection and compensation for fault-tolerant voltage source inverters (VSIs) are discussed. The approach introduced minimises the time interval between the fault occurrence and its diagnosis. The possibility to detect a faulty switch or driver of the VSI in less than 10 µs by using simultaneously a ‘time criterion’ and a ‘voltage criterion’ is demonstrated. In order to attain this short detection time a field programmable gate array (FPGA) is used. The studied fault detection method is implemented using a FPGA and experimentally validated for a three-phase VSI used in shunt active filter case. The proposed method tested first by ‘FPGA in the loop’ prototyping has been also validated through a fully experimental active power filter which confirms the satisfactory performances of the proposed approach. Moreover, the other feature introduced in this approach is that the control scheme and the fault-tolerant scheme are both programmed in only one FPGA.
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paper_title: FPGA-Based Reconfigurable Control for Fault-Tolerant Back-to-Back Converter Without Redundancy

paper_content:

In this paper, an FPGA-based fault-tolerant back-to-back converter without redundancy is studied. Before fault occurrence, the fault-tolerant converter operates like a conventional back-to-back six-leg converter, and after the fault, it becomes a five-leg converter. Design, implementation, and experimental verification of an FPGA-based reconfigurable control strategy for this converter are discussed. This reconfigurable control strategy allows the continuous operation of the converter with minimum affection from a fault in one of the semiconductor switches. A very fast detection scheme is used to detect and locate the fault. Implementation of the fault detection and of the fully digital control schemes on a single FPGA is realized, based on a suited methodology for rapid prototyping. FPGA in loop and also experimental tests are carried out, and the results are presented. These results confirm the capability of the proposed reconfigurable control and fault-tolerant structure.
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paper_title: Fault-Tolerant Five-Leg Converter Topology With FPGA-Based Reconfigurable Control

paper_content:

Fast fault detection and reconfiguration of power converters is necessary in electrical drives to prevent further damage and to make the continuity of service possible. On the other hand, component minimized converters may provide the benefits of higher reliability and less volume and cost. In this paper, a new fault-tolerant converter topology is studied. This converter has five legs before the fault occurrence, and after fault detection the converter continues to function with four legs. A very fast fault detection and reconfiguration scheme is presented and studied. Simulations and experimental tests are performed to evaluate the structure requirements, the digital reconfigurable controller, and fault detection scheme. For experimental tests, the control and the fault detection and reconfiguration schemes are implemented on a single field-programmable gate array (FPGA) chip. Experimental and simulation results show the effectiveness of the proposed fault-tolerant topology and its FPGA-based control.
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paper_title: Fault tolerant operation of a five phase converter for PMSM drives

paper_content:

In this paper a five phase fault tolerant converter is proposed for permanent magnet (PM) drives. The proposed configuration is an extension of conventional three phase double switch redundant topologies. In contrast to three phase systems, the proposed configuration has more flexibility and reliability regarding simultaneous faults in more than one phase. Different faulty cases are explained. Optimal reconfiguration strategies are derived under several faulty conditions. Design criteria are defined and a comparative loss analysis is conducted on converter behavior under various conditions. Simulation results are included to validate the theory.
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paper_title: Fault-Tolerant Structure and Modulation Strategies With Fault Detection Method for Matrix Converters

paper_content:

This paper proposes a fault-tolerant matrix converter with reconfigurable structure and modified switch control schemes, along with a fault diagnosis technique for open-circuited switch failures. The proposed fault recognition method can detect and locate a failed bidirectional switch with voltage error signals dedicated to each switch, based on a direct comparison of the input and the output voltages. Following the fault detection, the designed converter architecture isolates the faulty parts and bypasses the remaining load phase, resulting in a 3 × 2 matrix configuration with six bidirectional switches. Based on the reconfigured hardware topology, novel fault-tolerant modulation strategies are developed to produce three-phase balanced sinusoidal output voltages/currents with only six bidirectional switches, but at a reduced output voltage magnitude as compared with the normal matrix converter. Thus, the developed switching function matrices for the reconfigurable converter structure, containing an appropriate positive- and negative-sequence set of matrices with input voltage vector, can preserve continuous operation even after switch failures and improve reliability of the drives.
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Title: Catastrophic failure and fault-tolerant design of IGBT power electronic converters - an overview

Section 1: INTRODUCTION
Description 1: Provide an overview of the significance of IGBT power electronic converters, their reliability, common failure modes, and the importance of studying catastrophic failures.

Section 2: CLASSIFICATION OF IGBT CATASTROPHIC FAILURE
Description 2: Classify the types of IGBT catastrophic failures, including open-circuit failure and short-circuit failure.

Section 3: IGBT CATASTROPHIC FAILURE MECHANISMS
Description 3: Delve into the mechanisms underlying IGBT catastrophic failures, detailing both open-circuit and short-circuit failure modes and their specific causes.

Section 4: FAULT-TOLERANT CIRCUITS
Description 4: Discuss different fault-tolerant circuit designs and topologies that help manage or isolate IGBT catastrophic failure in electronic converters.

Section 5: CONCLUSIONS
Description 5: Summarize the findings on IGBT catastrophic failure mechanisms and fault-tolerant circuit solutions, and highlight the importance of thermal management and future directions for reducing complexity and cost in fault-tolerant designs.