   I am trying to figure out the right thing to do with the
BUSMODE signals on the PMC card I'm designing.  The CMC
specification IEEE P1386/Draft 2.0 section 6.4 discusses the
BUSMODE signals.  I think it works like this:  The Host drives
one or more codes on to the BUSMODE[4:2] signals and reads back
the BUSMODE[1] signal from each slot. Currently 2 modes are
supported PCI (PMC) (mode 1) and SBUS (SMC) (mode 2), as well as
"card present" (mode 0). The Host then enables its bus for the
mode supported by the host and all CMC cards. Presumably this is
done only once, before any bus activity occurs, after which the
BUSMODE signals do not  Since the host bus includes RST* does
this mean this signal may not be driven on power up or while the
host is exercising the BUSMODE signals? It could be, because the
reset pin is the same for PMC and SMC. If not, then should the
card RST* be generated by ((BUSMODE[4:2] not equal [LLH]) or
RST*)?  How about CLK? It should always be driven because the
minimum time for a CMC ca