Radar and sonar applications are signal-processing intensive and
heavily rely on the efficient implementation of such digital
signal-processing (DSP) algorithms as filtering, transforms and
modulation. In past systems, conventional digital signal
processors were used to perform many of these algorithms.
However, field-programmable gate arrays (FPGAs) deliver an order
of magnitude higher performance than traditional DSPs. A key
reason is that an FPGA can side step the classic Von Neumann
architecture's instruction — fetch, load/store bottleneck —
found in most DSPs. Another reason is the FPGA's lower power
consumption.  When approaching the problem of implementing
signal-processing functions within an FPGA, designers have
developed the mindset that these functions must be optimally
coded from the ground up for their application or significantly
modified. However, silicon-optimized, high-precision math
functions are being developed for specific applications as part
of the programmable logic product offering of