perf: Remove the nmi parameter from the swevent and overflow interface

The nmi parameter indicated if we could do wakeups from the current
context, if not, we would set some state and self-IPI and let the
resulting interrupt do the wakeup.

For the various event classes:

  - hardware: nmi=0; PMI is in fact an NMI or we run irq_work_run from
    the PMI-tail (ARM etc.)
  - tracepoint: nmi=0; since tracepoint could be from NMI context.
  - software: nmi=[0,1]; some, like the schedule thing cannot
    perform wakeups, and hence need 0.

As one can see, there is very little nmi=1 usage, and the down-side of
not using it is that on some platforms some software events can have a
jiffy delay in wakeup (when arch_irq_work_raise isn't implemented).

The up-side however is that we can remove the nmi parameter and save a
bunch of conditionals in fast paths.

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Michael Cree <mcree@orcon.net.nz>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: Anton Blanchard <anton@samba.org>
Cc: Eric B Munson <emunson@mgebm.net>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: David S. Miller <davem@davemloft.net>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Jason Wessel <jason.wessel@windriver.com>
Cc: Don Zickus <dzickus@redhat.com>
Link: http://lkml.kernel.org/n/tip-agjev8eu666tvknpb3iaj0fg@git.kernel.org
Signed-off-by: Ingo Molnar <mingo@elte.hu>
void do_reserved_inst(unsigned long error_code, struct pt_regs *regs)
{
	/* Workaround SH5-101 cut2 silicon defect #2815 :
	   in some situations, inter-mode branches from SHcompact -> SHmedia
	   which should take ITLBMISS or EXECPROT exceptions at the target
	   falsely take RESINST at the target instead. */

	unsigned long opcode = 0x6ff4fff0; /* guaranteed reserved opcode */
	unsigned long pc, aligned_pc;
	int get_user_error;
	int trapnr = 12;
	int signr = SIGILL;
	char *exception_name = "reserved_instruction";

	pc = regs->pc;
	if ((pc & 3) == 1) {
		/* SHmedia : check for defect.  This requires executable vmas
		   to be readable too. */
		aligned_pc = pc & ~3;
		if (!access_ok(VERIFY_READ, aligned_pc, sizeof(unsigned long))) {
			get_user_error = -EFAULT;
		} else {
			get_user_error = __get_user(opcode, (unsigned long *)aligned_pc);
		}
		if (get_user_error >= 0) {
			unsigned long index, shift;
			unsigned long major, minor, combined;
			unsigned long reserved_field;
			reserved_field = opcode & 0xf; /* These bits are currently reserved as zero in all valid opcodes */
			major = (opcode >> 26) & 0x3f;
			minor = (opcode >> 16) & 0xf;
			combined = (major << 4) | minor;
			index = major;
			shift = minor << 1;
			if (reserved_field == 0) {
				int opcode_state = (shmedia_opcode_table[index] >> shift) & 0x3;
				switch (opcode_state) {
					case OPCODE_INVALID:
						/* Trap. */
						break;
					case OPCODE_USER_VALID:
						/* Restart the instruction : the branch to the instruction will now be from an RTE
						   not from SHcompact so the silicon defect won't be triggered. */
						return;
					case OPCODE_PRIV_VALID:
						if (!user_mode(regs)) {
							/* Should only ever get here if a module has
							   SHcompact code inside it.  If so, the same fix up is needed. */
							return; /* same reason */
						}
						/* Otherwise, user mode trying to execute a privileged instruction -
						   fall through to trap. */
						break;
					case OPCODE_CTRL_REG:
						/* If in privileged mode, return as above. */
						if (!user_mode(regs)) return;
						/* In user mode ... */
						if (combined == 0x9f) { /* GETCON */
							unsigned long regno = (opcode >> 20) & 0x3f;
							if (regno >= 62) {
								return;
							}
							/* Otherwise, reserved or privileged control register, => trap */
						} else if (combined == 0x1bf) { /* PUTCON */
							unsigned long regno = (opcode >> 4) & 0x3f;
							if (regno >= 62) {
								return;
							}
							/* Otherwise, reserved or privileged control register, => trap */
						} else {
							/* Trap */
						}
						break;
					default:
						/* Fall through to trap. */
						break;
				}
			}
			/* fall through to normal resinst processing */
		} else {
			/* Error trying to read opcode.  This typically means a
			   real fault, not a RESINST any more.  So change the
			   codes. */
			trapnr = 87;
			exception_name = "address error (exec)";
			signr = SIGSEGV;
		}
	}

	do_unhandled_exception(trapnr, signr, exception_name, "do_reserved_inst", error_code, regs, current);
}

void do_reserved_inst(unsigned long error_code, struct pt_regs *regs)
{
	/* Workaround SH5-101 cut2 silicon defect #2815 :
	   in some situations, inter-mode branches from SHcompact -> SHmedia
	   which should take ITLBMISS or EXECPROT exceptions at the target
	   falsely take RESINST at the target instead. */

	unsigned long opcode = 0x6ff4fff0; /* guaranteed reserved opcode */
	unsigned long pc, aligned_pc;
	int get_user_error;
	int trapnr = 12;
	int signr = SIGILL;
	char *exception_name = "reserved_instruction";

	pc = regs->pc;
	if ((pc & 3) == 1) {
		/* SHmedia : check for defect.  This requires executable vmas
		   to be readable too. */
		aligned_pc = pc & ~3;
		if (!access_ok(VERIFY_READ, aligned_pc, sizeof(unsigned long))) {
			get_user_error = -EFAULT;
		} else {
			get_user_error = __get_user(opcode, (unsigned long *)aligned_pc);
		}
		if (get_user_error >= 0) {
			unsigned long index, shift;
			unsigned long major, minor, combined;
			unsigned long reserved_field;
			reserved_field = opcode & 0xf; /* These bits are currently reserved as zero in all valid opcodes */
			major = (opcode >> 26) & 0x3f;
			minor = (opcode >> 16) & 0xf;
			combined = (major << 4) | minor;
			index = major;
			shift = minor << 1;
			if (reserved_field == 0) {
				int opcode_state = (shmedia_opcode_table[index] >> shift) & 0x3;
				switch (opcode_state) {
					case OPCODE_INVALID:
						/* Trap. */
						break;
					case OPCODE_USER_VALID:
						/* Restart the instruction : the branch to the instruction will now be from an RTE
						   not from SHcompact so the silicon defect won't be triggered. */
						return;
					case OPCODE_PRIV_VALID:
						if (!user_mode(regs)) {
							/* Should only ever get here if a module has
							   SHcompact code inside it.  If so, the same fix up is needed. */
							return; /* same reason */
						}
						/* Otherwise, user mode trying to execute a privileged instruction -
						   fall through to trap. */
						break;
					case OPCODE_CTRL_REG:
						/* If in privileged mode, return as above. */
						if (!user_mode(regs)) return;
						/* In user mode ... */
						if (combined == 0x9f) { /* GETCON */
							unsigned long regno = (opcode >> 20) & 0x3f;
							if (regno >= 62) {
								return;
							}
							/* Otherwise, reserved or privileged control register, => trap */
						} else if (combined == 0x1bf) { /* PUTCON */
							unsigned long regno = (opcode >> 4) & 0x3f;
							if (regno >= 62) {
								return;
							}
							/* Otherwise, reserved or privileged control register, => trap */
						} else {
							/* Trap */
						}
						break;
					default:
						/* Fall through to trap. */
						break;
				}
			}
			/* fall through to normal resinst processing */
		} else {
			/* Error trying to read opcode.  This typically means a
			   real fault, not a RESINST any more.  So change the
			   codes. */
			trapnr = 87;
			exception_name = "address error (exec)";
			signr = SIGSEGV;
		}
	}

	do_unhandled_exception(trapnr, signr, exception_name, "do_reserved_inst", error_code, regs, current);
}
