



Whereas previous Intel processors such as the Core 2, Pentium D, Pentium 4, and so on, relied on the Front Side Bus (FSB) to access RAM, the new Core i7 processors do not. The Intel FSB which was used on the Core 2 motherboards allowed for 4 transfers per clock, which in marketing terms Intel referred to as their "Quad-Pumped Front Side Bus."

This meant that the Core 2 Duo E8500 processor which ran on a 333MHz FSB, could perform 1333 million transfers per second. Now, because this FSB was 64-bit wide, the end result was a bandwidth of just 10.6GB/s (1333x8). Here lies Intel’s problem; their current 333MHz FSB supports a peak memory bandwidth of just 10.6GB/s, which is being exceeded by DDR2-800 memory operating in dual-channel mode.

For some time we have known that DDR2-1066 doesn't offer a substantial performance gain over DDR2-800 memory for Core 2 users as DDR2-1066 memory operating in dual-channel mode provides a peak bandwidth of 17GB/s, vastly in excess of the 10.6GB/s limitation of the 333MHz FSB.

Then along came the DDR3 memory standard, which in principle works much like DDR2 memory, just at much greater frequencies. Yet again, DDR3 failed to have much of an impact, even when compared to DDR2 memory operating at just 800MHz. Just like faster DDR2-1066 memory, DDR3-1333 provides a peak bandwidth of 21.3GB/s, while DDR3-1600 reaches 25.6GB/s, both of which exceed the 10.6GB/s limitation of the 333MHz FSB, by miles.

This is the reason at large why DDR3 has failed to get off the ground. But with the new Core i7 platform, DDR3 should finally get its chance to shine. As noted before, the Core i7 features an on-die memory controller with support for triple-channel DDR3 memory. In other words, three DDR3-1333 modules operating together will provide a peak bandwidth of 32GB/s matching the L2 cache performance of a Core 2 Quad Q6600 processor.

Now if you are wondering how the FSB will cope with triple channel memory when it could not even handle dual channel memory, the answer is simple, it’s not! Rather, by using an Integrated Memory Controller (IMC), Intel was able to do away with the old FSB.

So how do the Core i7 processors handle the additional memory bandwidth? Is it put to good use or is it just wasted like on the Core 2 processors? This is what we plan to find out, and while we will be testing a range of frequencies and timings, we will also look at how single, dual, and triple-channel memory impacts the performance of the Core i7 processors.