The New 6500 CPU’s

by Jim  Butterfield Compute! September 1983 | Reproduced with  Jim Butterfield’s permission April 20, 2002: To see the original source document go to the C= Gallery tab,  Magazine Articles, Misc.  Also, you can see the original Commodore / MOS /  CSG 6500 / 6502 and 6509 processor manual on  our C= Gallery, Manuals  page.

MSC_MOS_6501_cpu_top_bottomThe  6502 is a member  of a family of chips. The original family included the 6501 (long since  extinct), the 6502, 6503, 6504, 6505, 6506, and 6507. A parallel branch of the  family comprised the 6512, 6513, 6514, and 6515; these were identical to their  650x counterparts except for the external clock circuitry.  The 6502 is the big  member of the family; it has a ful140 pins. The 6503 to 6507 are cut-down  versions of the same chip, with only 28 pins. Internally, the chips are the  same: the programmer will use exactly the same instructions regardless of which  chip is involved. The practical difference is how the chip is wired, and how  much memory it is able to address.


6502_bookIf the same chip goes into a  6502 and, say, a 6504, why not take the fully-featured processor every time? The  answer is this: if you don’t need the extra pins, you can save money by going  for the small one. Process controllers often need very little memory; savings in  board space and a lesser umber of connections can be quite worthwhile.

Quick And Easy the 6502  burst onto the microprocessor scene in 1976. It was remarkably inexpensive and  seemed to have a very simple internal structure. The  architecture was closest to Motorola’s 6800 microprocessor series, and many  users suspected that the 6502 was a cheap imitation. This proved to be untrue:  the 6502 had special features which made it a landmark in microprocessor design.

The technique which gave the  6502 speed is called “pipelining.” It means that information rolls into the  processor as if it were on a conveyer belt. Before the last piece of information  is digested, the next one is coming in. For the first time, the microprocessor  didn’t need to “stop and think”: new information was rolling in as the old was  being digested. The result: no wasted memory cycles, and amazing speed.

The small number of  registers within the 6502 seemed to be a limitation. It proved not to be:  registers could be loaded and used so quickly that the small number seldom gave  problems. In addition, page zero of memory could be used to hold 16-bit pointers  for “indirect addressing” –in a sense, this provided an extra 128 registers for  the programmer’s use.

6502_programming_booksThe 6502 used the same style  of instructions 1 as the 6800- the simple, traditional data processing  instructions: load, store, add, and test. Programmers found the instructions  easy and natural. The 6502 is relatively easy to program. The New Processors  Recently, new 6500-family processors have come into production. They are still  familiar: the instruction set is the same as before and the addressing modes  haven’t changed. But there are new features, and you’ll be meeting them in the  VlC and in forthcoming Commodore products.

The  6510

The  6510 is a 6502, except  that addresses 0000 and 0001 have special functions. There’s an.input/ output  port built into the chip: eight pins marked Po to P7 are available on the  microprocessor chip itself. Address 0000 is used as the direction register of  the 1/0 port, and 0001 is the port itself. Otherwise, the  6510 is identical to a  6502.

What does this mean in  the Commodore 64?

First of all, locations 0000  and 0001 are no longer; RAM. PET uses these locations to hold the USR jump; on  the Commodore 64, this jump has been moved to address hex 0310 (784 decimal}.  Second, you may use address 0001 to test J and control some of the 64’s  activities. Refer to the memory map in COMPUTE!, October 1982, for details. For  example, you can sense if the cassette tape switch is down by checking PEEK(l)  AND 16. The three lowest-order bits are used for switching out ROM and switching  in RAM. Don’t ever do this from BASIC, and use prudence if you do it from  machine language. More on these bits in a moment.

A little more information on  memory control from address 0001: bit 0, mask 1, controls the BASIC ROM in  addresses AOOO-BFFF. Switch this bit to zero and the BASIC ROM is gone: in its  place is RAM. Now you can write your own language. Bit 1, mask 2, controls the  Kernal ROM in addresses EOOO-FFFF. Switch this bit to zero and the Kernal is  gone; be very careful, since you’ve just 1 switched away all of the programs  that support J interrupts, keyboard, screen, and so on. If you switch off both  bits 0 and 1, you will get a 64K RAM machine: the I/O block will be switched  out, too.

The  6509

The  6509, too, is a 6502  with a change to addresses 0000 and 0001. In this case, the changes are more  profound: they cause a switch to a new memory bank. The 6509 is expected to be  used in the newest CBM products: the PET II {PI28) and the CBM II (B and BX  series).

Both addresses 0000 and 0001  are used to provide access to memory beyond the normal 64K limitation. These  addresses are used to. “bank switch” to one of 16 memory  banks, each of which is 64K in size. Thus, the 6509 can access over one million  memory locations.

6502_booksIf we place a value of zero  to 15 in address 0001, we will influence only one kind of address indirect,  indexed. So if we code LOA #$01:STA $01 we are selecting bank one for indirect  addressing. Now, if we code LOA ($FO), y we will perform the following steps: go  to addresses OOFO and 00Fl in the current bank and get the new address stored  there; add the contents of the y register to this new address; and finally, load  the A register with the contents of the resulting address, from bank one.  Indirect addressing is generally used to obtain or store data; the extra  capability provided.

With address 0001 allows us  to obtain or store a very large amount of data. Address 0000 changes the bank  from which we obtain instructions. If we code LOA #$01:ST A00 we will  immediately start executing instructions from bank one. This is tricky: we have  not umped, so we will start executing from precisely he same address we left in  the other bank. We must carefully write “synchronized” programs so that when we  leave one bank, there will be a program in exactly the right place in the new  bank to allow processing to continue. It’s a good trick, but can be done.

The new chips are still 6500  style. They use the same instructions in exactly the same way but they open up  new possibilities, and we’ll need learn how to cope with them.


The following  is a partial list of products that the 6500 based cpu’s have (and are) used in:

Apple IIc  IIgs


Super  Nintendo


Rockwell  Modems

General  Instruments Set Top Boxes

Micronas  Digital TV Chip Sets

Micronas  Dashboard Controllers

Pace Makers

Click HERE for a much more complete list of MOS 6502 based hardware.

The 7501 / 8501 was used in the Commodore 16, 116, 232, 264, 364 and Plus/4 See the WayBack Machine for references

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