Unit 1d

Creating the Arithmetic Sub-Block

MIPS Integer ALU Arithmetic

Our ALU is required to support four integer arithmetic operations: Signed Addition (ADD), Unsigned Addition(ADDU), Signed Subtraction (SUB), and Unsigned Subtraction (SUBU).\ For signed operations, the inputs and output will be treated as 64-bit signed twos-complement integers.

We can make use of several properties of signed twos-complement numbers to significantly reduce the hardware requirements of our Aritmetic sub-block without significantly decreasing its speed. In fact, we can implement all four of the necessary operations using a single 64-bit adder!

Let's start by examining the signed vs. unsigned issue. MIPS unsigned addition/subtraction is also referred to as addition/subtraction without overflow. The hardware for adding or subtracting twos-complement signed integers and magnitude representation unsigned integers is actually exactly the same. The only difference comes in determining whether or not Overflow occurs. Overflow is the condition where the result of the operations is either too large or too small to be represented in the alotted number of bits (64). For signed numbers, overflow can only occur when adding two numbers of the same sign or subtracting two numbers of opposite signs. It is indicated for addition by the result having the opposite sign of the inputs and in subtraction by the result having the opposite sign of the first input. In unsigned numbers, and overflow would be indicated by a carry-out from the most significant bit. However, since overflow would be ignored anyway in the situations where unsigned arithmetic is used (such as address computations), the MIPS instruction set indicates that overflow is never reported for unsigned arithmetic.

A trickier issue is how we can perform both addition and subtraction with just a single 64-bit adder. The answer comes by restating the operation: A - B = A + (-B). We can negate a twos-complement number by inverting the bits and adding one: (-B) = NOT(B) + 1. So, A - B = A + (-B) = A + NOT(B) + 1. By adding and inverter and a multiplexor (to select B or NOT(B)) in front of the B input we can implement A + B or A + NOT(B) easily. To add one, we take advantage of the fact that our adder has a carry-in. By carrying in a '1', we are effectively adding one to the result. Take it on faith for now that this trick also works out for unsigned (no overflow) subtraction.

To get a more detailed explanation of the ins and outs of binary arithmetic with twos-complement or magnitude unsigned numbers, refer to the beginning of Chapter 4 of Hennessy and Patterson's Computer Organization & Design.

Building the Arithmetic Sub-Block

Simulating the Arithmetic Sub-Block

Before we attempt to compile and simulate the Arithmetic Sub-Block we must make a change to FPGA Advantage. Currently the downstream, or temporary working directory that FPGA Advantage and ModelSim use to place compiled files, is set to the default directory in the COElib library mapping I:\1502\COElib\work. However, since students do not have write access to this directory FPGA Advantage will not be able to compile the add64 component. To change the downstream mapping, go to the Design Manager window and select the Project tab the bottom. Your window will look something similar to Figure 9.

Figure 9

You may have to select the plus symbol next to COElib to expand the tree of library mappings and then select the plus symbol next to Downstream to show the current Downstream mapping for ModelSim. Right-click on Downstream and select "Add Downstream mapping...". You may see the following window. If so, click "Yes".

You will then see the following window. Select "Modelsim", then use the path as shown, but substitute "alpha" for your group name:

Your Design Manager should now look like this:

Figure 10

Now that we have designed the Arithmetic sub-block, we must of course verify that it is functioning correctly. Since we are once again dealing with a fairly small design unit, we will test it by directly stimulating the signals in the simulator and observing the results in the Waves window.

You will need to create a simulation macro file which will run at least one set of vectors to test each possible outcome of each operation:

You may find it helpful when trying to create your test vectors to use the Windows Calculator utility which should be on the Accessories menu. This program allows you to convert between decimal and signed twos-complement binary representations of numbers.

Create and run your test macro to confirm the function of your Arithmetic unit. Comment your macro file to indicate the decimal equivalents of the test vectors as well as the expected values of ArithmeticR, Zero, and Overflow.

When you have finished, you are ready to go on to Implementing the Comparison Sub-Block.