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Cache Memories for PDP-11 Family Computers



One of the most important concepts in computer systems is that of a memory hierarchy. A memory hierarchy is simply a memory system built of two (or more*) memory technologies. The first technology is selected for fast access time and necessarily has a high per-bit cost. Relatively little of the memory system consists of this technology. The second technology is selected for low per-bit cost and necessarily has a slow access time. The bulk of the memory system consists of this technology. The use of the hierarchy is coordinated by user software, system software, or hardware so that the overall characteristics of the memory system approximate the fast access of the fast technology, and the low per-bit cost of the low cost technology. An example of a user software managed hierarchy is core/disk overlaying; an example of a system software managed hierarchy is core/disk demand paging. The prime example of a hardware managed hierarchy is a bipolar cache/core memory system.

Until recently, the concept of cache memory appeared only in very large scale, performance- oriented computer systems such as the IBM 360/85 [Conti, 1969; Conti et al., 1968] and 370 models 155 and larger. Recently a small cache was announced as an option for the DG Eclipse [Data General, 1974] computer system. A larger, internal cache memory is part of a recently announced Digital PDP-l 1 family computer system: the PDP-l 1/70 [DEC, 1975]. The content of this paper is a summary of the re search done on the feasibility of using a bipolar cache/core hierarchy in PDP-l 1 family computer systems.


A cache memory is a small, fast, associative memory located between the central processor Pc and the primary memory Mp. Typically the cache is implemented in bipolar technology while Mp is implemented in MOS or magnetic


* Memory hierarchies can, of course, consist of three or more technologies. Discussion and analysis of these multilevel hierarchies is a fairly obvious generalization of the discussion and analysis given here.


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