Description of some hardware which could be used for the project.


Universal Software Radio Peripheral is a device which allows you to create a software radio. Device is connected to computer via USB or Gigagbit ethernet port. Signal processing is done with software (GNU Radio) in the computer. USRP is designed to allow general purpose computers to function as high bandwidth software radios, it is doing all of the waveform-specific processing, like modulation and demodulation, on the host computer. USRP has an open design and all software, including drivers, is opensource.

USRP consist of a  USRP motherboard and several  USRP daughterboards, which serve as the RF frontend. Doughterboards are Receivers, Transmitters and Transceivers. There can be 2 to 4 daughterboards connected to USRP. There are USRP and USRP2 device, the former is available since September 2008.

USRP works under Linux (2.6 kernel), Windows, Max OS X (PPC and Intel processors), FreeBSD and NetBSD.

GNU Radio is a free software development toolkit that provides the signal processing runtime and processing blocks to implement software radios. GNU Radio applications are primarily written using the Python programming language, while the supplied, performance-critical signal processing path is implemented in C++ using processor floating point extensions where available. Thus, the developer is able to implement real-time, high-throughput radio systems in a simple-to-use, rapid-application-development environment. While not primarily a simulation tool, GNU Radio does support development of signal processing algorithms using pre-recorded or generated data, avoiding the need for actual RF hardware. Under Ubuntu you can install it by package gnuradio.

So for receiving GSM signals you need:

Which is around 700 EUR.

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Field-programmable gate array (FPGA) is a device (usually PCI card) which can be programmed with hardware description language (HDL). HDL is language for formal description of electronic circuits, which can describe the circuit's operation, its design and organization, and tests to verify its operation by means of simulation. FPGA could be programmed to do almost any digital function.

To get FPGA working, you need to describe a "logic function", then you compile it and get the binary file, connect FPGA and upload that file to it.

FPGA costs from 1500 to 2000 USD, but you can also  order some free samples. There are several FPGA producers, but the biggest are Xilinx, Altera, Lattice, Actel and Quicklogic.

 MyHDL is an open source Python package that lets you go from Python to silicon. With MyHDL, you can use Python as a hardware description and verification language. Furthermore, you can convert implementation-oriented MyHDL code to Verilog (hardware description language used to model electronic systems) and VHDL (VHSIC hardware description language, which is used as a design-entry language for FPGA's) automatically.


CUDA is the compute engine in NVIDIA graphics processing units or GPUs, that is accessible to software developers through industry standard programming languages. CUDA is the compute engine in NVIDIA graphics processing units or GPUs, that can be used for computing. CUDA is architected to support all computational interfaces, including C and new open standards like OpenCL and DX11 Compute. Third party wrappers are also available for Python. CUDA API is available Windows, Linux and Mac OS X platform.

There is a project called Pyrit, which aim is to crack WPA-PSK and WPA2-PSK with CUDA compute engine. The performance gain for real-world-attacks is in the range of three orders of magnitude.

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COPACOBANA, the Cost-Optimized Parallel COde Breaker, is an FPGA-based device which is optimized for running cryptanalytical algorithms. COPACOBANA is very fast, cost-optimized and parallelized. Standard VHDL and Verilog code can be compiled and loaded onto COPACOBANA. For instance, to break DES in 6.4 days in average you need 32640 PC's or 1 COPACOBANA, while power consumption of COPACOBANA is also much lower. Cost of device is about 10.000 USD

Timo Gendrullis, Martin Novotny and Andy Ruppiz from Horst Görtz Institute for IT-Security at Ruhr-University Bochum, published a paper  A Real-World Attack Breaking A5/1 within Hours. They found that with the knowledge of only 64 bits of keystream, COPACOBANA is able to reveal the corresponding internal 64-bit state of the cipher in about 7 hours on average.

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