Successful PCB grounding with mixed-signal chips - Part 2: Design to minimize signal-path crosstalk

-September 10, 2012

When we began this series, we observed that board-level designers often have concerns about the proper way to handle grounding for integrated circuits that have separate analog and digital grounds.

Part 1 focused on the basics: where the current flows. We learned that high-frequency signals flow not in the path of least resistance, but in the path of least impedance. We also discussed some fundamental principles of current flow in PCBs with ground planes.

In Part 2 we are now ready to apply these principles to the PCB layout of real-world circuits. We will learn how to place components and route signal traces to minimize problems with crosstalk. In Part 3 we consider power-supply currents and end that section by discussing how to extend what we have learned to circuits with multiple mixed-signal ICs.

Bypass Capacitors Are Important
As mentioned in Part 1, a more complete description of the current flow in any circuit includes the bypass capacitor at each IC and the power source. We start with the simplified two-IC circuit example from Part 1 (Figure 1).

Figure 1: Two-IC circuit with IC2 sourcing the high-frequency current. (See Figure 8 in Part 1 of this article series.)

We then include the bypass capacitors in Figure 2. This diagram shows the current paths with IC1 sourcing.

Figure 2: Complete current paths, IC1 is sourcing.

In this example there is a solid ground plane on a layer adjacent to the signal layer, which is assumed to be the component layer. Power is distributed on this top layer with the large metal traces shown in gray. Connections to the ground plane are made with vias from the green metal section on the signal layer to the ground plane.

The signal currents on the signal/component layer are shown with dashed lines. They are the easiest to understand, as they are strictly confined to the signal traces that we choose to place. The return currents have an entire plane over which they can flow.

Since DC currents will flow through the path of least resistance, we know that the DC return path will go directly from the ground pin of the load device, in this case IC2, to the ground connection of the power source by the shortest distance, a straight line. The high-frequency (transient) currents will flow under the signal trace with a distribution determined by the geometry of the trace and board.

We can dig deeper into the current flow for signals that are in-between cases. Start with frequencies low enough that a significant portion of the current flows from the power source, rather than virtually all of the current flowing from the capacitors. In this case there is still mutual inductance that will force the current to return under the signal trace, but the distribution will, of course, be much wider.

Also, once the return current under the trace reaches the IC, it will not all return to the capacitor ground. Instead, a percentage of the current sourced from the capacitor will return to its ground, while the rest will return to the power source ground. Finally, as the frequency gets lower the mutual inductance will have less and less effect; more current will flow through the DC path.

Fortunately, this in-between case is already managed by our efforts to handle the high-frequency and DC cases, as long as we also do a good job of both bypassing the ICs and distributing power properly. These later two items are really two facets of the same effort.

As the power source is moved farther away from the IC that it powers, the impedance - both resistance and inductance - between the two will increase. This also happens as the trace connecting the two decreases in width. The more impedance between the power source and the IC (remember to include the return impedance) that is exhibited by the interconnect, the more the bypass capacitor will be relied on for supplying lower frequency currents. Thus more capacitance is needed as the power source impedance increases.

So once again we must satisfy the requirement of adequate bypassing of power at the ICs.

For completeness, Figure3 shows the current flow when IC2 is sourcing.

Figure 3: Complete current paths, IC2 sourcing.

Notice the interconnecting trace on the signal/component layer. We only changed the direction of the arrows for the signal current and the AC return current. In this case it is C2, the bypass capacitor for IC2, which supplies the AC signal current through IC2’s VDD pin to the signal pin on IC2. The signal current delivered to IC1 goes to ground through IC1’s ground pin; the AC portion returns on the ground plane under the signal path and the DC portion returns in a straight line to the power source.

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