V22.0436 - Prof. Grishman

Lecture 18: Trends in High-Performance Computer Architecture

Taking advantage of technology improvements


The technology improvements lead to faster transistors and smaller transistors. Faster transistors mean faster clock times. Smaller transistors mean that we can put more transistors on a chip (a Core 2 Duo has about 300M transistors). (Moore's Law -- transistor counts double about every two years.)  What can we do with the increasing number of transistors to improve performance?


Limits of single-thread parallelism

But at some point we approach the limitations of instruction-level parallelism
this limits returns from additional transistors (reductions in CPI).

At the same time we face limitations on clock speed
Together these factors limit overall single-processor performance

Increased performance must come from higher-level (macro) parallelism ... multiple threads running in parallel

Providing multiple threads

Multiple threads can be provided by
If we can effectively use multi-thread parallellism, it may even be beneficial to employ less-than-maximal single-thread-performance
Multithreading (text, sec. 7.5)
Multiple cores per chip