Friday, November 25, 2016

Building a 68000 Single Board Computer - Software

While waiting for the remaining parts, I spent some time getting the software for the board ready.

The Teeside TS2 used a monitor program which is listed in source code form in the book and on the included CD-ROM. The CD-ROM also includes a number of tools including a 68000 cross-assembler and simulator.

The programs are from the late 1980s and were written for MS-DOS (predating Windows). I was able to run the cross-assembler and the simulator under Windows 10 (it needs to be run as Administrator). I was able to run the small version of the monitor called minimon under the simulator. I was also able to run the programs under the Linux program dosbox (an MS-DOS emulator).

I normally use Linux and wanted a native cross-compiler for the 68000 that I could run there. The GNU assembler supports the Motorola 68K family. It is quite easy to build a 68000 cross-assembler under Linux. I followed some instructions I found here. These were the basic steps I followed:

  1. Get GNU binutils, which includes the assembler, by downloading it from
  2. Untar the source archive somewhere.
  3. Configure it using ./configure --target=m68k-elf
  4. Build it using make -j4
  5. Install it using sudo make install

The assembler binary is called m68-elf-as.

You can also build the GNU C compiler if you want to do high-level language programming. Quite a bit of code should fit in the RAM and ROM available. The basic steps I followed to do this are (based on

  1. Get the code
  2. Untar it.
  3. You will need some development tool packages which vary depending on your Linux distribution.
  4. Configure, build, and install it using:

mkdir objdir
cd objdir
../gcc-5.4.0/configure --target=m68k-elf --enable-languages=c --disable-libssp
make -j4
sudo make install

The C compiler binary is m68k-elf-gcc. Many other tools also get built.

I was able to port the TS2 monitor to assemble under the GNU assembler and was able to generate binaries that match the original from the Teesside assembler. The port can be found here on github.

I also wrote some simple code that plan to use when I start to bring up the board - a simple ROM that will do only a little more than freerun mode, like a simple loop or writing to the serial port. This can be found here, but is still a work in progress and untested.

Future projects, if and when the board is up and running, could include trying to get the TUTOR software from Motorola's ECB board running (the TS2 should be compatible with it). It is a little more advanced than the TS2 monitor and includes an assembler than runs on the board, for example.

There are some free implementations of BASIC for the 68000 that could possibly be ported including and

Thursday, November 24, 2016

Building a 68000 Single Board Computer - CPU Freerun on Breadboard

Phase 2 of the project is to breadboard a minimal circuit and get the CPU to run in freerun mode. This also allows testing the power on and pushbutton reset circuits.

The idea of freerun is to get the CPU to execute instructions before the RAM, ROM, and other circuitry is present, by hard wiring the data lines so it continuously reads and executes an instruction. It should then walk through all memory addresses. Often this is done with a NOP (no operation) instruction. Getting the CPU to execute in freerun mode requires minimal circuitry and is a good first step towards getting the system working.

What signals are needed to freerun a 68000? We need:

  • +5V power and ground
  • a clock (CLK) signal
  • proper timing of RESET* and HALT* signals
  • data on the data lines D0 through D15 corresponding to a valid instruction
  • DTACK* pulled low to acknowledge read cycles

The sequence of events in more detail is

  1. RESET* and HALT* need to be asserted and then deasserted to reset the CPU.
  2. The 68000 will do word-size reads from addresses $000000 and $000002 and store the value in the the Supervisor State Pointer (SSP) .
  3. The 68000 will do word-size fetches of the reset vector from addresses $000003 and $000004 and load the program counter (PC).
  4. Execution then starts at the reset vector address read above.
  5. The CPU will fetch instruction words (of varying length) and execute the instruction.
  6. Then it will fetch and execute the next instruction, continuously cycling through memory.

For the 68000, a NOP instruction is $4E71. We can't actually use this because the CPU will read this value as the SSP and RESET vectors, and they need to be even addresses or the CPU will take an odd address exception. If the exception vector address read is also odd, it will then halt the CPU. A convenient value that does work is all zeroes, which corresponds to the instruction ORI.B #0,D0.

Our minimal freerun circuit is basically page 2 of the schematic. In addition we need to pull the 16 data lines low through pulldown resistors to force $0000 on the data bus, and in order to complete the bus cycles we can connect the 68000 AS* output to the DTACK* input.

I built this circuit on a solderless breadboard as in the picture above.

To start, I wired up the clock oscillator. I used a 1 MHz clock oscillator rather than 8 MHz because solderless breadboards don't tend to work well at higher frequencies. I verified it was working with my oscilloscope (which also has a frequency counter).

Then I built the power on reset circuit that uses a 555 timer to generate a suitable RESET pulse on power up. I confirmed that it generated the correct pulse on power on.

Next was the reset pusbutton circuit which uses some cross-coupled NAND gates to generate a clean reset pulse when the button is pressed. This was also working.

Next I wired up the 68000 CPU with the required pullup and pulldown resistors.

A problem I noticed initially with the full circuit was that the 5 volt power supply was dropping too low in voltage. It turned out that the jumper wires and alligator clips I was using were dropping too much voltage. I wired the power supply to the protoboard directly using heavier wires and the voltage then read close to 5.00 volts at the board.

Initial testing shows that the CPU was not executing instructions and was halted, as indicated the HALT* line being asserted (low). I eventually realized that this was because I had omitted the pullup resistors on the RESET* and HALT* lines. They are driven by open collector chips which require pullups to go high. I added the resistors and the CPU started executing in freerun mode. The address lines were toggling correctly at binary rates depending on the address line.

I tried changing the clock oscillator to an 8 MHz unit, and was surprised to find that it still ran. The clock signal was a little rough but this is impressive for a breadboard.

The current draw was 215 mA at 1 MHz and 256 mA at 8 MHz.

I observed the signals on the CPU, which were as follows:

CLK    8 MHz
E      800 kHz, not 50/50 duty cycle (which is normal)
A1     1 MHz
A2     500 kHz
A3     250 kHz
A4     125 kHz
A10    1.95 kHz
A20    2 Hz
AS*    2 MHz pulses
UDS*   "
LDS*   "
R/W*   high (indicating read cycles)
FC0    low  \
FC1    high  > indicating supervisor program
FC2    high /
RESET* high
HALT*  high
BERR*  high

As a test, I pulled data line D0 up. On reset the CPU should then fetch a stack pointer of $00010001 and reset vector of $00010001, causing an odd address exception, double bus fault, and drive HALT* low. This happened as expected.

The power on reset circuit is working correctly, with the CPU starting reliably on powerup. It also reset whenever the switch was pressed.

Connecting AS* to DTACK* was the method suggested in the textbook to get the bus cycles to be completed. An alternate method, which also works, is simply to ground DTACK* (trivia: One of the early manufacturers of 68000-based computers was a company called Dtack Grounded).

An alternate freerun instruction that was suggested in a magazine article I found is $2040, MOVE D0,A0. This requires pulling D6 (pin 63) and D13 (pin 56) high, and the other data lines low. This also worked.

With freerun mode working, I'm ready to move on to the next phase, building more of the circuit on a wirewrapped prototype board. I'm still waiting for my protoboards to arrive before I can start that.

Building a 68000 Single Board Computer - Obtaining Parts

I generated a list of the needed parts with the help of KiCad.

My initial investigation to determine if the project was feasible indicated that some parts are still available new, and the rest should be obtainable as used or NOS (New Old Stock). Most TTL chips, for example, are all readily available. These had to be through-hole parts as I want to keep this a retrocomputing project with vintage parts and not use any modern surface mount components. The majority of parts will be wirewrapped on socketted on a proto board.

I had some parts on hand, and bought a good number of the parts from one vendor, Unicorn Electronics, which carries a lot of older components. They even stocked the RAM, EEPROM, 6850 ACIAs, MC14411 baud rate generator, and 1.8432 MHz crystal.

Other miscellaneous parts were bought individually on eBay. This included:

  • The Motorola 68000 8MHz CPU.
  • An 8 MHz crystal oscillator.
  • Some TTL ICs that I could not get from Unicorn electronics: 74LS06 and 74LS93.
  • A 25LS2548, a somewhat rare chip used for address decoding.
  • SIP pullup resistors and wirewrap wire.

PCB prototype boards suitable for wirewrapping are available cheaply on eBay. I bought a few sizes as I wasn't sure how big the board would end up being.

I wasn't able to find a 64-pin wirewrap circuit. It is a somewhat unusual size for DIP packages. I plan to make one from pieces of smaller sockets.

Prices on eBay are generally good, but ordering from China can mean as much as a couple of months to get the parts. The protoboards are the last to arrive - after almost two months they had not shown up so the seller had to resend them, causing quite a delay in the project. In fact, as of this writing I am still waiting for them. Another delay was a home renovation that meant I was not able to use my workshop for a period of time.

Building a 68000 Single Board Computer - Schematic Entry and Design Changes


The TS2 computer described in Microprocessor Systems Design 68000 Hardware, Software, and Interfacing is a single board computer that is capable of operating on its own (with an external serial terminal). It has the following major features:

  • 8 MHz 68000 microprocessor.
  • Power on and pushbutton reset. LED indicating halt or reset condition.
  • Uses commonly available TTL chips for glue logic (no programmable PALs, GALs, FPGAs, etc.)
  • 32 KB of static RAM.
  • 32 KB of EPROM.
  • Full address decoding for peripherals.
  • Switches and circuitry for single stepping one instruction at a time.
  • Two serial ports to support a terminal and modem/host computer.
  • Interrupt encoding and acknowledge circuitry for 8 levels of interrupts.
  • Buffered signals running to a backplane connector for expansion.
  • On board monitor software that supports downloading, running, and debugging programs.
  • All circuitry on a single board (extended double Eurocard 233.4mm x 220mm/9.2in x 8.7in).

CAD Software

The goal of phase 1 of the project was to create a stable schematic, hopefully free of errors. The schematics in the book were almost complete, but omitted some details like bypass capacitors and it was not always clear what gates were parts of the same package. Some circuitry was duplicated across pages to make it clearer to understand.

I decided to enter a schematic into a modern CAD program so I could review it, print it out, and hopefully take advantage of some design rules checking to identify errors like unconnected signals.

For CAD software I ended up using KiCad, a cross platform and Open Source electronics design automation suite. Some of my requirements were that it would be free, run on Linux, and support basic schematic capture. Overall I found it quite usable. It has a number of quirks, but in my experience all CAD software has usability issues and quite a learning curve and you just have to get used to it. A side benefit was I learned a lot about KiCad, a skill I can reuse on other projects.

Schematic Entry

Entering the schematic, I mostly followed the pages that were in the text book. There were some minor errors and unknowns to figure out. Because many signals get buffered, it was not always clear if signals like AS* were the raw ones on the CPU or the versions coming from buffers. I tried to figure this out as well as possible. I may find errors when I get to testing it.

There were a few errors in pin numbers and some chips were not marked for their type, but I was able to puzzle it out. Since I made some changes to the design, my design is a little different in terms of the parts and their identifiers.

The values of pullup resistors were not all listed. 4.7K seems to be suitable (and is what the Motorola ECB used) so I used this value everywhere.

Some parts are duplicated across pages in the book (like the RESET LED, for example), which helped readers of the book but needed to be corrected in the CAD schematic.

I almost overlooked the fact that there are actually 4 RAM chips and 4 ROM chips! The text shows the circuitry for half of the RAM and ROM, and only in the text does it mention that the circuit is duplicated again using other chip selects.

The original circuit used an 8 MHz clock but provided a divider so the board could run at slower speeds (e.g. 4, 2, 1 MHz) if desired. I didn't see a good reason not to run it at 8 MHz once it got past the breadboard stage. If needed I might plug in a 1 MHz clock oscillator chip in place of 8 MHz for testing purposes.

Circuit Changes

I made a number of changes to simply it and remove features I did not expect to use.

I plan to use EEPROM chips (which are electrically eraseable) rather than EPROMs, which need to be erased under ultravilet light. This will save time when reprogramming them. They are pin compatible with the 2764 EPROMs in the original design.

I didn't implement backplane signals and associated buffering, as I don't expect to expand the board with peripheral cards.

Without any peripherals, there is no need for interrupt encoding and acknowledge circuitry. This could always be added later if needed. One could run two IRQ signals to the two 6850 UARTs, but the monitor software as written does not use interrupts.

I simplified the RS-232 interface, omitting the line drivers and receivers since I plan to directly connect the 6850 UARTs to TTL level FTDI USB to serial convertors. This also allowed removing the requirement for +12 and -12 volt power supplies. I also omitted the strange circuit that can mirror one serial port to the other in a transparent mode as I don't see a need for it.

Design Files

The schematic entry took a while, mostly because I was using KiCad for the first time. I was able to use its rule checker to catch a lot of errors.

The current files are on github here, which also includes the software as it develops. The KiCad files are here where v1 is the original circuit from the book (possibly with some errors) and v2 is the modified design that I am building.

If you don't have KiCad, there is a PDF version of the schematic there but it may not always be entirely up to date as it needs to be manually generated from the design files.

For anyone interested, keep in mind that the circuit (as of this writing) has never been built and tested yet. I will update the design as the project progresses.

Building a 68000 Single Board Computer - High Level Plan

After spending some time studying the schematic and accompanying text in the book, I came up with this overall project plan:

Phase 1:

  1. Enter the schematic into a CAD program, make some changes to simplify it, and check it carefully for errors.
  2. From the schematic, generate a parts list or BOM (bill of materials).
  3. Do a rough layout of the ICs for a wirewrapped prototype to estimate the board size needed.
  4. Find sources for and obtain the majority of the parts needed.

Phase 2:

  1. Breadboard a minimal circuit to get the CPU to run in freerun mode.
  2. Test the power on reset circuit.
  3. Test the pushbutton reset circuit.

Phase 3:

  1. Start building the circuit on a protoboard with wirewrap sockets.
  2. Get the CPU running from ROM (with a test program like a simple loop that will run without any RAM) and minimal chips.
  3. Check ROM, address decoding, DTACK and BERR timing.
  4. Test the single step circuit.

Phase 4:

  1. Add RAM, verify RAM is working with some simple test code.

Phase 5:

  1. Add baud rate generator, serial UARTs, and RS-232 ports.
  2. Program ROMs and get the existing monitor program working.

Phase 6:

  1. Fully test board including all features of the monitor program.
  2. Possibly add more circuitry that was omitted, like interrupt encoding and acknowledge.
  3. Maybe try some other software like Motorola's TUTOR monitor from the ECB board or a BASIC interpreter.
  4. Install in case, maybe add power supply or a 5V regulator.

The thinking is to just make one wirewrapped prototype. I have no plans for a printed circuit board, although that might be a fun project to learn more about PCB layout and might make it easier for others to duplicate the board. The intention is to make all of the design information (both hardware and software) freely available.

Building a 68000 Single Board Computer - Introduction

I recently started a new hardware project that I plan to document here as it progresses.

I've built several retro-computers from kits that use the 6502 and 8080 processors, including the Briel Replica 1Altair 8800, and Superboard III. While most of my work on these systems was with software, for the Replica 1 I did a little hardware design and built a 16K RAM/ROM memory board as well as a 65816 CPU adaptor. In the back of my mind I eventually wanted to do a more ambitious hardware design project.

Another classic CPU is the 68000. Years ago I worked with some 68000-based systems, but mostly programmed them in high-level languages. I always felt it had a very elegant architecture, with the later CPUs in the 68xxx series possibly being the pinnacle of CISC design, before RISC architectures took over.

I bought an excellent book on the 68000: Microprocessor Systems Design 68000 Hardware, Software, and Interfacing by Alan Clements. This is one of the best books on the 68000 in my opinion, covering both software and hardware in some detail.

The book describes a 68000 single board computer called the TS2. It was used for training at the University of Teesside where the author taught. It was similar to, and mostly software compatible with, the Motorola 68000 Educational Computer Board.

I realized that there was enough detail in the book, including schematics and theory of operation, that the board design could be replicated. Unlike some designs in textbooks, this one had actually been built and tested. The book also included on CD-ROM the code for a monitor program for the board so I would not need to write one from scratch.

I felt that designing a 68000 based single board computer from scratch myself was too risky a project, but using an existing design would have a good chance of success. I did see a number of challenges:

  1. While the design was known to work, there were likely some errors or omissions in the schematics in the book as they were hand-drawn and didn't come directly from a CAD system. My copy of the book was the third edition so I thought it likely that there were not too many errors in it.
  2. There was no board layout or even pictures of the assembled board. so I would need to figure out a suitable layout myself. I have not been able to find a picture of a Teesside TS2 anywhere on the Internet.
  3. I would need to determine if I could use the monitor program software on the CD, possibly finding a cross-assembler to build it, and program it in to EPROMs.
  4. I would need to find all of the required parts, many of which are no longer being manufactured.

These challenges all looked surmountable, and even if it got stalled or failed, the project would be a good learning experience, so I decided to go ahead with it.