Logic / Memory

A variety of memory and logic devices, including DRAM (dynamic random access memory), SDRAM (synchronous dynamic random access memory), Flash memory (NAND or NOR), CPU (central processing unit), GPU (graphics processing unit), etc., are widely used in computers, digital music players, gaming devices and mobile internet devices. For instance, since SDRAM was introduced to computers, further generations of SDRAM (DDR1, DDR2 and DDR3) have entered the mass market, with DDR4 currently being designed and anticipated to become available in the coming years.

In the case of stacking multiple devices or heterogeneous devices, chip-to-wafer (C2W) bonding may be preferred over wafer-to-wafer bonding due to yield and interconnection issues, where known-good-dies (KGDs) are attached to the good dies in the bottom device wafer only. Chip-to-wafer bonding through metal-metal thermo-compression mechanisms, such as CuSn IMC (intermetallic compound) bonding or Cu-polymer hybrid bonding, is widely expected to be used for future TSV applications.

With these bonding methods, where the inter-diffusion is proportional to temperature, pressure and time, it is not economically feasible to perform the bonding process at a single-die level. The basic idea behind Advanced Chip-to-Wafer (AC2W) bonding is to split the bonding process into two sub-steps. The temporary pre-bonding with alignment is performed on a typical pick-and-place machine, whereas the permanent bonding of KGDs is performed as a batch process in a dedicated EV Group's AC2W bond chamber.

The permanent bonding process requires a controlled, homogeneous, perpendicular force to be applied on every single chip due to non-uniform distribution of KGDs on the base device wafer. A non-uniform KGD distribution can result in a possible shift in the center of gravity away from the actual center of the bottom substrate. This occurrence requires a controlled shift in the center of applied force during the bonding process in a chamber. A true KGD stacking can be achieved through the control of the center position, the absolute value, and the direction of the applied force, which is the main feature of EV Group's AC2W bonding system.  

Please see our related products EVG®540C2W and our EVG®560 for detailed information.


CuSn IMC bonding. Courtesy of Frauenhofer IZM.

Direct die-to-wafer throughput can be optimized for 3D TSVs with this two-step process. The TSV dice are aligned and placed onto the landing wafer using a pick-and-place tool (top). The fully populated wafer is then moved to a wafer-level bonding tool where pressure and heat are applied simultaneously to all stack dice (bottom). Source EVG.