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Figure 2. Digital System Modules.

Figure 3. Schematic drawing of an inverter used in digital system modules.

shown in Figure 2, were identical to the Laboratory Modules in circuitry, signal levels, and speed range, but they had a different packaging scheme. The System Module packaging was designed for rack mounting and used 22-pin Amphenol connectors at the backs of the modules rather than banana plugs at the front. The 22- pin connectors were originally available only in a soldered connection version, but a taper pin version was later offered. The System Module mounting method was chosen for the PDP-l computer, as it permitted a wired panel of 25 modules to be mounted in a 5-1/4-inch section of standard 19-inch rack.

The circuits used in both module series were based on the M.I.T. Lincoln Laboratory TX-2 computer circuits described in Chapter 4. All of the TX-2 basic circuits were used, except those gates which used emitter followers. The emitter follower gates were not short circuit proof, and it was felt that misplaced patch cords in Laboratory Module configurations or slipping scope probes in System Module configurations would cause a high fatality rate for those circuits.

What follows is a brief review of some of the circuits to indicate how much present day logic design differs from the logic design of 20 years ago. Today designers deal with arithmetic logic units and microprocessors as units, whereas in the early 1960s, single gates and flip-flops were units.

In the early module designs, most logical operations were performed using saturating PNP germanium transistors. While the use of transistors in radios and television sets relies on the linear relationship between base current and emitter-to-collector current to provide the amplification of radio frequency and audio frequency signals, the use of transistors in computer circuits (except those using emitter- coupled logic (ECL)) relies primarily on the behavior of transistors in either the saturated state or the cutoff state. The use of transistors in such circuits can best be appreciated from the simple example shown in Figure 3.

Figure 3 is a schematic drawing of an inverter. When the emitter is at ground and the base lead is brought to a sufficiently negative voltage, the resulting base current will saturate the transistor, effectively connecting the emitter to the collector. If, on the other hand, the base is grounded, then no base current flows, no emitter-to-collector current flows, and the transistor is in the cutoff state. The collector would then assume the voltage of the negative voltage

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