Version 3 (modified by p_tanski, 9 years ago) (diff)


Native Code Generator

For other information related to this page, see:

Overview: Files, Phases


  • compiler/nativeGen/AsmCodeGen.lhs

  • compiler/nativeGen/MachCodeGen.hs

  • compiler/nativeGen/MachInstrs.hs

  • compiler/nativeGen/NCGMonad.hs

  • compiler/nativeGen/PositionIndependentCode.hs

  • compiler/nativeGen/PprMach.hs

  • compiler/nativeGen/RegAllocInfo.hs

  • compiler/nativeGen/RegisterAlloc.hs
    one of the most complicated modules in the NCG, RegisterAlloc manages the allocation of registers for each basic block of Haskell-abstracted assembler code: management involves liveness analysis, allocation or deletion of temporary registers, spilling temporary values to the spill stack (memory) and many other optimisations. Note: much of this detail will be described later; basic block is defined below.

and one header file:

  • compiler/nativeGen/NCG.h

The NCG runs through two main phases: a machine-independent phase and a machine-dependent phase.

The machine-independent phase begins with Cmm blocks. A Cmm block is roughly parallel to a Cmm function or procedure in the same way as a compiler may generate a C function into a block of assembler instructions. Cmm blocks are held as lists of Cmm statements ([CmmStmt], defined in compiler/cmm/Cmm.hs, or type CmmStmts, defined in compiler/cmm/CmmUtils.hs). A machine-specific (assembler) instruction is represented as a Instr. During this phase:

  1. each Cmm block is lazily converted to machine-specific instructions (Instr) operating on an infinite number of registers;

  2. for each basic block (a, contiguous block of instructions with no branches (jumps) in each Cmm block), real registers are lazily allocated based on the number of available registers on the target machine (say, 32 integer and 32 floating-point registers on the PowerPC architecture).
