{"push_id":594676862,"size":33,"distinct_size":33,"ref":"refs/heads/android-tegra3-grouper-3.1-lollipop-release_tegra-l4t-r16-16.5","head":"340b97b94e01171735cebe15f9496046ac609ec3","before":"d19aae9b5deab9b08020ec8bc05260ff31d0c67b","commits":[{"sha":"3376a8c44f8ae0c67e947b1bee873db5e6ba59ef","author":{"email":"b0fd36bffd77ae2a7bf5f33856d0d39bf1c06fbf@nvidia.com","name":"Bitan Biswas"},"message":"hwmon: tegra: improve tsensor accuracy\n\ntsensor driver uses fixed point approximations.\nImproved accuracy of tsensor temperature reading\n- adding support to handle negative temperature to counter\n  conversions and vice-versa\n\nbug 1001632\nbug 999175\n\nSigned-off-by: Bitan Biswas <bbiswas@nvidia.com>\n(cherry picked from commit 86ae0bdc3fbd34a5a1d0e08f7721ed527ddf5408)\n\nChange-Id: I5f6df85611d502a6dda1186234078fe973d7ca75\nReviewed-on: http://git-master/r/100576\nTested-by: Bitan Biswas <bbiswas@nvidia.com>\nReviewed-by: Automatic_Commit_Validation_User\nReviewed-by: Bitan Biswas <bbiswas@nvidia.com>","distinct":true,"url":"https://api.github.com/repos/Ziyann/android_kernel_asus_grouper/commits/3376a8c44f8ae0c67e947b1bee873db5e6ba59ef"},{"sha":"8ae79b0fcdb40e03f851e66c1d9b5aa8c8522531","author":{"email":"b0fd36bffd77ae2a7bf5f33856d0d39bf1c06fbf@nvidia.com","name":"Bitan Biswas"},"message":"ARM: tegra: thermal framework notifier\n\nTegra thermal framework notifier is used to bypass\ndriver callbacks after suspend is initiated.\n\nbug 999175\n\nSigned-off-by: Linqiang Pu <dpu@nvidia.com>\nSigned-off-by: Bitan Biswas <bbiswas@nvidia.com>\n(cherry picked from commit de6b3b3e4b05edf05ceeda820a8aac548a83d410)\n\nChange-Id: I93bee5d6a4e2738db0d4db821035900b64a850be\nReviewed-on: http://git-master/r/108924\nReviewed-by: Automatic_Commit_Validation_User\nReviewed-by: Bitan Biswas <bbiswas@nvidia.com>\nTested-by: Bitan Biswas <bbiswas@nvidia.com>","distinct":true,"url":"https://api.github.com/repos/Ziyann/android_kernel_asus_grouper/commits/8ae79b0fcdb40e03f851e66c1d9b5aa8c8522531"},{"sha":"48ce4f04f656ec24b1a3fdcb8ae51f01ae813c2f","author":{"email":"a5d353cedb0b918b9d2300197d2151f129eff319@nvidia.com","name":"Linqiang Pu"},"message":"hwmon: tsensor: fix system hang in 0C.\n\nChanged the low temp to 0C since 20C is very easy to trigger thermal\nalert under -15C to 15C environment temperature. And the thermal alert\nwill run into endless alert from tsensor_work_func.\n\nAlso revised suspend and resume routine to cancel the work when suspending\nand disable/enable irq.\n\nBug 999175\n\nSigned-off-by: Linqiang Pu <dpu@nvidia.com>\n(cherry picked from commit 6a909bfa690991438be298d4933946a92e4929c4)\n\nChange-Id: Icafc6d5f0164204cc0cb7bea64bef2fadadbfbfd\nReviewed-on: http://git-master/r/111550\nReviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>\nTested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>","distinct":true,"url":"https://api.github.com/repos/Ziyann/android_kernel_asus_grouper/commits/48ce4f04f656ec24b1a3fdcb8ae51f01ae813c2f"},{"sha":"f2526fca7a27c2b966ed6fa0b0d205e6041409a6","author":{"email":"69ead01f7c0a1acac521921ebb34d4a5d4b47c69@nvidia.com","name":"Kamal Kannan Balagopalan"},"message":"watchdog: tegra: Revamp Tegra watchdog support\n\n - Make all CPU watchdogs accessible except WDT0\n - CPU WDT0 is reserved for suspend/resume WDT recovery\n - Fix WDT enable sequence on watchdog driver probe\n\nBug 857748\n\nChange-Id: Ia2d07856c32230ab8c9195fee151af09bce3ddde\nSigned-off-by: Kamal Kannan Balagopalan <kbalagopalan@nvidia.com>\nReviewed-on: http://git-master/r/99780\nReviewed-by: Automatic_Commit_Validation_User\nReviewed-by: Xin Xie <xxie@nvidia.com>\nReviewed-by: Steve Kuo <stevek@nvidia.com>\nReviewed-by: Bharat Nihalani <bnihalani@nvidia.com>","distinct":true,"url":"https://api.github.com/repos/Ziyann/android_kernel_asus_grouper/commits/f2526fca7a27c2b966ed6fa0b0d205e6041409a6"},{"sha":"43fefc75f899b8fc74c2f39beb18d6d1e6db1784","author":{"email":"69ead01f7c0a1acac521921ebb34d4a5d4b47c69@nvidia.com","name":"Kamal Kannan Balagopalan"},"message":"ARM: tegra: wdt: Add support for Tegra3 CPU WDTs\n\nTegra3 adds new CPU watchdog timers. Add device support for the\nCPU WDTs.\n\nBug 857748\n\nChange-Id: I0f99c37fed89879d39667b734654c659fe631aaf\nSigned-off-by: Kamal Kannan Balagopalan <kbalagopalan@nvidia.com>\nReviewed-on: http://git-master/r/108379\nReviewed-by: Varun Colbert <vcolbert@nvidia.com>\nTested-by: Varun Colbert <vcolbert@nvidia.com>","distinct":true,"url":"https://api.github.com/repos/Ziyann/android_kernel_asus_grouper/commits/43fefc75f899b8fc74c2f39beb18d6d1e6db1784"},{"sha":"96020b81ab025b87cf973dc57ba0ea6dff861d36","author":{"email":"b8c5839295c70d1f3cf29b0092c5a5f8d4f22152@nvidia.com","name":"Chandler Zhang"},"message":"arm: tegra: fix power down sequence fps/ame\n\nFix power down sequence to align with POR. FPS, GPIO and\nAME part.\n\nLDO4 tracking is not disabled.\n\nAffcted regs:\n\nFPS_SD3\nFPS_SD2\nFPS_SD1\nFPS_L4\nFPS_L3\nAME_GPIO\nGPIO3\nGPIO4\nCNFG1_L4\nCNFG1SD0\nCNFG1SD1\n\nBug 1001267\n\nChange-Id: I8db160bf00cbe8f215c6e1b762d994d26d82809f\nSigned-off-by: Chandler Zhang <chazhang@nvidia.com>\nReviewed-on: http://git-master/r/109134\nReviewed-by: Automatic_Commit_Validation_User\nReviewed-by: Jinyoung Park <jinyoungp@nvidia.com>\nGVS: Gerrit_Virtual_Submit\nReviewed-by: Sachin Nikam <snikam@nvidia.com>","distinct":true,"url":"https://api.github.com/repos/Ziyann/android_kernel_asus_grouper/commits/96020b81ab025b87cf973dc57ba0ea6dff861d36"},{"sha":"55af1d221a8c90a471453c52fdf56ae57444a097","author":{"email":"69ead01f7c0a1acac521921ebb34d4a5d4b47c69@nvidia.com","name":"Kamal Kannan Balagopalan"},"message":"ARM: tegra: wdt: Replace legacy WDT with CPU WDTs\n\nTegra3 adds new CPU watchdog timers. Replace legacy WDT with\nCPU WDTs in all Tegra3 platforms.\n\nBug 857748\n\nChange-Id: I5bd30687003e6b2ebf09916fbd626d82f0bc0b76\nSigned-off-by: Kamal Kannan Balagopalan <kbalagopalan@nvidia.com>\nReviewed-on: http://git-master/r/109907\nReviewed-by: Varun Colbert <vcolbert@nvidia.com>\nTested-by: Varun Colbert <vcolbert@nvidia.com>","distinct":true,"url":"https://api.github.com/repos/Ziyann/android_kernel_asus_grouper/commits/55af1d221a8c90a471453c52fdf56ae57444a097"},{"sha":"a1d4e09ffcfa1dbc1a639077add2f622a720ca4e","author":{"email":"69ead01f7c0a1acac521921ebb34d4a5d4b47c69@nvidia.com","name":"Kamal Kannan Balagopalan"},"message":"ARM: tegra: wdt: Remove legacy WDT device support\n\nTegra3 adds new CPU watchdog timers. Remove the obsolete legacy\nWDT support for Tegra3\n\nBug 857748\n\nChange-Id: I82478e1b43f22f39c1b8e6e66ae5299ffd079d1b\nSigned-off-by: Kamal Kannan Balagopalan <kbalagopalan@nvidia.com>\nReviewed-on: http://git-master/r/109908\nReviewed-by: Varun Colbert <vcolbert@nvidia.com>\nTested-by: Varun Colbert <vcolbert@nvidia.com>","distinct":true,"url":"https://api.github.com/repos/Ziyann/android_kernel_asus_grouper/commits/a1d4e09ffcfa1dbc1a639077add2f622a720ca4e"},{"sha":"e477a9c518097db7167d73ffb92a863209427b12","author":{"email":"10aa95115916f58bedbd5b79d9adb38837073dcb@gmail.com","name":"Ziyan"},"message":"arch: arm: grouper: Replace legacy WDT with CPU WDTs","distinct":true,"url":"https://api.github.com/repos/Ziyann/android_kernel_asus_grouper/commits/e477a9c518097db7167d73ffb92a863209427b12"},{"sha":"1a37d93cf223664b15d0cb9791ba4082677a0644","author":{"email":"69ead01f7c0a1acac521921ebb34d4a5d4b47c69@nvidia.com","name":"Kamal Kannan Balagopalan"},"message":"ARM: common: fiq_dbg: Spew regs and stack at entry\n\nDump all registers and callstack immediately after entering\nthe FIQ handler.\n\nBug 970018\n\nChange-Id: Iab48f5a942b45015a9def0839cf3ef721dda8a5c\nSigned-off-by: Kamal Kannan Balagopalan <kbalagopalan@nvidia.com>\nReviewed-on: http://git-master/r/110954\nReviewed-by: Automatic_Commit_Validation_User\nReviewed-by: Xin Xie <xxie@nvidia.com>\nReviewed-by: Krishna Reddy <vdumpa@nvidia.com>\nReviewed-by: Steve Kuo <stevek@nvidia.com>\nReviewed-by: Bharat Nihalani <bnihalani@nvidia.com>","distinct":true,"url":"https://api.github.com/repos/Ziyann/android_kernel_asus_grouper/commits/1a37d93cf223664b15d0cb9791ba4082677a0644"},{"sha":"cec2df8eb93bd0842b9eebbd44d23e8cd2de5259","author":{"email":"69ead01f7c0a1acac521921ebb34d4a5d4b47c69@nvidia.com","name":"Kamal Kannan Balagopalan"},"message":"watchdog: tegra: Add support for FIQ debugger\n\nEnable FIQ on 2nd watchdog expiry to make use of FIQ debugger. FIQ\ndebugger can be used to dump call-stack and registers when WDT logic\ntriggers FIQ on 2nd timeout.\n\nBug 970018\n\nChange-Id: Ia2e7f8b136499974ff51f2f0c2ef55704dfe37e1\nSigned-off-by: Kamal Kannan Balagopalan <kbalagopalan@nvidia.com>\nReviewed-on: http://git-master/r/110953\nReviewed-by: Automatic_Commit_Validation_User\nReviewed-by: Xin Xie <xxie@nvidia.com>\nReviewed-by: Steve Kuo <stevek@nvidia.com>\nReviewed-by: Bharat Nihalani <bnihalani@nvidia.com>\n\nConflicts:\n\tdrivers/watchdog/tegra_wdt.c","distinct":true,"url":"https://api.github.com/repos/Ziyann/android_kernel_asus_grouper/commits/cec2df8eb93bd0842b9eebbd44d23e8cd2de5259"},{"sha":"e89f9aa9a776321532159f7ebea61fc7e08e9a23","author":{"email":"b8c5839295c70d1f3cf29b0092c5a5f8d4f22152@nvidia.com","name":"Chandler Zhang"},"message":"input: misc: fix compile time warning\n\nAdd init value for rc in lightsensor_ioctl() to fix compile time\nwarning.\n\nChange-Id: Ifcb953873b5bc861303d9d32b1906a69b2c8311f\nSigned-off-by: Chandler Zhang <chazhang@nvidia.com>\nReviewed-on: http://git-master/r/113121\nReviewed-by: Varun Colbert <vcolbert@nvidia.com>\nTested-by: Varun Colbert <vcolbert@nvidia.com>","distinct":true,"url":"https://api.github.com/repos/Ziyann/android_kernel_asus_grouper/commits/e89f9aa9a776321532159f7ebea61fc7e08e9a23"},{"sha":"47d0695f518d73e19b2ffb1046ebd5e06bbc7833","author":{"email":"c5a74573da66e21cd0e06311793c8ee28ad9d853@nvidia.com","name":"Adam Jiang"},"message":"video: tegra: dtv: Fixed clk disabling issue\n\nAPB clock for dtv logic block should be recorded by dtv_ctx->clk\nhanlder. Otherwise, kernel will trigger a NULL point error in suspend.\n\nFixed Bug 1011149\n\nChange-Id: I5d342ab6fc8ffb71211e370d304b17d5d44eef20\nSigned-off-by: Adam Jiang <chaoj@nvidia.com>\nReviewed-on: http://git-master/r/108743\nReviewed-by: Automatic_Commit_Validation_User\nReviewed-by: Sachin Nikam <snikam@nvidia.com>","distinct":true,"url":"https://api.github.com/repos/Ziyann/android_kernel_asus_grouper/commits/47d0695f518d73e19b2ffb1046ebd5e06bbc7833"},{"sha":"bfcd9db9a119b1f095f55237c0703ad4b8a68649","author":{"email":"c95900ec7691d2458c5304479bf9c15cc4e9da19@nvidia.com","name":"Sanjay Singh Rawat"},"message":"video: tegra: resolve compilation time warnings\n\n- Handled warning of unused label.\n\nbug 949219\n\nChange-Id: I72e22063b199562c4a4c065419c1656e3e8ff7ff\nSigned-off-by: Sanjay Singh Rawat <srawat@nvidia.com>\nReviewed-on: http://git-master/r/113880\nReviewed-by: Automatic_Commit_Validation_User\nReviewed-by: Sachin Nikam <snikam@nvidia.com>","distinct":true,"url":"https://api.github.com/repos/Ziyann/android_kernel_asus_grouper/commits/bfcd9db9a119b1f095f55237c0703ad4b8a68649"},{"sha":"a1c5fcbfad34f072b4162a6664e72b5f410e203c","author":{"email":"c95900ec7691d2458c5304479bf9c15cc4e9da19@nvidia.com","name":"Sanjay Singh Rawat"},"message":"video: tegra: host: resolve compilation time warnings\n\n- Handled warning of, possible use of uninitialized variable and unused\nfunction.\n\nbug 949219\n\nChange-Id: I0d7d345e66774f08e52a12e653a5e7aa6a7a8591\nSigned-off-by: Sanjay Singh Rawat <srawat@nvidia.com>\nReviewed-on: http://git-master/r/113905\nReviewed-by: Sachin Nikam <snikam@nvidia.com>\nReviewed-by: Automatic_Commit_Validation_User","distinct":true,"url":"https://api.github.com/repos/Ziyann/android_kernel_asus_grouper/commits/a1c5fcbfad34f072b4162a6664e72b5f410e203c"},{"sha":"9b148d4a7b2a67b768664b0838e8f6c4b4c2e160","author":{"email":"5dc443513eb9153cbc929f34c471b635ade78bbb@nvidia.com","name":"Songhee Baek"},"message":"video: tegra: host: t30: Add syncpt/epp in ISP ch\n\nThis change is for programming VI and EPP through ISP channel\nto support RGB input and dual video capturing.\n\n1. Added syncpt in the ISP channel to submit the channel.\n2. Added epp clock to use VI2EPP for RGB capture.\n\nNote: To use this channel, EPP should be free from 2D.\n\nBug 988546\n\nChange-Id: I17fe278c9325aac2ea1e29cbaf50c8a4499d8551\nSigned-off-by: Songhee Baek <sbaek@nvidia.com>\nReviewed-on: http://git-master/r/113965\nReviewed-by: Automatic_Commit_Validation_User\nReviewed-by: Bharat Nihalani <bnihalani@nvidia.com>","distinct":true,"url":"https://api.github.com/repos/Ziyann/android_kernel_asus_grouper/commits/9b148d4a7b2a67b768664b0838e8f6c4b4c2e160"},{"sha":"2716741fa59e721450e537fd35cdc042ab3d815f","author":{"email":"afc9ae3e3b2239e3d07b44c03c06cff5572ba0cf@nvidia.com","name":"Victor(Weiguo) Pan"},"message":"crypto: tegra-se: Enable interrupts after clock enable\n\nBecause SE interrupts could be enabled in bootloader, if it's not\ncleared before jumping into kernel, it continues to assert the\ninterrupt line to interrupt controller. When SE interrupts is\nenabled in kernel, to access SE registers in IST without clock\nenabled hung the CPU. To fix this issue, interrupt enabling is\nmoved after clock is enabled.\n\nbug 1010334\n\nChange-Id: I1b909efce2c9d92c3112039fc217f7c1360f9bbb\nReviewed-on: http://git-master/r/113073\n(cherry picked from commit b06e6662f738ad01a3b2b6803db654abaa03385e)\n\nSigned-off-by: Victor(Weiguo) Pan <wpan@nvidia.com>\nChange-Id: Ide4b0295c781e0bba7aa071616e3e6160e44ee76\nReviewed-on: http://git-master/r/114064\nReviewed-by: Automatic_Commit_Validation_User\nReviewed-by: Bharat Nihalani <bnihalani@nvidia.com>","distinct":true,"url":"https://api.github.com/repos/Ziyann/android_kernel_asus_grouper/commits/2716741fa59e721450e537fd35cdc042ab3d815f"},{"sha":"504114159ebecfb5bce526fc22b66d6fef7dab1c","author":{"email":"b0fd36bffd77ae2a7bf5f33856d0d39bf1c06fbf@nvidia.com","name":"Bitan Biswas"},"message":"ARM: tegra: support multiple wake sources with same irq\n\nEarlier implementation only allowed single wake source\nfor a particular irq in wake table. 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