{"action":"closed","issue":{"url":"https://api.github.com/repos/official-stockfish/Stockfish/issues/379","labels_url":"https://api.github.com/repos/official-stockfish/Stockfish/issues/379/labels{/name}","comments_url":"https://api.github.com/repos/official-stockfish/Stockfish/issues/379/comments","events_url":"https://api.github.com/repos/official-stockfish/Stockfish/issues/379/events","html_url":"https://github.com/official-stockfish/Stockfish/issues/379","id":95716928,"number":379,"title":"armv5 target","user":{"login":"emullins","id":7028262,"avatar_url":"https://avatars.githubusercontent.com/u/7028262?v=3","gravatar_id":"","url":"https://api.github.com/users/emullins","html_url":"https://github.com/emullins","followers_url":"https://api.github.com/users/emullins/followers","following_url":"https://api.github.com/users/emullins/following{/other_user}","gists_url":"https://api.github.com/users/emullins/gists{/gist_id}","starred_url":"https://api.github.com/users/emullins/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/emullins/subscriptions","organizations_url":"https://api.github.com/users/emullins/orgs","repos_url":"https://api.github.com/users/emullins/repos","events_url":"https://api.github.com/users/emullins/events{/privacy}","received_events_url":"https://api.github.com/users/emullins/received_events","type":"User","site_admin":false},"labels":[],"state":"closed","locked":false,"assignee":null,"milestone":null,"comments":1,"created_at":"2015-07-17T18:35:44Z","updated_at":"2015-12-18T22:08:08Z","closed_at":"2015-12-18T22:08:08Z","body":"I wanted to propose adding an armv5 target.  Maybe nobody uses this except me, so I'm not sure how important this is.  Anyway, here are the steps I use to compile stockfish on my kirkwood devices (armv5te).\r\n\r\nRegarding step 1, I think that replacement might be preferable even for armv7.  Recent gcc is smart enough to perform that optimization when it encounters __builtin_ctz(), so there should be no need to add the asm and subsequent clz call.  This also applies to MIPS.  But I don't want to hurt any armv7 performance if I'm wrong... Mostly I suggest checking this out and (probably) switching for all ARM.\r\n\r\nStep 2.b is quite specific to the hardware I run and also (less so) to the gcc version I use.  (I use 4.8.x and greater)  So 2.b is probably not recommended to be added in its entirety.  Perhaps -mtune=armv5 would be best here.  Probably -fno-caller-saves is universally useful too.  I don't think PIE matters for armv5 which is why you don't see that anywhere.\r\n\r\nSo here's the steps I take when compiling for kirkwood:\r\n\r\n1) update bitboard.h\r\n\r\n  Replace\r\n\r\n\t\tinline int lsb32(uint32_t v) {\r\n\t\t  __asm__(\"rbit %0, %1\" : \"=r\"(v) : \"r\"(v));\r\n\t\t  return __builtin_clz(v);\r\n\t\t}\r\n\r\n  With\r\n\t\r\n\t\tinline int lsb32(uint32_t v) {\r\n\t\t  return __builtin_ctz(v);\r\n\t\t}\r\n\r\n2) update Makefile\r\n\r\n  a) add configuration for armv5 target somewhere near the similar armv7 conf\r\n\r\n                ifeq ($(ARCH),armv5)\r\n                        arch = armv5\r\n                        prefetch = yes\r\n                        bsfq = yes\r\n                endif\r\n\r\n  b) armv5 CXXFLAGS specific to this device and gcc version\r\n                ifeq ($(arch),armv5)\r\n                        CXXFLAGS += -pipe -march=armv5te -mtune=xscale -fweb -fno-caller-saves -frename-registers -fomit-frame-pointer\r\n                endif\r\n\r\n  c) add armv5 target to the help section near armv7\r\n\r\n                @echo \"armv5                   > ARMv5 32-bit\"\r\n\r\n  d) include armv5 in the sanity check\r\n                @test \"$(arch)\" = \"ppc64\" || test \"$(arch)\" = \"ppc\" || test \"$(arch)\" = \"armv7\" || test \"$(arch)\" = \"armv5\"\r\n\r\n3) build\r\n\r\n  make profile-build ARCH=armv5\r\n"}}