{"push_id":592354136,"size":11,"distinct_size":11,"ref":"refs/heads/master","head":"7ae8350f67eea861280a4cbd2d067777a0e87153","before":"8176a874233eb5180701e2811b38c199369975b2","commits":[{"sha":"c8b71a35289112f77691df0d0b4a97ef19dac87b","author":{"email":"b9e7fec7340b31aada4d612e9bde062018566488@samsung.com","name":"Łukasz Majewski"},"message":"samsung: board: fix: Define loop iterator as an unsigned int to suppress gcc 4.8 warning\n\nThis patch suppress following warning:\n\nboard/samsung/common/board.c:95:32: warning: iteration 4u invokes undefined behavior [-Waggressive-loop-optimizations]\n   addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);\n                                ^\nboard/samsung/common/board.c:94:2: note: containing loop\n\nabout possible signed integer overflow at gcc 4.8.2 (odroid board)\n\nSigned-off-by: Lukasz Majewski <l.majewski@samsung.com>\nSigned-off-by: Minkyu Kang <mk7.kang@samsung.com>","distinct":true,"url":"https://api.github.com/repos/RobertCNelson/u-boot/commits/c8b71a35289112f77691df0d0b4a97ef19dac87b"},{"sha":"a0643e227ad98fbc34b1950ddc6d1d2a0f5aadad","author":{"email":"225d7255cf6430b9f04234470d54bb8bfaacb4ff@samsung.com","name":"Przemyslaw Marczak"},"message":"board: samsung: reserve memory for the secure firmware\n\nSince more than one board requires memory reservation\nfor the secure firmware, the reservation code can be\nmade in a common code.\nNow, to reserve some part of the the last bank,\nboard config should define:\n- CONFIG_TZSW_RESERVED_DRAM - len in bytes\n- CONFIG_NR_DRAM_BANKS - number of memory banks\n\nSigned-off-by: Przemyslaw Marczak <p.marczak@samsung.com>\nCc: Akshay Saraswat <akshay.s@samsung.com>\nCc: Hyungwon Hwang <human.hwang@samsung.com>\nCc: Minkyu Kang <mk7.kang@samsung.com>\nSigned-off-by: Minkyu Kang <mk7.kang@samsung.com>","distinct":true,"url":"https://api.github.com/repos/RobertCNelson/u-boot/commits/a0643e227ad98fbc34b1950ddc6d1d2a0f5aadad"},{"sha":"973ae1e0858d3a1e34f9b33cedab0a344a83c7c8","author":{"email":"225d7255cf6430b9f04234470d54bb8bfaacb4ff@samsung.com","name":"Przemyslaw Marczak"},"message":"Odroid-XU3: enable the last dram bank and reserve 22MiB\n\nThis commit enables the last DRAM bank and reserves\nthe last 22 MiB of it, for the secure firmware.\n\nSigned-off-by: Przemyslaw Marczak <p.marczak@samsung.com>\nCc: Akshay Saraswat <akshay.s@samsung.com>\nCc: Hyungwon Hwang <human.hwang@samsung.com>\nCc: Minkyu Kang <mk7.kang@samsung.com>\nSigned-off-by: Minkyu Kang <mk7.kang@samsung.com>","distinct":true,"url":"https://api.github.com/repos/RobertCNelson/u-boot/commits/973ae1e0858d3a1e34f9b33cedab0a344a83c7c8"},{"sha":"ddb49f3a6c659ee7349a984af2698b440cb786dd","author":{"email":"225d7255cf6430b9f04234470d54bb8bfaacb4ff@samsung.com","name":"Przemyslaw Marczak"},"message":"Odroid U3: use common code for dram reservation\n\nThis commit removes the dram reservation from board file,\nbecause it is done in a common code.\n\nSigned-off-by: Przemyslaw Marczak <p.marczak@samsung.com>\nCc: Minkyu Kang <mk7.kang@samsung.com>\nSigned-off-by: Minkyu Kang <mk7.kang@samsung.com>","distinct":true,"url":"https://api.github.com/repos/RobertCNelson/u-boot/commits/ddb49f3a6c659ee7349a984af2698b440cb786dd"},{"sha":"41060bc58f80472fa8c5aa90d64750508d88a418","author":{"email":"47764aff062bf9ebe98a2274b29052b74a9567e2@konsulko.com","name":"Tom Rini"},"message":"Merge branch 'master' of git://git.denx.de/u-boot-samsung","distinct":true,"url":"https://api.github.com/repos/RobertCNelson/u-boot/commits/41060bc58f80472fa8c5aa90d64750508d88a418"},{"sha":"24a6bc010e7ce00a91c795562058044e9f9d5dc0","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"arm: Reduce the scope of lowlevel_init()\n\nThis function has grown into something of a monster. Some boards are setting\nup a console and DRAM here in SPL. This requires global_data which should be\nset up in one place (crt0.S).\n\nThere is no need for SPL to use s_init() for anything since board_init_f()\nis called immediately afterwards.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/RobertCNelson/u-boot/commits/24a6bc010e7ce00a91c795562058044e9f9d5dc0"},{"sha":"fc8fdc76e72e4ea57a7257e7054ca1a3b0966d34","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"arm: spl: Avoid setting up a duplicate global data structure\n\nThis is already set up in crt0.S. We don't need a new structure and don't\nreally want one in the 'data' section of the image, since it will be empty\nand crt0.S's changes will be ignored.\n\nAs an interim measure, remove it only if CONFIG_DM is not defined. This\nallows us to press ahead with driver model in SPL and allow the stragglers\nto catch up.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/RobertCNelson/u-boot/commits/fc8fdc76e72e4ea57a7257e7054ca1a3b0966d34"},{"sha":"bdfb34167f73afc7e04d52499fc14bc1cd33fec0","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"dm: tegra: Enable driver model in SPL and adjust the GPIO driver\n\nUse the full driver model GPIO and serial drivers in SPL now that these are\nsupported. Since device tree is not available they will use platform data.\n\nRemove the special SPL GPIO function as it is no longer needed.\n\nThis is all in one commit to maintain bisectability.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/RobertCNelson/u-boot/commits/bdfb34167f73afc7e04d52499fc14bc1cd33fec0"},{"sha":"db910353a126d84fe8dff7a694ea792f50fcfb6a","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"arm: spl: Allow board_init_r() to run with a larger stack\n\nAt present SPL uses a single stack, either CONFIG_SPL_STACK or\nCONFIG_SYS_INIT_SP_ADDR. Since some SPL features (such as MMC and\nenvironment) require a lot of stack, some boards set CONFIG_SPL_STACK to\npoint into SDRAM. They then set up SDRAM very early, before board_init_f(),\nso that the larger stack can be used.\n\nThis is an abuse of lowlevel_init(). That function should only be used for\nessential start-up code which cannot be delayed. An example of a valid use is\nwhen only part of the SPL code is visible/executable, and the SoC must be set\nup so that board_init_f() can be reached. It should not be used for SDRAM\ninit, console init, etc.\n\nAdd a CONFIG_SPL_STACK_R option, which allows the stack to be moved to a new\naddress before board_init_r() is called in SPL.\n\nThe expected SPL flow (for CONFIG_SPL_FRAMEWORK) is documented in the README.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>\nFor version 1:\nAcked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>\nReviewed-by: Stefan Roese <sr@denx.de>\nTested-by: Bo Shen <voice.shen@atmel.com>\nAcked-by: Bo Shen <voice.shen@atmel.com>\nAcked-by: Heiko Schocher <hs@denx.de>\nTested-by: Heiko Schocher <hs@denx.de>\n\nSigned-off-by: Tom Rini <trini@konsulko.com>","distinct":true,"url":"https://api.github.com/repos/RobertCNelson/u-boot/commits/db910353a126d84fe8dff7a694ea792f50fcfb6a"},{"sha":"905949190d4df7fc5b7c4f3e96adf219e65cad78","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"Make export interface support CONFIG_SYS_MALLOC_SIMPLE\n\nWhen CONFIG_SYS_MALLOC_SIMPLE is defined, free() is a static inline. Make\nsure that the export interface still builds in this case.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/RobertCNelson/u-boot/commits/905949190d4df7fc5b7c4f3e96adf219e65cad78"},{"sha":"7ae8350f67eea861280a4cbd2d067777a0e87153","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"ti: armv7: Move SPL SDRAM init to the right place, drop unused CONFIG_SPL_STACK\n\nCurrently in some cases SDRAM init requires global_data to be available\nand soon this will not be available prior to board_init_f().  Adjust the\ncode paths in these cases to be correct.  In some cases we had the SPL\nstack be in DDR as we might have large stacks (due to Falcon Mode +\nEnvironment).  In these cases switch to CONFIG_SPL_STACK_R.  In other\ncases we had simply been setting CONFIG_SPL_STACK into SRAM.  In these\ncases we no longer need to (CONFIG_SYS_INIT_SP_ADDR is used and is also\nin SRAM) so drop those lines.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>\nTested on Beagleboard, Beagleboard xM\nTested-by: Matt Porter <mporter@konsulko.com>\nTested on Beaglebone Black, AM43xx GP EVM, OMAP5 uEVM, OMAP4 Pandaboard\nTested-by: Tom Rini <trini@konsulko.com>\nSigned-off-by: Tom Rini <trini@konsulko.com>\nReviewed-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/RobertCNelson/u-boot/commits/7ae8350f67eea861280a4cbd2d067777a0e87153"}]}