{"push_id":675331973,"size":1000,"distinct_size":0,"ref":"refs/heads/master","head":"c068b91ae1d6633e8ed4c938ad50671abd445d10","before":"9ed816ae52d7435a7894ff79dc4118127782c0a7","commits":[{"sha":"3d09e0e55093ecb569a5c7009f105a1b4a257e89","author":{"email":"8800578b51f022c8d8adb9606a8b3db4fedbdac6@hanshq.net","name":"Hans Wennborg"},"message":"Drop Dragonegg support from the release script\n\nIt doesn't have a maintainer and none of the release testers test it,\nso I don't think it should be part of the release.\n\nhttp://reviews.llvm.org/D9331\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236077 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/dylanmckay/llvm/commits/3d09e0e55093ecb569a5c7009f105a1b4a257e89"},{"sha":"5c9b6dbb73c55a7858cc2afd637ee267d2c18e70","author":{"email":"b1c1d8736f20db3fb6c1c66bb1455ed43909f0d8@filcab.net","name":"Filipe Cabecinhas"},"message":"Use the ArrayType member function for array element types.\n\nArrayType and StructType accept the same types, so no test.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236078 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/dylanmckay/llvm/commits/5c9b6dbb73c55a7858cc2afd637ee267d2c18e70"},{"sha":"99ebc9e0046475e40d4d72c0c13612331786664a","author":{"email":"b1c1d8736f20db3fb6c1c66bb1455ed43909f0d8@filcab.net","name":"Filipe Cabecinhas"},"message":"Check that we have a valid PointerType element type before calling get()\n\nSame as r236073 but for PointerType.\n\nBug found with AFL fuzz.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236079 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/dylanmckay/llvm/commits/99ebc9e0046475e40d4d72c0c13612331786664a"},{"sha":"fe7b8737439be221fa98c40e4db17b654e28619a","author":{"email":"b1c1d8736f20db3fb6c1c66bb1455ed43909f0d8@filcab.net","name":"Filipe Cabecinhas"},"message":"Use an \"early return\" idiom for the error case. NFC\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236080 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/dylanmckay/llvm/commits/fe7b8737439be221fa98c40e4db17b654e28619a"},{"sha":"af049033be00ab1d29235ae5728c9a23370aeb1f","author":{"email":"8800578b51f022c8d8adb9606a8b3db4fedbdac6@hanshq.net","name":"Hans Wennborg"},"message":"Drop Dragonegg from the release export script\n\nFollow-up to r236077.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236081 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/dylanmckay/llvm/commits/af049033be00ab1d29235ae5728c9a23370aeb1f"},{"sha":"ed5293c2e919423c0d6d3cc1469ef74565f637ab","author":{"email":"0c9ca018c303606191d06dd2c0bdf1206717c3f3@gmail.com","name":"Craig Topper"},"message":"[TableGen] Use range-based for loops. NFC\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236083 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/dylanmckay/llvm/commits/ed5293c2e919423c0d6d3cc1469ef74565f637ab"},{"sha":"a2b90dc078f95af581aebd052989986b96d2b21c","author":{"email":"92f0075cc843baaa8e5be141782d35ca2fb90d2d@intel.com","name":"Elena Demikhovsky"},"message":"fixed comments, blanks, nullptr; NFC\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236086 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/dylanmckay/llvm/commits/a2b90dc078f95af581aebd052989986b96d2b21c"},{"sha":"134e2e75b35a06e360813704bbb3ae655c5388aa","author":{"email":"0c9ca018c303606191d06dd2c0bdf1206717c3f3@gmail.com","name":"Craig Topper"},"message":"[TableGen] Replace some dyn_casts followed by an assert with just a regular cast which asserts internally. NFC\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236087 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/dylanmckay/llvm/commits/134e2e75b35a06e360813704bbb3ae655c5388aa"},{"sha":"ac9abe5e992024f905475927ec72c9a19bfcda9c","author":{"email":"0c9ca018c303606191d06dd2c0bdf1206717c3f3@gmail.com","name":"Craig Topper"},"message":"[TableGen] Fold a couple dyn_casts into the ifs that check their results. NFC\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236088 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/dylanmckay/llvm/commits/ac9abe5e992024f905475927ec72c9a19bfcda9c"},{"sha":"40048e70d7a63ab64df3d0e52107f3c0e3472571","author":{"email":"0c9ca018c303606191d06dd2c0bdf1206717c3f3@gmail.com","name":"Craig Topper"},"message":"[TableGen] Use range-based for loops. NFC.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236089 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/dylanmckay/llvm/commits/40048e70d7a63ab64df3d0e52107f3c0e3472571"},{"sha":"5470fb03387f3ec3365eabac2a4e4f188268ec08","author":{"email":"92f0075cc843baaa8e5be141782d35ca2fb90d2d@intel.com","name":"Elena Demikhovsky"},"message":"Fixed masked gather/scatter switch-case\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236092 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/dylanmckay/llvm/commits/5470fb03387f3ec3365eabac2a4e4f188268ec08"},{"sha":"fbb2bab1e4e97dceed36362da77fa44782bc9ffc","author":{"email":"92f0075cc843baaa8e5be141782d35ca2fb90d2d@intel.com","name":"Elena Demikhovsky"},"message":"fixed 80-chars; NFC\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236093 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/dylanmckay/llvm/commits/fbb2bab1e4e97dceed36362da77fa44782bc9ffc"},{"sha":"5be17c48fb868e5b687eaeb20aeaf094592dd97f","author":{"email":"63d2f5b83af4588daa5f22a2170797a353b6620c@imgtec.com","name":"Toma Tabacu"},"message":"[mips] [IAS] Inline assemble-time shifting out of createLShiftOri. NFC.\n\nSummary:\nDo the assemble-time shifts from createLShiftOri at the source, which groups all the shifting together, closer to the main logic path, and\nstore the results in concisely-named variables to improve code clarity.\n\nReviewers: dsanders\n\nReviewed By: dsanders\n\nSubscribers: llvm-commits\n\nDifferential Revision: http://reviews.llvm.org/D8973\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236096 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/dylanmckay/llvm/commits/5be17c48fb868e5b687eaeb20aeaf094592dd97f"},{"sha":"b6d2c5a95258adebb2296bd4edd118bbf1168fad","author":{"email":"157f0aa387af74e0e19b139f9b56b9a20fc05454@imgtec.com","name":"Daniel Sanders"},"message":"[mips] Correct 128-bit shifts on 64-bit targets.\n\nSummary:\nThe existing code was correct for 32-bit GPR's but not 64-bit GPR's. It now\naccounts for both cases.\n\nReviewers: vkalintiris\n\nReviewed By: vkalintiris\n\nSubscribers: llvm-commits, mohit.bhakkad, sagar\n\nDifferential Revision: http://reviews.llvm.org/D9337\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236099 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/dylanmckay/llvm/commits/b6d2c5a95258adebb2296bd4edd118bbf1168fad"},{"sha":"e28f663f71ff49a79b458f7c642906d13c5a0472","author":{"email":"6b31706989f3cf9466bfddbf48eab0c43e646ba8@gmail.com","name":"Rafael Espindola"},"message":"Don't constrain the section order in tests that don't depend on it.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236102 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/dylanmckay/llvm/commits/e28f663f71ff49a79b458f7c642906d13c5a0472"},{"sha":"56d0e0051513e0be2ca29dd52bc6bbc0373f3705","author":{"email":"d1d6fcc54c3fa761ad24d0db0db020ec8aa5f5ca@imgtec.com","name":"Vasileios Kalintiris"},"message":"Mips fast-isel - handle functions which return i8 or i6 .\n\nSummary: Allow Mips fast-isel to handle functions which return i8/i16 signed/unsigned.\n\nTest Plan:\nMake check tests are forthcoming.\nAlready passes test-suite at O0/O2 for Mips 32 r1/r2\n\nReviewers: dsanders, rkotler\n\nSubscribers: llvm-commits, rfuhler\n\nDifferential Revision: http://reviews.llvm.org/D6765\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236103 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/dylanmckay/llvm/commits/56d0e0051513e0be2ca29dd52bc6bbc0373f3705"},{"sha":"4389f0be7350303a366bf936e195d2e6a76d2e2a","author":{"email":"6b31706989f3cf9466bfddbf48eab0c43e646ba8@gmail.com","name":"Rafael Espindola"},"message":"Relax assert to avoid spurious failures with /dev/null.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236106 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/dylanmckay/llvm/commits/4389f0be7350303a366bf936e195d2e6a76d2e2a"},{"sha":"0e13ba820808273d6515f4894be4cb0c05f509f6","author":{"email":"a6a97665bebbe7020828dae03f9b588f719350c6@google.com","name":"James Y Knight"},"message":"Sparc: Prefer reg+reg address encoding when only one register used.\n\nReg+%g0 is preferred to Reg+imm0 by the manual, and is what GCC produces.\n\nFuthermore, reg+imm is invalid for the (not yet supported) \"alternate\naddress space\" instructions.\n\nDifferential Revision: http://reviews.llvm.org/D8753\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236107 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/dylanmckay/llvm/commits/0e13ba820808273d6515f4894be4cb0c05f509f6"},{"sha":"b26cc705b0ef3540c4deaaa497c8519cdf66e408","author":{"email":"0ee21e7adbc0df4a5a950a840013dacc99ef5b6b@imgtec.com","name":"Zoran Jovanovic"},"message":"[mips][microMIPSr6] Implement ADD, ADDU and ADDIU instructions\nDifferential Revision: http://reviews.llvm.org/D8704\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236111 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/dylanmckay/llvm/commits/b26cc705b0ef3540c4deaaa497c8519cdf66e408"},{"sha":"3cf9e970d3ffaf8b591a7c2783769af8e2fe83fe","author":{"email":"0ee21e7adbc0df4a5a950a840013dacc99ef5b6b@imgtec.com","name":"Zoran Jovanovic"},"message":"[mips][microMIPSr6] Implement SUB and SUBU instructions\nDifferential Revision: http://reviews.llvm.org/D8764\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236118 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/dylanmckay/llvm/commits/3cf9e970d3ffaf8b591a7c2783769af8e2fe83fe"}]}