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All of these are taken\nby mirroring v8i16 test cases across both 128-bit lanes. This should\nhighlight problems where we aren't correctly using 128-bit shuffles to\nimplement things.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230750 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/loganchien/llvm/commits/f5651f8ab67421585fc7caaa04e4fe6ef80fd2c8"},{"sha":"8c71e440a23fc6ae98a3c30eafe000ea37fd2112","author":{"email":"420c9fb3407b8e11ac322a0e7703f7b1f526df04@gmail.com","name":"Chandler Carruth"},"message":"[x86] Make the v8i16 clever single-input shuffle lowering usable for\nrepeated 128-bit lane shuffles of wider vector types and use it to lower\n256-bit v16i16 vector shuffles where applicable.\n\nThis should let us perfectly lowering the pattern of pshuflw and pshufhw\neven for AVX2 256-bit patterns.\n\nI've not added AVX-512 support, but it should be trivial for someone\nworking on that to wire up.\n\nNote that currently this generates bad, long shuffle chains because we\ndon't combine 256-bit target shuffles. The subsequent patches will fix\nthat.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230751 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/loganchien/llvm/commits/8c71e440a23fc6ae98a3c30eafe000ea37fd2112"},{"sha":"2d58cc5f1bfa05f29f6b696fe4bd834c78504e83","author":{"email":"420c9fb3407b8e11ac322a0e7703f7b1f526df04@gmail.com","name":"Chandler Carruth"},"message":"[x86] Teach a bunch of the x86-specific shuffle combining to work with\n256-bit vectors as well as 128-bit vectors. Fixes some of the redundant\nshuffles for v16i16.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230752 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/loganchien/llvm/commits/2d58cc5f1bfa05f29f6b696fe4bd834c78504e83"},{"sha":"c4179ffed3d046c30824ce3807780fa509883e2e","author":{"email":"420c9fb3407b8e11ac322a0e7703f7b1f526df04@gmail.com","name":"Chandler Carruth"},"message":"[x86] Run most of the rest of the shuffle combining over non-128-bit\nvectors. This lets us fix the rest of the v16 lowering problems when\npshufb is clearly better.\n\nWe might still be able to improve some of the lowerings by enabling the\nother combine-based rewriting to fire for non-128-bit vectors, but this\nat least should remove any regressions from using the fancy v16i16\nlowering strategy.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230753 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/loganchien/llvm/commits/c4179ffed3d046c30824ce3807780fa509883e2e"},{"sha":"8407da0dbccbb49e9d8b4e12931f3a5b67623b11","author":{"email":"15ca74a11a0ab8a7615bd8f2695eec9feb05b533@imgtec.com","name":"Petar Jovanovic"},"message":"Pass correct -mtriple for krait-cpu-div-attribute.ll\n\nNot passing mtriple for one of the tests caused a regression failure\non MIPS buildbot. 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