{"push_id":711192949,"size":121,"distinct_size":1,"ref":"refs/heads/topics/soc/picoxcell-machine","head":"44c7cdbd4bce7844dbb644896dfb34d59d90f8f6","before":"55eac03864e3e71ab5261ea2ef674cbdc9c037fc","commits":[{"sha":"4ce98c0a20befbcac7953edd05dca2180ade88d6","author":{"email":"e5c0b4cdf99ae1d408b9c497159e74b54e02e008@ti.com","name":"Peter Ujfalusi"},"message":"dmaengine: omap-dma: Add support for memcpy\n\nThe sDMA controller is capable of performing memory copy operation. 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Add the proper\nconfig data and compatible string to support it.\n\nSigned-off-by: Jens Kuske <jenskuske@gmail.com>\nAcked-by: Maxime Ripard <maxime.ripard@free-electrons.com>\nSigned-off-by: Vinod Koul <vinod.koul@intel.com>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/f008db8c00c18d3125ca551e6961e7bd9aba6503"},{"sha":"56f13c0d9524c5816f5dc9c91b9d766d6b1064ca","author":{"email":"e5c0b4cdf99ae1d408b9c497159e74b54e02e008@ti.com","name":"Peter Ujfalusi"},"message":"dmaengine: of_dma: Support for DMA routers\n\nDMA routers are transparent devices used to mux DMA requests from\nperipherals to DMA controllers. They are used when the SoC integrates more\ndevices with DMA requests then their controller can handle.\nDRA7x is one example of such SoC, where the sDMA can hanlde 128 DMA request\nlines, but in SoC level it has 205 DMA requests.\n\nThe of_dma_router will be registered as of_dma_controller with special\nxlate function and additional parameters. The driver for the router is\nresponsible to craft the dma_spec (in the of_dma_route_allocate callback)\nwhich can be used to requests a DMA channel from the real DMA controller.\nThis way the router can be transparent for the system while remaining generic\nenough to be used in different environments.\n\nSigned-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>\nSigned-off-by: Vinod Koul <vinod.koul@intel.com>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/56f13c0d9524c5816f5dc9c91b9d766d6b1064ca"},{"sha":"73f67d35b5b96eaf6c5d90fc10527c15b135eda2","author":{"email":"e5c0b4cdf99ae1d408b9c497159e74b54e02e008@ti.com","name":"Peter Ujfalusi"},"message":"Documentation: devicetree: dma: Binding documentation for TI DMA crossbar\n\nThe DRA7x has more peripherals with DMA requests than the sDMA can handle:\n205 vs 127. All DMA requests are routed through the DMA crossbar, which can\nbe configured to route selected incoming DMA requests to specific request\nline of the DMA controller.\n\nSigned-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>\nSigned-off-by: Vinod Koul <vinod.koul@intel.com>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/73f67d35b5b96eaf6c5d90fc10527c15b135eda2"},{"sha":"341ce712868d90fd68cc4635b7c9963a026f9207","author":{"email":"e5c0b4cdf99ae1d408b9c497159e74b54e02e008@ti.com","name":"Peter Ujfalusi"},"message":"dmaengine: omap-dma: Use defines for dma channels and request count\n\nInstead of magic numbers in the code, use define for number of logical DMA\nchannels and DMA requests.\n\nSigned-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>\nSigned-off-by: Vinod Koul <vinod.koul@intel.com>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/341ce712868d90fd68cc4635b7c9963a026f9207"},{"sha":"de506089e78bc7cea77c64a836f6cfc7fa592219","author":{"email":"e5c0b4cdf99ae1d408b9c497159e74b54e02e008@ti.com","name":"Peter Ujfalusi"},"message":"dmaengine: omap-dma: Take DMA request number from DT if it is available\n\nUse the dma-requests property from DT to get the number of DMA requests.\nIn case of legacy boot or failure to find the property, use the default\n127 as number of requests.\n\nSigned-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>\nSigned-off-by: Vinod Koul <vinod.koul@intel.com>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/de506089e78bc7cea77c64a836f6cfc7fa592219"},{"sha":"eea531ea4147f60708c7ee9e53b5735ec387adb6","author":{"email":"e5c0b4cdf99ae1d408b9c497159e74b54e02e008@ti.com","name":"Peter Ujfalusi"},"message":"dmaengine: omap-dma: Remove mapping between virtual channels and requests\n\nDo not direct map the virtual channels to sDMA request number. When the\nsDMA is behind of a crossbar this direct mapping can cause situations when\ncertain channel can not be requested since the crossbar request number\nwill no longer match with the sDMA request line.\nThe direct mapping for virtual channels with HW request lines will make it\nharder to implement MEM_TO_MEM mode for the driver.\n\nSigned-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>\nSigned-off-by: Vinod Koul <vinod.koul@intel.com>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/eea531ea4147f60708c7ee9e53b5735ec387adb6"},{"sha":"8a32222693af0edf4ad0ed2c6c4c9e383fd922dd","author":{"email":"e5c0b4cdf99ae1d408b9c497159e74b54e02e008@ti.com","name":"Peter Ujfalusi"},"message":"dmaengine: omap-dma: Reduce the number of virtual channels\n\nSince the mapping between the hardware request lines and channels has been\nremoved it no longer make sense to have too many channels.\nSet the number of channels to match with the number of logical channels\nsupported by sDMA.\n\nSigned-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>\nSigned-off-by: Vinod Koul <vinod.koul@intel.com>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/8a32222693af0edf4ad0ed2c6c4c9e383fd922dd"},{"sha":"a074ae38f859b90bd259f5df43784834b44412d1","author":{"email":"e5c0b4cdf99ae1d408b9c497159e74b54e02e008@ti.com","name":"Peter Ujfalusi"},"message":"dmaengine: Add driver for TI DMA crossbar on DRA7x\n\nThe DRA7x has more peripherals with DMA requests than the sDMA can handle:\n205 vs 127. All DMA requests are routed through the DMA crossbar, which can\nbe configured to route selected incoming DMA requests to specific sDMA\nrequest.\n\nSigned-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>\nSigned-off-by: Vinod Koul <vinod.koul@intel.com>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/a074ae38f859b90bd259f5df43784834b44412d1"},{"sha":"e1031dc1f7ba5c8724ba211062134076df292791","author":{"email":"2d324f4ca95610bde432fa2af2f28cd21110687d@free-electrons.com","name":"Maxime Ripard"},"message":"dmaengine: Support different source and destination stride\n\nIn interleaved mode, we can expect to have different source and destination\nstrides.\n\nAdd support for such case to dmaengine.\n\nSigned-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>\nSigned-off-by: Vinod Koul <vinod.koul@intel.com>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/e1031dc1f7ba5c8724ba211062134076df292791"},{"sha":"ee0fe35c8dcde29e7f65c34c286378750c075bf3","author":{"email":"2d324f4ca95610bde432fa2af2f28cd21110687d@free-electrons.com","name":"Maxime Ripard"},"message":"dmaengine: xdmac: Handle descriptor's view 3 registers\n\nThe XDMAC DMA controller uses a concept of views to be able to handle\ndescriptors of different sizes.\n\nSo far, only the views 1 and 2 were handled by the driver. Unfortunately, we\nneed some of the configuration fields found in the view 3 in order to support\nmemset and interleaved transfers.\n\nAdd the definition for the view 3 registers, and the needed code to handle view\n3 descriptors.\n\nSigned-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>\nAcked-by: Ludovic Desroches <ludovic.desroches@atmel.com>\nSigned-off-by: Vinod Koul <vinod.koul@intel.com>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/ee0fe35c8dcde29e7f65c34c286378750c075bf3"},{"sha":"f0816a36887b5b6acb387d8a554c5f5ed4069d33","author":{"email":"2d324f4ca95610bde432fa2af2f28cd21110687d@free-electrons.com","name":"Maxime Ripard"},"message":"dmaengine: xdmac: Add function to align width\n\nThe code has some logic to compute the burst width according to the alignment\nof the address we're using.\n\nMove that in a function of its own to reduce code duplication.\n\nSigned-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>\nAcked-by: Ludovic Desroches <ludovic.desroches@atmel.com>\nSigned-off-by: Vinod Koul <vinod.koul@intel.com>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/f0816a36887b5b6acb387d8a554c5f5ed4069d33"},{"sha":"0d0ee751f7f7cd7d44eeb596f3b430ed0b178e07","author":{"email":"2d324f4ca95610bde432fa2af2f28cd21110687d@free-electrons.com","name":"Maxime Ripard"},"message":"dmaengine: xdmac: Rework the chaining logic\n\nSo far, we were setting the NDE bit in our descriptors through some logic to\ntry to see if we were the last descriptor in the chain.\n\nHowever, that was turning out to be rather complex to get right, while this\ninformation is also available when we actually chain a new descriptor after an\nalready existing one.\n\nSimplify this by never setting NDE unless when we actually chain a descriptor.\n\nSigned-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>\nAcked-by: Ludovic Desroches <ludovic.desroches@atmel.com>\nSigned-off-by: Vinod Koul <vinod.koul@intel.com>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/0d0ee751f7f7cd7d44eeb596f3b430ed0b178e07"}]}