{"push_id":905099905,"size":1000,"distinct_size":18,"ref":"refs/heads/axp223-v5","head":"3627a32cf9683daa3f618dbffdcd60eafd6451df","before":"1f9c94a8c91c2ec090e4e414f101ff5b8ed99ce6","commits":[{"sha":"1d98b618cc0d8d65650ac0de88c93c98013b1166","author":{"email":"6a97ab1d8fae3a62719c8e695586fe709398a94a@rock-chips.com","name":"Caesar Wang"},"message":"thermal: rockchip: better to compatible the driver for different SoCs\n\nThe current driver is default to register the two thermal sensors\nin probe since some SoCs maybe only have one sensor for thermal.\n\nIn some cases, the channel 0 is not always the cpu or gpu sensor.\nSo add the channel can be configured for sensors.\n\nSigned-off-by: Caesar Wang <wxt@rock-chips.com>\nSigned-off-by: Eduardo Valentin <edubezval@gmail.com>","distinct":false,"url":"https://api.github.com/repos/wens/linux/commits/1d98b618cc0d8d65650ac0de88c93c98013b1166"},{"sha":"144c5565c22a392cf2917b40754fc88109765f07","author":{"email":"6a97ab1d8fae3a62719c8e695586fe709398a94a@rock-chips.com","name":"Caesar Wang"},"message":"thermal: rockchip: trivial: fix typo in commit\n\nSigned-off-by: Caesar Wang <wxt@rock-chips.com>\nSigned-off-by: Eduardo Valentin <edubezval@gmail.com>","distinct":false,"url":"https://api.github.com/repos/wens/linux/commits/144c5565c22a392cf2917b40754fc88109765f07"},{"sha":"9b1b61cd8e31d9beba871333d7a798b3adb89288","author":{"email":"48c9e973d8f86eb0cdae200124c5925db7587c4e@pengutronix.de","name":"Lucas Stach"},"message":"ARM: OMAP2+: remove custom abort handler for t410\n\nThis is not needed anymore. Handling a potentially pending imprecise external\nabort left behind by the bootloader is now done in a slightly safer way inside\nthe common ARM startup code.\n\nWith the recent changes to abort handling, this issue got fixed by 57df53808534\n(\"ARM: OMAP2+: Fix imprecise external abort caused by bogus SRAM init\").\n\nSigned-off-by: Lucas Stach <l.stach@pengutronix.de>\n[tony@atomide.com: updated comments to describe what fixed the issue]\nSigned-off-by: Tony Lindgren <tony@atomide.com>","distinct":false,"url":"https://api.github.com/repos/wens/linux/commits/9b1b61cd8e31d9beba871333d7a798b3adb89288"},{"sha":"ce74110d5ed513b1b4f6e2eb4b7703f4163852bc","author":{"email":"6a97ab1d8fae3a62719c8e695586fe709398a94a@rock-chips.com","name":"Caesar Wang"},"message":"thermal: rockchip: improve the conversion function\n\nWe should make the conversion table in as a parameter since the different\nSoCs have the different conversionion table.\n\nSigned-off-by: Caesar Wang <wxt@rock-chips.com>\nSigned-off-by: Eduardo Valentin <edubezval@gmail.com>","distinct":false,"url":"https://api.github.com/repos/wens/linux/commits/ce74110d5ed513b1b4f6e2eb4b7703f4163852bc"},{"sha":"020ba95dbbbe83073a9728e046b4512b40896197","author":{"email":"6a97ab1d8fae3a62719c8e695586fe709398a94a@rock-chips.com","name":"Caesar Wang"},"message":"thermal: rockchip: Add the sort mode for adc value increment or decrement\n\nThe conversion table has the adc value and temperature.\nIn fact, the adc value only has the increment or decrement mode in\nconversion table.\n\nMoment, we can add the sort mode to be better support the *code_to_temp*\nfor differenr SoCs.\n\nSigned-off-by: Caesar Wang <wxt@rock-chips.com>\nSigned-off-by: Eduardo Valentin <edubezval@gmail.com>","distinct":false,"url":"https://api.github.com/repos/wens/linux/commits/020ba95dbbbe83073a9728e046b4512b40896197"},{"sha":"437df2172e8d63b21b748ba1f3ac574451a51440","author":{"email":"6a97ab1d8fae3a62719c8e695586fe709398a94a@rock-chips.com","name":"Caesar Wang"},"message":"thermal: rockchip: consistently use int for temperatures\n\nAs Temperature is currently represented as int not long in the thermal\nframework since use int intead of unsigned long/long to represent\ntemperature to avoid bogus overheat detection when negative temperature\nreported.\n\nSigned-off-by: Caesar Wang <wxt@rock-chips.com>\nSigned-off-by: Eduardo Valentin <edubezval@gmail.com>","distinct":false,"url":"https://api.github.com/repos/wens/linux/commits/437df2172e8d63b21b748ba1f3ac574451a51440"},{"sha":"20f0af759d79c53a818da5c953874c9e801f726a","author":{"email":"6a97ab1d8fae3a62719c8e695586fe709398a94a@rock-chips.com","name":"Caesar Wang"},"message":"thermal: rockchip: Support the RK3368 SoCs in thermal driver\n\nThe RK3368 SoCs support to 2 channel TS-ADC, the temperature criteria\nof each channel can be configurable.\n\nThe system has two Temperature Sensors, channel 0 is for CPU,\nand channel 1 is for GPU.\n\nSigned-off-by: Caesar Wang <wxt@rock-chips.com>\nSigned-off-by: Eduardo Valentin <edubezval@gmail.com>","distinct":false,"url":"https://api.github.com/repos/wens/linux/commits/20f0af759d79c53a818da5c953874c9e801f726a"},{"sha":"bb404db47b8a4ade8c85d13fb44908b0ee15483c","author":{"email":"d373e2b6407ea84be359ce4a11e8631121819e79@arm.com","name":"Kapileshwar Singh"},"message":"thermal: power_allocator: Use temperature reading from tz\n\nAll thermal governors use the temperature value stored in\nstruct thermal_zone_device.\n\n   thermal_zone_device->temperature\n\npower_allocator governor should not deviate from this and use\nthe same.\n\nCc: Javi Merino <javi.merino@arm.com>\nCc: Eduardo Valentin <edubezval@gmail.com>\nCc: Daniel Kurtz <djkurtz@chromium.org>\nCc: Zhang Rui <rui.zhang@intel.com>\nCc: Dmitry Torokhov <dmitry.torokhov@gmail.com>\nCc: Sascha Hauer <s.hauer@pengutronix.de>\nCc: Andrea Arcangeli <aarcange@redhat.com>\nAcked-by: Javi Merino <javi.merino@arm.com>\nReported-by: Sugumar Natarajan <sugumar.natarajan@arm.com>\nSigned-off-by: Kapileshwar Singh <kapileshwar.singh@arm.com>\nSigned-off-by: Eduardo Valentin <edubezval@gmail.com>","distinct":false,"url":"https://api.github.com/repos/wens/linux/commits/bb404db47b8a4ade8c85d13fb44908b0ee15483c"},{"sha":"12551ced30bb4658496ba76b7998dc6930b45722","author":{"email":"7f8b6a1ac8e749f92f6ae3c19d7ce86038d58ada@tieto.com","name":"Bartosz Markowski"},"message":"ath10k: fix the currently supported QCA9377 target version name\n\nWhen introducing the original QCA9377 support, the chip target\nversion was wrongly picked. The chip advertising itself with\nbmi target value equal to 0x05020001 is in fact a 1.1 revision.\nI realized this once I got a real 1.1 hw to play with.\n\nSigned-off-by: Bartosz Markowski <bartosz.markowski@tieto.com>\nSigned-off-by: Kalle Valo <kvalo@qca.qualcomm.com>","distinct":false,"url":"https://api.github.com/repos/wens/linux/commits/12551ced30bb4658496ba76b7998dc6930b45722"},{"sha":"6cf213958299803c1166e63c1805a8b8cd135be5","author":{"email":"7f8b6a1ac8e749f92f6ae3c19d7ce86038d58ada@tieto.com","name":"Bartosz Markowski"},"message":"ath10k: update missing hw_params of QCA9377 hw1.1\n\nThe uart_pin was incorrectly configured for QCA9377\nand the recently added hw_params were omitted.\n\nSigned-off-by: Bartosz Markowski <bartosz.markowski@tieto.com>\nSigned-off-by: Kalle Valo <kvalo@qca.qualcomm.com>","distinct":false,"url":"https://api.github.com/repos/wens/linux/commits/6cf213958299803c1166e63c1805a8b8cd135be5"},{"sha":"079a0490e207c5a88e4b40cefcc331f4bce562f4","author":{"email":"7f8b6a1ac8e749f92f6ae3c19d7ce86038d58ada@tieto.com","name":"Bartosz Markowski"},"message":"ath10k: introduce dev_id to hw_params\n\nA follow up patch introducing a QCA9377 hw1.0 support will need\nthis device identification helper for an explicit distinction of\nHWs, as apparently both QCA6174 hw3.0 and QCA9377 share the same BMI\ntarget version (0x0502000x). For the QCA9377 hw1.1 previously\nadded we were just lucky we did not overlap with the same chip_id_rev.\n\nSigned-off-by: Bartosz Markowski <bartosz.markowski@tieto.com>\nSigned-off-by: Kalle Valo <kvalo@qca.qualcomm.com>","distinct":false,"url":"https://api.github.com/repos/wens/linux/commits/079a0490e207c5a88e4b40cefcc331f4bce562f4"},{"sha":"034074f3a889b69325326e612b7b37f3492a65ad","author":{"email":"7f8b6a1ac8e749f92f6ae3c19d7ce86038d58ada@tieto.com","name":"Bartosz Markowski"},"message":"ath10k: add QCA9377 hw1.0 support\n\nAdd new BMI target version and chip id revision. Register it\non supported chips list.\n\nSigned-off-by: Bartosz Markowski <bartosz.markowski@tieto.com>\nSigned-off-by: Kalle Valo <kvalo@qca.qualcomm.com>","distinct":false,"url":"https://api.github.com/repos/wens/linux/commits/034074f3a889b69325326e612b7b37f3492a65ad"},{"sha":"2727a743e9eeb3d4063d4077afee3fd2a5e198ca","author":{"email":"3cde00d741d423c7af78a330625093b0706dcebb@qca.qualcomm.com","name":"Ryan Hsu"},"message":"ath10k: override CE5 configuration for QCA6147 device\n\nCommit a70587b3389a (\"ath10k: configure copy engine 5 for HTT messages\")\nintroduced to use the unused CE5 for target to host message. For the device\nlike QCA6174, CE5 already assigned for other feature. So for QCA6174, override\nthe CE5 configuration and use the CE1 instead.\n\nThis patch is based on Rajkumar's earlier patch.\n\nFixes: a70587b3389a (\"ath10k: configure copy engine 5 for HTT messages\")\nSigned-off-by: Ryan Hsu <ryanhsu@qca.qualcomm.com>\nSigned-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com>\nSigned-off-by: Kalle Valo <kvalo@qca.qualcomm.com>","distinct":false,"url":"https://api.github.com/repos/wens/linux/commits/2727a743e9eeb3d4063d4077afee3fd2a5e198ca"},{"sha":"23ba8a66234943e0b41c13ef7ca1088cf8488025","author":{"email":"c8a2a8a61f3d885706c70f0152b140a85297f68f@qca.qualcomm.com","name":"Vladimir Kondratiev"},"message":"MAINTAINERS: wil6210: new maintainer - Maya Erez\n\nMaya Erez will maintain the wil6210 driver\n\nSigned-off-by: Vladimir Kondratiev <qca_vkondrat@qca.qualcomm.com>\nSigned-off-by: Kalle Valo <kvalo@qca.qualcomm.com>","distinct":false,"url":"https://api.github.com/repos/wens/linux/commits/23ba8a66234943e0b41c13ef7ca1088cf8488025"},{"sha":"15de0de29f7ba5cce9699a8cc2344ca137beb25a","author":{"email":"96317b015fcd976bfe21efafbb914f4dae54bde4@avagotech.com","name":"Sreekanth Reddy"},"message":"mpt3sas: Fix use sas_is_tlr_enabled API before enabling MPI2_SCSIIO_CONTROL_TLR_ON flag\n\nBefore enabling MPI2_SCSIIO_CONTROL_TLR_ON flag in MPI SCSI IO request\nmessage, check whether TLR is enabled on the drive using\n'sas_is_tlr_enabled' API.\n\nActually in the driver code, driver is using below API's\n\n1. sas_enable_tlr() - to enable the TLR\n2. sas_disable_tlr() - to disable the TLR\n3. sas_is_tlr_enabled() - to check whether TLR is enabled or not.\n\nbut in scsih_qcmd() we have missed to use sas_is_tlr_enabled() API,\ninstead we checking for TLR bit from flag field of driver's 'struct\nMPT3SAS_DEVIC' structure. which is corrected with this patch.\n\nSigned-off-by: Sreekanth Reddy <Sreekanth.Reddy@avagotech.com>\nReviewed-by: Hannes Reinecke <hare@suse.de>\nReviewed-by: Tomas Henzl <thenzl@redhat.com>\nSigned-off-by: Martin K. Petersen <martin.petersen@oracle.com>","distinct":false,"url":"https://api.github.com/repos/wens/linux/commits/15de0de29f7ba5cce9699a8cc2344ca137beb25a"},{"sha":"78b7b80cf0abd5ea31d229300b11e9c3a97324ae","author":{"email":"ff341aa343d564f9e53e9dcb6996be8c04859a66@oracle.com","name":"Dan Carpenter"},"message":"mvsas: don't allow negative timeouts\n\nThere is a static checker warning here because \"val\" is controlled by\nthe user and we have a upper bound on it but allow negative numbers.\n\"val\" appears to be a timeout in usec so this bug probably means we\nhave a longer timeout than we should.  Let's fix this by changing \"val\"\nto unsigned.\n\nSigned-off-by: Dan Carpenter <dan.carpenter@oracle.com>\nReviewed-by: Jack Wang <jinpu.wang@profitbricks.com>\nSigned-off-by: Martin K. Petersen <martin.petersen@oracle.com>","distinct":false,"url":"https://api.github.com/repos/wens/linux/commits/78b7b80cf0abd5ea31d229300b11e9c3a97324ae"},{"sha":"d8a080c3746c0b60905a88ca56e83a8239c184e0","author":{"email":"ff341aa343d564f9e53e9dcb6996be8c04859a66@oracle.com","name":"Dan Carpenter"},"message":"hpsa: logical vs bitwise AND typo\n\nHPSA_DIAG_OPTS_DISABLE_RLD_CACHING is a mask and bitwise AND was\nintended here instead of logical &&.  This bug is essentially harmless,\nit means that sometimes we don't print a warning message which we wanted\nto print.\n\nFixes: c2adae44e916 ('hpsa: disable report lun data caching')\nSigned-off-by: Dan Carpenter <dan.carpenter@oracle.com>\nReviewed-by: Johannes Thumshirn <jthumshirn@suse.de>\nAcked-by: Don Brace <don.brace@pmcs.com>\nSigned-off-by: Martin K. Petersen <martin.petersen@oracle.com>","distinct":false,"url":"https://api.github.com/repos/wens/linux/commits/d8a080c3746c0b60905a88ca56e83a8239c184e0"},{"sha":"86f799b82f5c011404ddef54600bc5e99b7e0cf2","author":{"email":"4596b3305151c7ee743192a95d394341e3d3b644@suse.de","name":"Takashi Iwai"},"message":"ALSA: hda - Fix noise on Dell Latitude E6440\n\nDell Latitude E6440 (1028:05bd) needs the same fixup as applied to\nother Latitude E7xxx models for the click noise due to the recent\npower-saving changes.\n\nBugzilla: http://bugzilla.opensuse.org/show_bug.cgi?id=954876\nCc: <stable@vger.kernel.org> # v4.1+\nSigned-off-by: Takashi Iwai <tiwai@suse.de>","distinct":false,"url":"https://api.github.com/repos/wens/linux/commits/86f799b82f5c011404ddef54600bc5e99b7e0cf2"},{"sha":"5d5563b14fe34021b690eb3edc54abcc876e417c","author":{"email":"d5ec7d0cd8074757a1f5eb708bc105c3065a65ea@sakamocchi.jp","name":"Takashi Sakamoto"},"message":"ALSA: dice: fix detection of Loud devices\n\nCommit a471fcde8c2c (\"ALSA: dice: fix detection of Weiss devices\") adds\na quirk of Weiss models. According to users' reports, Loud models also\nhave the similar quirk. They have 0x10 in the category field.\n\nThis commit adds support for Mackie Onyx Blackbird and Onyx-i series.\nAs long as I know, Dice-based models produced by\nFocusrite/Alesis/PreSonus/M-Audio/TC Electronic have default value (0x04)\nin their category field, thus it may be reasonable to add a condition\nstatement for Loud models, instead of removing the check of category value.\n\nReported-by: Rouge Etienne <erouge.externe@m6.fr>\nReported-by: Etilem <contact@etilem.net>\nSigned-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>\nSigned-off-by: Takashi Iwai <tiwai@suse.de>","distinct":false,"url":"https://api.github.com/repos/wens/linux/commits/5d5563b14fe34021b690eb3edc54abcc876e417c"},{"sha":"4ab75944c4b324c1f5f01dbd4c4d122d2b9da187","author":{"email":"e26eff765275c77466ad5898184fc6a988d45849@intel.com","name":"Oren Givon"},"message":"iwlwifi: Add new PCI IDs for the 8260 series\n\nAdd some new PCI IDs for the 8260 series which were missing.\nThe following sub-system IDs were added:\n0x0130, 0x1130, 0x0132, 0x1132, 0x1150, 0x8110, 0x9110, 0x8130,\n0x9130, 0x8132, 0x9132, 0x8150, 0x9150, 0x0044, 0x0930\n\nCC: <stable@vger.kernel.org> [4.1+]\nSigned-off-by: Oren Givon <oren.givon@intel.com>\nSigned-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>","distinct":false,"url":"https://api.github.com/repos/wens/linux/commits/4ab75944c4b324c1f5f01dbd4c4d122d2b9da187"}]}