{"push_id":638978558,"size":12,"distinct_size":12,"ref":"refs/heads/master","head":"42dece2bb30b6a61efe046807f5cb55422643251","before":"e71aa3d8d0dcc3413be9d624c38bd6d2233a5bb6","commits":[{"sha":"a97fc8bd3b795a0d83368746cd3adbfad0ceaa95","author":{"email":"e87e1d1aa21a5e0a918f2fc81ba1ed7692fe6a1c@nulltrace.org","name":"Himanshu Chauhan"},"message":"[x86] Some fixes for shadow tables and interrupt injection\n\no Initialize the newly allocated shadow table pages.\no Marked the delivered interrupt as invalid.\n\nSigned-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>","distinct":true,"url":"https://api.github.com/repos/avpatel/xvisor-next/commits/a97fc8bd3b795a0d83368746cd3adbfad0ceaa95"},{"sha":"37c40af4ea3e09abce5479c46dc4443ebb95f434","author":{"email":"e87e1d1aa21a5e0a918f2fc81ba1ed7692fe6a1c@nulltrace.org","name":"Himanshu Chauhan"},"message":"[x86] Refactor intercept handling code\n\nRefactored the code in following way:\no 80 char alignment.\no PF and Intruction intercept broken down to\n  simpler functions.\n\nSigned-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>","distinct":true,"url":"https://api.github.com/repos/avpatel/xvisor-next/commits/37c40af4ea3e09abce5479c46dc4443ebb95f434"},{"sha":"d84f8572aab3e456b8b968e918089125c8e1625d","author":{"email":"e87e1d1aa21a5e0a918f2fc81ba1ed7692fe6a1c@nulltrace.org","name":"Himanshu Chauhan"},"message":"[x86] Add support for more CPUIDs\n\nAdd support for Power management features and SVM\nidentifier CPUIDs.\n\nWith this patch, there is no change required in Linux\nto boot as guest.\n\nSigned-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>","distinct":true,"url":"https://api.github.com/repos/avpatel/xvisor-next/commits/d84f8572aab3e456b8b968e918089125c8e1625d"},{"sha":"c6d26f9417539883408ce7ef7f2fb7df4f6729be","author":{"email":"e87e1d1aa21a5e0a918f2fc81ba1ed7692fe6a1c@nulltrace.org","name":"Himanshu Chauhan"},"message":"[x86] Guest Linux kernel configuration file.\n\nThis is the guest Linux kernel configuration file\nwhich we use to build and test the Linux kernel\nas guest.\n\nIts for 32-bit non-SMP kernel.\n\nSigned-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>","distinct":true,"url":"https://api.github.com/repos/avpatel/xvisor-next/commits/c6d26f9417539883408ce7ef7f2fb7df4f6729be"},{"sha":"afb40a114a3b7b120350bb360435c38ed41d35d9","author":{"email":"e87e1d1aa21a5e0a918f2fc81ba1ed7692fe6a1c@nulltrace.org","name":"Himanshu Chauhan"},"message":"[x86] Guest user space configration\n\nThis is the confiuration for guest buildroot\nuser space programs.\n\nSigned-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>","distinct":true,"url":"https://api.github.com/repos/avpatel/xvisor-next/commits/afb40a114a3b7b120350bb360435c38ed41d35d9"},{"sha":"b95a57fbd0a5e0b15bdad1ff74dbab94cdf73d92","author":{"email":"e87e1d1aa21a5e0a918f2fc81ba1ed7692fe6a1c@nulltrace.org","name":"Himanshu Chauhan"},"message":"[x86] Small refactor of shadow table page allocation\n\nSigned-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>","distinct":true,"url":"https://api.github.com/repos/avpatel/xvisor-next/commits/b95a57fbd0a5e0b15bdad1ff74dbab94cdf73d92"},{"sha":"e86c48087e8e8b4e7e7fceaa787ac977e811a859","author":{"email":"0be09a552a96d223dac9614ba1b940493e9bae9f@xvisor-x86.org","name":"Himanshu Chauhan"},"message":"[x86] Guest Linux configuration changes.\n\nThe change is mainly for moving to initrd type of\nrootfs for time being. Other changes are for trimming\nthe guest size.\n\nSigned-off-by: Himanshu Chauhan <hchauhan@xvisor-x86.org>","distinct":true,"url":"https://api.github.com/repos/avpatel/xvisor-next/commits/e86c48087e8e8b4e7e7fceaa787ac977e811a859"},{"sha":"29654c097afa5cda83343bbdef566be83fc1d18e","author":{"email":"0be09a552a96d223dac9614ba1b940493e9bae9f@xvisor-x86.org","name":"Himanshu Chauhan"},"message":"[x86] Inline function to set page protection bits.\n\nSigned-off-by: Himanshu Chauhan <hchauhan@xvisor-x86.org>","distinct":true,"url":"https://api.github.com/repos/avpatel/xvisor-next/commits/29654c097afa5cda83343bbdef566be83fc1d18e"},{"sha":"7a16de416b41b05cce33b25e040a0cd46117c1dd","author":{"email":"0be09a552a96d223dac9614ba1b940493e9bae9f@xvisor-x86.org","name":"Himanshu Chauhan"},"message":"[x86] Page table level enum for guest\n\nCurrently we run 32-bit guest, so add 2 enums for differentiating\nbetween 2 page table levels.\n\nSigned-off-by: Himanshu Chauhan <hchauhan@xvisor-x86.org>","distinct":true,"url":"https://api.github.com/repos/avpatel/xvisor-next/commits/7a16de416b41b05cce33b25e040a0cd46117c1dd"},{"sha":"b49cb2a36dd0198adbce347621aeb01162b4c22f","author":{"email":"0be09a552a96d223dac9614ba1b940493e9bae9f@xvisor-x86.org","name":"Himanshu Chauhan"},"message":"[x86] Consider mid-level page table entries and its protection\n\nCurrently in x86 only the last level entries are created and their\nprotection bits are set properly. The mid-level entries are created\na default value. The guest protection bits for mid-level entries\nare not consulted. This causes spurious page faults.\n\nChanged the function which creates shadow page table entry to take\nextra parameter about pde's. Also changed the update entry function\nto take an extra parameter about the level for which page protection\nbits are to be updated.\n\nSigned-off-by: Himanshu Chauhan <hchauhan@xvisor-x86.org>","distinct":true,"url":"https://api.github.com/repos/avpatel/xvisor-next/commits/b49cb2a36dd0198adbce347621aeb01162b4c22f"},{"sha":"5407dff40aaec4ea3e6a5d2a712107be1feeb49c","author":{"email":"0be09a552a96d223dac9614ba1b940493e9bae9f@xvisor-x86.org","name":"Himanshu Chauhan"},"message":"[x86] Consider guest's mid-level page table entries\n\nRearranged the code to take into the mid-level page table\nentries created by guest.\n\nSigned-off-by: Himanshu Chauhan <hchauhan@xvisor-x86.org>","distinct":true,"url":"https://api.github.com/repos/avpatel/xvisor-next/commits/5407dff40aaec4ea3e6a5d2a712107be1feeb49c"},{"sha":"42dece2bb30b6a61efe046807f5cb55422643251","author":{"email":"0be09a552a96d223dac9614ba1b940493e9bae9f@xvisor-x86.org","name":"Himanshu Chauhan"},"message":"[x86] Disable software interrupt vmexit and remove some dead code.\n\nSigned-off-by: Himanshu Chauhan <hchauhan@xvisor-x86.org>","distinct":true,"url":"https://api.github.com/repos/avpatel/xvisor-next/commits/42dece2bb30b6a61efe046807f5cb55422643251"}]}