{"action":"created","issue":{"url":"https://api.github.com/repos/DaGenix/rust-crypto/issues/249","labels_url":"https://api.github.com/repos/DaGenix/rust-crypto/issues/249/labels{/name}","comments_url":"https://api.github.com/repos/DaGenix/rust-crypto/issues/249/comments","events_url":"https://api.github.com/repos/DaGenix/rust-crypto/issues/249/events","html_url":"https://github.com/DaGenix/rust-crypto/pull/249","id":57573959,"number":249,"title":"Optimized SHA1 and SHA256","user":{"login":"andydude","id":10523,"avatar_url":"https://avatars.githubusercontent.com/u/10523?v=3","gravatar_id":"","url":"https://api.github.com/users/andydude","html_url":"https://github.com/andydude","followers_url":"https://api.github.com/users/andydude/followers","following_url":"https://api.github.com/users/andydude/following{/other_user}","gists_url":"https://api.github.com/users/andydude/gists{/gist_id}","starred_url":"https://api.github.com/users/andydude/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/andydude/subscriptions","organizations_url":"https://api.github.com/users/andydude/orgs","repos_url":"https://api.github.com/users/andydude/repos","events_url":"https://api.github.com/users/andydude/events{/privacy}","received_events_url":"https://api.github.com/users/andydude/received_events","type":"User","site_admin":false},"labels":[],"state":"open","locked":false,"assignee":null,"milestone":null,"comments":2,"created_at":"2015-02-13T08:54:57Z","updated_at":"2015-02-15T00:08:50Z","closed_at":null,"pull_request":{"url":"https://api.github.com/repos/DaGenix/rust-crypto/pulls/249","html_url":"https://github.com/DaGenix/rust-crypto/pull/249","diff_url":"https://github.com/DaGenix/rust-crypto/pull/249.diff","patch_url":"https://github.com/DaGenix/rust-crypto/pull/249.patch"},"body":"First, some background. Both ARM and Intel are releasing documentation that they plan to include instruction set extensions for SHA1 and SHA256 sometime in the near future. Intel has [some documentation](https://software.intel.com/en-us/articles/intel-sha-extensions) about it, and I wrote [a blog entry](http://straymindcough.blogspot.com/2015/01/hardware-accelerated-sha-1.html) about it, too.\r\n\r\nSecond, LLVM won't lower these intrinsics yet, so I started writing some functions to emulate the unusable intrinsics, and implemented SHA1 in terms of those emulated intrinsic functions, and it turned out to be quite fast! So I tried the same thing with SHA256 (which will have HW instructions at some point), and SHA512 (which I couldn't find any instruction designs for, so I made up my own).\r\n\r\nI believe that one reason these implementations are faster is possibly because it uses packed addition and packed xor instead of scalar arithmetic. I haven't tested it on any architectures other than x86-64, so it may be that it ends up being slower on other architectures. I kept the current code in a function with the same name with a \"`_safe`\" appended to it. So if it ends up being slower on ARM, for example, we, or users of the library, can switch the implementations, if needed."},"comment":{"url":"https://api.github.com/repos/DaGenix/rust-crypto/issues/comments/74397788","html_url":"https://github.com/DaGenix/rust-crypto/pull/249#issuecomment-74397788","issue_url":"https://api.github.com/repos/DaGenix/rust-crypto/issues/249","id":74397788,"user":{"login":"andydude","id":10523,"avatar_url":"https://avatars.githubusercontent.com/u/10523?v=3","gravatar_id":"","url":"https://api.github.com/users/andydude","html_url":"https://github.com/andydude","followers_url":"https://api.github.com/users/andydude/followers","following_url":"https://api.github.com/users/andydude/following{/other_user}","gists_url":"https://api.github.com/users/andydude/gists{/gist_id}","starred_url":"https://api.github.com/users/andydude/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/andydude/subscriptions","organizations_url":"https://api.github.com/users/andydude/orgs","repos_url":"https://api.github.com/users/andydude/repos","events_url":"https://api.github.com/users/andydude/events{/privacy}","received_events_url":"https://api.github.com/users/andydude/received_events","type":"User","site_admin":false},"created_at":"2015-02-15T00:08:50Z","updated_at":"2015-02-15T00:08:50Z","body":"No, the _safe variants are just the previous code with some minor changes to support switching between the two. I didn't have enough information to know which would be faster, but it looks like the previous code would be better on ARM."}}