{"action":"created","comment":{"url":"https://api.github.com/repos/dolphin-emu/dolphin/pulls/comments/24620488","id":24620488,"diff_hunk":"@@ -217,31 +250,71 @@ __forceinline void WriteToHardware(u32 em_address, const T data)\n \t\t\t}\n \t\t\telse\n \t\t\t{\n-\t\t\t\tmmio_mapping->Write(em_address, data);\n+\t\t\t\tMemory::mmio_mapping->Write(em_address, data);\n \t\t\t\treturn;\n \t\t\t}\n \t\t}\n-\t\telse if (segment == 0x8 || segment == 0xC || segment == 0x0)\n+\t\tif ((segment == 0x8 || segment == 0xC) && (em_address & 0x0FFFFFFF) < Memory::REALRAM_SIZE)\n \t\t{\n-\t\t\t*(T*)&m_pRAM[em_address & RAM_MASK] = bswap(data);\n+\t\t\t*(T*)&Memory::m_pRAM[em_address & 0x0FFFFFFF] = bswap(data);\n \t\t\treturn;\n \t\t}\n-\t\telse if (m_pEXRAM && (segment == 0x9 || segment == 0xD || segment == 0x1))\n+\t\tif (Memory::m_pEXRAM && (segment == 0x9 || segment == 0xD) && (em_address & 0x0FFFFFFF) < Memory::EXRAM_SIZE)\n \t\t{\n-\t\t\t*(T*)&m_pEXRAM[em_address & EXRAM_MASK] = bswap(data);\n+\t\t\t*(T*)&Memory::m_pEXRAM[em_address & 0x0FFFFFFF] = bswap(data);\n \t\t\treturn;\n \t\t}\n-\t\telse if (segment == 0xE && (em_address < (0xE0000000 + L1_CACHE_SIZE)))\n+\t\tif (segment == 0xE && (em_address < (0xE0000000 + Memory::L1_CACHE_SIZE)))\n \t\t{\n-\t\t\t*(T*)&m_pL1Cache[em_address & L1_CACHE_MASK] = bswap(data);\n+\t\t\t*(T*)&Memory::m_pL1Cache[em_address & 0x0FFFFFFF] = bswap(data);\n \t\t\treturn;\n \t\t}\n \t}\n \n-\tif (bFakeVMEM && (segment == 0x7 || segment == 0x4))\n+\tif (Memory::bFakeVMEM && performTranslation && (segment == 0x7 || segment == 0x4))\n \t{\n \t\t// fake VMEM\n-\t\t*(T*)&m_pFakeVMEM[em_address & FAKEVMEM_MASK] = bswap(data);\n+\t\t*(T*)&Memory::m_pFakeVMEM[em_address & Memory::FAKEVMEM_MASK] = bswap(data);\n+\t\treturn;\n+\t}\n+\n+\tif (!performTranslation)","path":"Source/Core/Core/PowerPC/MMU.cpp","position":184,"original_position":184,"commit_id":"4193350d226f5ca2d2d6630154b34b478bbedec9","original_commit_id":"4193350d226f5ca2d2d6630154b34b478bbedec9","user":{"login":"phire","id":138484,"avatar_url":"https://avatars.githubusercontent.com/u/138484?v=3","gravatar_id":"","url":"https://api.github.com/users/phire","html_url":"https://github.com/phire","followers_url":"https://api.github.com/users/phire/followers","following_url":"https://api.github.com/users/phire/following{/other_user}","gists_url":"https://api.github.com/users/phire/gists{/gist_id}","starred_url":"https://api.github.com/users/phire/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/phire/subscriptions","organizations_url":"https://api.github.com/users/phire/orgs","repos_url":"https://api.github.com/users/phire/repos","events_url":"https://api.github.com/users/phire/events{/privacy}","received_events_url":"https://api.github.com/users/phire/received_events","type":"User","site_admin":false},"body":"Interesting.\r\n\r\nWhat happens if the caches are disabled or locked?","created_at":"2015-02-12T21:10:47Z","updated_at":"2015-02-12T21:10:47Z","html_url":"https://github.com/dolphin-emu/dolphin/pull/1856#discussion_r24620488","pull_request_url":"https://api.github.com/repos/dolphin-emu/dolphin/pulls/1856","_links":{"self":{"href":"https://api.github.com/repos/dolphin-emu/dolphin/pulls/comments/24620488"},"html":{"href":"https://github.com/dolphin-emu/dolphin/pull/1856#discussion_r24620488"},"pull_request":{"href":"https://api.github.com/repos/dolphin-emu/dolphin/pulls/1856"}}},"pull_request":{"url":"https://api.github.com/repos/dolphin-emu/dolphin/pulls/1856","id":27071215,"html_url":"https://github.com/dolphin-emu/dolphin/pull/1856","diff_url":"https://github.com/dolphin-emu/dolphin/pull/1856.diff","patch_url":"https://github.com/dolphin-emu/dolphin/pull/1856.patch","issue_url":"https://api.github.com/repos/dolphin-emu/dolphin/issues/1856","number":1856,"state":"closed","locked":false,"title":"Make address translation respect the CPU translation mode","user":{"login":"magumagu","id":7026757,"avatar_url":"https://avatars.githubusercontent.com/u/7026757?v=3","gravatar_id":"","url":"https://api.github.com/users/magumagu","html_url":"https://github.com/magumagu","followers_url":"https://api.github.com/users/magumagu/followers","following_url":"https://api.github.com/users/magumagu/following{/other_user}","gists_url":"https://api.github.com/users/magumagu/gists{/gist_id}","starred_url":"https://api.github.com/users/magumagu/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/magumagu/subscriptions","organizations_url":"https://api.github.com/users/magumagu/orgs","repos_url":"https://api.github.com/users/magumagu/repos","events_url":"https://api.github.com/users/magumagu/events{/privacy}","received_events_url":"https://api.github.com/users/magumagu/received_events","type":"User","site_admin":false},"body":"The PowerPC CPU has bits in MSR (DR and IR) which control whether addresses are translated.  We should respect these instead of mixing physical addresses and translated addresses into the same address space.\r\n\r\nThe bulk of this change is mass-renaming: making translation for CPU addresses work correctly means that memory accesses from the CPU have to use a CPU-specific API for memory access.\r\n\r\nOn its own, this isn't really that useful, because it doesn't change behavior unless a game crashes.  That said, it's the first step to further improvements to the memory subsystem (real BAT emulation, locking, etc.). \r\n\r\nMy current naming scheme is to turn Memory::Read/Write* into the hardware variants, and move the CPU versions to PowerPC::Read/Write*. That said, I'm open to suggestions.\r\n\r\n~~Fixes issue 8064.~~ This will have to wait for dynamic-bat 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