{"push_id":875197460,"size":9,"distinct_size":8,"ref":"refs/heads/master","head":"9da8da680789b780145411f7e9e97fefe14b3466","before":"bb6fd8d8fb302d59b8b45afad5918b09cdbd4075","commits":[{"sha":"6f77535673b11aedd67256c99a164ae3864a946c","author":{"email":"79e2475f81a6317276bf7cbb3958b20d289b78df@chown.ath.cx","name":"Grigori Goronzy"},"message":"Fix output in error cases","distinct":false,"url":"https://api.github.com/repos/grigorig/stcgal/commits/6f77535673b11aedd67256c99a164ae3864a946c"},{"sha":"bf7cbb20428a4e3558b4d5f19e164bc2eec0c7e7","author":{"email":"79e2475f81a6317276bf7cbb3958b20d289b78df@chown.ath.cx","name":"Grigori Goronzy"},"message":"Add support for new BSL 7.x STC15 parts\n\nThese use a somewhat modified protocol with support for external clock.\nThis should get all STC/IAP15F2/L2 etc. work correctly. Only parts with\nBSL 7.1 were tested, although BSL 7.2 should work as well.\n\nThe functionality is encapsulated in the new protocol \"stc15x\".","distinct":true,"url":"https://api.github.com/repos/grigorig/stcgal/commits/bf7cbb20428a4e3558b4d5f19e164bc2eec0c7e7"},{"sha":"ed28c8ef89523b70eefc52c917d23ca5b59c0a6f","author":{"email":"79e2475f81a6317276bf7cbb3958b20d289b78df@chown.ath.cx","name":"Grigori Goronzy"},"message":"stc15x: add hack for SW/HW UART differences","distinct":true,"url":"https://api.github.com/repos/grigorig/stcgal/commits/ed28c8ef89523b70eefc52c917d23ca5b59c0a6f"},{"sha":"52b346ebfc817469cdf3fbd2bc1ad2020e78ee83","author":{"email":"79e2475f81a6317276bf7cbb3958b20d289b78df@chown.ath.cx","name":"Grigori Goronzy"},"message":"Flush stdout in some more error cases","distinct":true,"url":"https://api.github.com/repos/grigorig/stcgal/commits/52b346ebfc817469cdf3fbd2bc1ad2020e78ee83"},{"sha":"75ac790141f11ccaa660e5daa78d1764a7374a43","author":{"email":"79e2475f81a6317276bf7cbb3958b20d289b78df@chown.ath.cx","name":"Grigori Goronzy"},"message":"Add IAP15F2K61S2 to compatibility list\n\nIn fact, all current STC 15 MCUs should work now.","distinct":true,"url":"https://api.github.com/repos/grigorig/stcgal/commits/75ac790141f11ccaa660e5daa78d1764a7374a43"},{"sha":"8297904753b26d203931710890dab76748fc4ca8","author":{"email":"79e2475f81a6317276bf7cbb3958b20d289b78df@chown.ath.cx","name":"Grigori Goronzy"},"message":"stc15x: add external clock handling","distinct":true,"url":"https://api.github.com/repos/grigorig/stcgal/commits/8297904753b26d203931710890dab76748fc4ca8"},{"sha":"24a2a4a15b016c6089e1a306912af70e588de985","author":{"email":"79e2475f81a6317276bf7cbb3958b20d289b78df@chown.ath.cx","name":"Grigori Goronzy"},"message":"Merge branch 'stc15'","distinct":true,"url":"https://api.github.com/repos/grigorig/stcgal/commits/24a2a4a15b016c6089e1a306912af70e588de985"},{"sha":"d5b35cf43d6b19c467fb6f9b25edb5b7b8cba1db","author":{"email":"79e2475f81a6317276bf7cbb3958b20d289b78df@chown.ath.cx","name":"Grigori Goronzy"},"message":"Rename stc15 and stc15x protocols\n\nThe protocol originally named \"stc15\" is only used for two early STC15\nseries, i.e. STC15F104/STC15F204. All other STC15 series appear to\nuse a different protocol. So switch around names similary to \"stc12\"\nvs \"stc12a\".\n\nIn conclusion:\n- \"stc15a\" is used only for STC15xx04E(A)\n- \"stc15\" is used for all other currently tested STC15 MCUs","distinct":true,"url":"https://api.github.com/repos/grigorig/stcgal/commits/d5b35cf43d6b19c467fb6f9b25edb5b7b8cba1db"},{"sha":"9da8da680789b780145411f7e9e97fefe14b3466","author":{"email":"79e2475f81a6317276bf7cbb3958b20d289b78df@chown.ath.cx","name":"Grigori Goronzy"},"message":"Update README","distinct":true,"url":"https://api.github.com/repos/grigorig/stcgal/commits/9da8da680789b780145411f7e9e97fefe14b3466"}]}