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Kinney"},"message":"MdePkg/BaseLib: Support IA32 processors without CMOVx\n\nRemove use of CMOVx instruction from IA32 assembly files in BaseLib.  \nThis matches compiler flags for all supported C compilers.\n\nContributed-under: TianoCore Contribution Agreement 1.0\nSigned-off-by: Michael Kinney <michael.d.kinney@intel.com>\nReviewed-by: Jordan Justen <jordan.l.justen@intel.com>\n\n\n\ngit-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17213 6f19259b-4bc3-4df7-8a09-765794883524","distinct":false,"url":"https://api.github.com/repos/niruiyu/edk2/commits/88a75d260cadc67cc0edf6ad5f57241ed89a7d4b"},{"sha":"cfe41b57abb8ba26e4bd1c0b09c8b3506a7c55df","author":{"email":"fd20bc543a9f65bb633fac7d08a403c1f1c8eb6c@intel.com","name":"Michael Kinney"},"message":"MdePkg/BaseMemoryLibRepStr: Support IA32 processors without CMOVx\n\nRemove use of CMOVx instruction from IA32 assembly files in BaseMemoryLibRepStr.  \nThis matches compiler flags for all supported C compilers.\n\nContributed-under: TianoCore Contribution Agreement 1.0\nSigned-off-by: Michael Kinney <michael.d.kinney@intel.com>\nReviewed-by: Jordan Justen <jordan.l.justen@intel.com>\n\n\n\ngit-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17214 6f19259b-4bc3-4df7-8a09-765794883524","distinct":false,"url":"https://api.github.com/repos/niruiyu/edk2/commits/cfe41b57abb8ba26e4bd1c0b09c8b3506a7c55df"},{"sha":"cd68e4a8de23e8992a98c281f6fda229ffad19c9","author":{"email":"fd20bc543a9f65bb633fac7d08a403c1f1c8eb6c@intel.com","name":"Michael Kinney"},"message":"MdePkg/BaseSerialPortLib16550: Support UARTs with a register stride greater than 1 byte.\n\nAdd stride PCD to MdeModulePkg to support 16550 UARTs with a register stride that is not 1 byte.\nThe default value is 1 byte.\nQuark SoC uses a stride of 4 bytes.\n\nContributed-under: TianoCore Contribution Agreement 1.0\nSigned-off-by: Michael Kinney <michael.d.kinney@intel.com>\nReviewed-by: Jordan Justen <jordan.l.justen@intel.com>\n\n\n\ngit-svn-id: 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