{"push_id":909367659,"size":1,"distinct_size":1,"ref":"refs/heads/master","head":"a007ed4cdfc4aba784745657766e53e33ccf9d59","before":"16e248b1a031ab2cd38aaf1dc2a39847d8b4c811","commits":[{"sha":"a007ed4cdfc4aba784745657766e53e33ccf9d59","author":{"email":"a04fb628a22880e2b2b9dcd3d35f12d5182ed11e@gmail.com","name":"itgb"},"message":"use correct PLL configuration register bitmask for QCA956X Soc.\nIncorrect value causes clock inaccuracy as huge as 1/60.","distinct":true,"url":"https://api.github.com/repos/male-puppies/opwrt/commits/a007ed4cdfc4aba784745657766e53e33ccf9d59"}]}