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It\nalso adds rules in the validator to validate that they do the right things.\n\nIt's still an open question as to whether or not we want a bit_size in\nnir_alu_instr or if we just want to let it inherit from the destination.\nI'm inclined to just let it inherit from the destination.  A similar\nquestion needs to be asked about intrinsics.\n\nv2 (Connor):\n  - Relax validation: comparisons have explicit destination sizes\n    and implicit source sizes.\n  - Handle bit_size in the out-of-ssa pass\n  - Handle bit_size in the locals to regs pass","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/ecd68366e091ff661d716c654527a50d6bf9d530"},{"sha":"7f4bde853336023c4993f0918924982daa465097","author":{"email":"99c5849d46b9d5d9781f7baa7735ff66305c63a7@intel.com","name":"Connor Abbott"},"message":"nir: add double constant types","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/7f4bde853336023c4993f0918924982daa465097"},{"sha":"430f95fc1af0be82a5f63358dd1b9252fb0624f3","author":{"email":"99c5849d46b9d5d9781f7baa7735ff66305c63a7@intel.com","name":"Connor Abbott"},"message":"nir: update opcode definitions for different bit sizes\n\nSome opcodes need explicit bitsizes, and sometimes we need to use the\ndouble version when constant folding.\n\nv2: fix output type for u2f (Iago)\n\nv3: do not change vecN opcodes to be float. Now that the constant folding\n    infrastructure supports 64-bit integer instructions this is no longer\n    necessary. Also, that created a problem because lower_vecs_to_movs (or\n    any other pass that needs to break vecN operations into individual MOVs)\n    would then need to know if the source operand was integer or float to\n    emit imov or fmov instructions respectively to handle source modifiers\n    properly (which we can have if we make the opcodes float).","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/430f95fc1af0be82a5f63358dd1b9252fb0624f3"},{"sha":"bee2bf38bd1bc0f3c411edcb6db7e5ec56aa5b83","author":{"email":"99c5849d46b9d5d9781f7baa7735ff66305c63a7@intel.com","name":"Connor Abbott"},"message":"nir: handle different bit sizes when constant folding\n\nThis should be squashed into the previous commit so we don't break the build.\nKeep it separated for review purposes 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new parameter in different\n    files so we don't break the build (Iago)\n\nv3: Fix tgsi (Samuel)\n\nv4: Fix unused variable warning added with v3 (Iago)","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/1f393356190d4847aaa22fc3ab1ea42d7088544c"},{"sha":"2f6995e337b4fb5ec81600e5db559835acb2abb3","author":{"email":"99c5849d46b9d5d9781f7baa7735ff66305c63a7@intel.com","name":"Connor Abbott"},"message":"nir/vars_to_ssa: adapt to different bit sizes\n\nWe should squash this into the previous one, but for review we probably\nwant it separate.","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/2f6995e337b4fb5ec81600e5db559835acb2abb3"},{"sha":"ebf29a8fe750183662e56cf85e9b5aea04f2d561","author":{"email":"99c5849d46b9d5d9781f7baa7735ff66305c63a7@intel.com","name":"Connor Abbott"},"message":"nir/builder: handle different bit sizes\n\nWe should squash this into the previous one, but maybe it is useful to keep\nit separate for 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