{"push_id":629420726,"size":687,"distinct_size":687,"ref":"refs/heads/stprobe-base","head":"02e72459f88962ca941530da31f821d0ac1198b3","before":"134f435edef0fff7a8d0d42fcefa05a674474c96","commits":[{"sha":"fd48a80e144fdca6e5c7e6091942f70c2ea4ea8f","author":{"email":"ea91796269c7842d401af30276638d4aaa593379@googlemail.com","name":"Benjamin Kramer"},"message":"[SimplifyLibCalls] Turn memchr(const, C, const) into a bitfield check.\n\nstrchr(\"123!\", C) != nullptr is a common pattern to check if C is one\nof 1, 2, 3 or !. If the largest element of the string is smaller than\nthe target's register size we can easily create a bitfield and just\ndo a simple test for set membership.\n\nint foo(char C) { return strchr(\"123!\", C) != nullptr; } now becomes\n\n\tcmpl\t$64, %edi ## range check\n\tsbbb\t%al, %al\n\tmovabsq\t$0xE000200000001, %rcx\n\tbtq\t%rdi, %rcx ## bit test\n\tsbbb\t%cl, %cl\n\tandb\t%al, %cl ## and the two conditions\n\tandb\t$1, %cl\n\tmovzbl\t%cl, %eax ## returning an int\n\tret\n\n(imho the backend should expand this into a series of branches, but\nthat's a different story)\n\nThe code is currently limited to bit fields that fit in a register, so\nusually 64 or 32 bits. Sadly, this misses anything using alpha chars\nor {}. This could be fixed by just emitting a i128 bit field, but that\ncan generate really ugly code so we have to find a better way. To some\ndegree this is also recreating switch lowering logic, but we can't\nsimply emit a switch instruction and thus change the CFG within\ninstcombine.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232902 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/Zoxc/llvm/commits/fd48a80e144fdca6e5c7e6091942f70c2ea4ea8f"},{"sha":"42a84b54bf4061ba6d404a876ed2cc36f994d14a","author":{"email":"ea91796269c7842d401af30276638d4aaa593379@googlemail.com","name":"Benjamin Kramer"},"message":"[SimplifyLibCalls] Fix negative shifts being produced by the memchr -> bitfield transform.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232903 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/Zoxc/llvm/commits/42a84b54bf4061ba6d404a876ed2cc36f994d14a"},{"sha":"3445d7bea03f5d51bb7696e0ad24f595febe12f5","author":{"email":"af4b1a06dcc93e086b35435d5654eb2aff59399a@redking.me.uk","name":"Simon Pilgrim"},"message":"Fixed MSVC compile warning issue introduced in r232837\n\n- was reporting 'warning C4715: 'getType32' : not all control paths return a value'\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232913 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/Zoxc/llvm/commits/3445d7bea03f5d51bb7696e0ad24f595febe12f5"},{"sha":"031fbaeb296558e343ddc302d169f2b2673f58f5","author":{"email":"20d921fc546146872790792fbd1b5fc4bad0eb3d@apple.com","name":"Duncan P. N. Exon Smith"},"message":"Prevent CHECK-NOTs from matching file paths\n\nA build directory with a name like `build-Werror` would hit a false\npositive on these `CHECK-NOT`s before, since the actual error line looks\nlike:\n\n    .../build-Werror/bin/llvm-as <stdin>:1:2: error: ...\n\nSwitch to using:\n\n    CHECK-NOT: error:\n\n(note the trailing semi-colon) to avoid matching almost any file path.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232917 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/Zoxc/llvm/commits/031fbaeb296558e343ddc302d169f2b2673f58f5"},{"sha":"00edfaecf079bd80ed9d26f6e97fcdfc936c6937","author":{"email":"ea91796269c7842d401af30276638d4aaa593379@googlemail.com","name":"Benjamin Kramer"},"message":"FoldingSet: Make FoldingSetImpl's dtor protected and non-virtual\n\nIt's not intended to be polymorphically deleted. Make FoldingSet\nand ContextualFoldingSet final to avoid noise from -Wnon-virtual-dtor.\n\nNo functional change intended.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232922 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/Zoxc/llvm/commits/00edfaecf079bd80ed9d26f6e97fcdfc936c6937"},{"sha":"a36668c3f019f05186917db2f3d479dc16415463","author":{"email":"fbe9e45cbb51ebd86366cc402735e3c7e9b1e064@gmail.com","name":"David Majnemer"},"message":"Silence a GCC warning\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232923 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/Zoxc/llvm/commits/a36668c3f019f05186917db2f3d479dc16415463"},{"sha":"da740f1e8ece60eb8eb804004d4b6e07b4f14d5a","author":{"email":"0c9ca018c303606191d06dd2c0bdf1206717c3f3@gmail.com","name":"Craig Topper"},"message":"[X86] Add one stepping of Broadwell to the CPU name autodetection for march=native.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232927 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/Zoxc/llvm/commits/da740f1e8ece60eb8eb804004d4b6e07b4f14d5a"},{"sha":"38d5f483976a1c085701ca27c9a328655fb4f70c","author":{"email":"0c9ca018c303606191d06dd2c0bdf1206717c3f3@gmail.com","name":"Craig Topper"},"message":"Fix typo 'AVX too' instead of 'AVX2'\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232929 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/Zoxc/llvm/commits/38d5f483976a1c085701ca27c9a328655fb4f70c"},{"sha":"858c62e51ee983e22915f748447ecef52b432851","author":{"email":"74486463aa8344ad78208a26153a7177f8db5983@gmail.com","name":"Lang Hames"},"message":"[Orc] Add missing -use-orcmcjit flag to a number of Orc regression tests.\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232931 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/Zoxc/llvm/commits/858c62e51ee983e22915f748447ecef52b432851"},{"sha":"e86dbbf0583dd256ee469160a598f848cadd03e5","author":{"email":"76a8e82c3bdc78a1f9490a34857cdee8b1b06a45@anl.gov","name":"Hal Finkel"},"message":"[SDAG] Don't widen VSETCC during type legalization for split operands\n\nBecause the operands of a vector SETCC node can be of a different type from the\nresult (and often are), it can happen that even if we'd prefer to widen the\nresult type of the SETCC, the operands have been split instead. In this case,\nthe SETCC result also must be split. This mirrors what is done in\nWidenVecRes_SELECT, and should be NFC elsewhere because if the operands are not\nwidened the following calls to GetWidenedVector will assert (which is what was\nhappening in the test case).\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232935 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/Zoxc/llvm/commits/e86dbbf0583dd256ee469160a598f848cadd03e5"},{"sha":"eb7e9ccad879026176d4731001540d88a6869611","author":{"email":"157f0aa387af74e0e19b139f9b56b9a20fc05454@imgtec.com","name":"Daniel Sanders"},"message":"[aarch64] Distinguish the 'Q' and 'm' inline assembly memory constraints.\n\nSummary:\nBut still handle them the same way since I don't know how they differ on\nthis target.\n\nClang also has code for 'Ump', 'Utf', 'Usa', and 'Ush' but calls\nllvm_unreachable() on this code path so they are not converted to a\nconstraint id at the moment.\n\nNo functional change intended.\n\nReviewers: t.p.northover\n\nSubscribers: aemerson, llvm-commits\n\nDifferential Revision: http://reviews.llvm.org/D8177\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232941 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/Zoxc/llvm/commits/eb7e9ccad879026176d4731001540d88a6869611"},{"sha":"15863e5e5f1eecedb2165690d39ff6e37968dd6a","author":{"email":"15ca74a11a0ab8a7615bd8f2695eec9feb05b533@imgtec.com","name":"Petar Jovanovic"},"message":"Fix sign extension for MIPS64 in makeLibCall function\n\nFixing sign extension in makeLibCall for MIPS64. In MIPS64 architecture all\n32 bit arguments (int, unsigned int, float 32 (soft float)) must be sign\nextended. This fixes test \"MultiSource/Applications/oggenc/\".\n\nPatch by Strahinja Petrovic.\n\nDifferential Revision: http://reviews.llvm.org/D7791\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232943 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/Zoxc/llvm/commits/15863e5e5f1eecedb2165690d39ff6e37968dd6a"},{"sha":"bd8e1b1dfed8cacc94bc09ae9e086f52f6aa4b46","author":{"email":"ea91796269c7842d401af30276638d4aaa593379@googlemail.com","name":"Benjamin Kramer"},"message":"Move private classes into anonymous namespaces\n\nNFC.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232944 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/Zoxc/llvm/commits/bd8e1b1dfed8cacc94bc09ae9e086f52f6aa4b46"},{"sha":"cab2a096fdf27f1c3cf32ebc777e3560ac0dd0f5","author":{"email":"ea91796269c7842d401af30276638d4aaa593379@googlemail.com","name":"Benjamin Kramer"},"message":"[gcov] Move formatBranchInfo into an anonymous namespace.\n\nNFC.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232949 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/Zoxc/llvm/commits/cab2a096fdf27f1c3cf32ebc777e3560ac0dd0f5"},{"sha":"de5be4657f8311b78bcea068c282c61351efcdfb","author":{"email":"f0ffa6f967f90214e3dddd44a9618a10ee27acfa@arm.com","name":"Bradley Smith"},"message":"[ARM] Add more pattern matching for f16 <-> f64 conversions\n\nSpecifically when the conversion is done in two steps, f16 -> f32 -> f64.\n\nFor example:\n\n%1 = tail call float @llvm.convert.from.fp16.f32(i16 %0)\n%conv = fpext float %1 to double\n\nto:\n\nvcvtb.f64.f16\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232954 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/Zoxc/llvm/commits/de5be4657f8311b78bcea068c282c61351efcdfb"},{"sha":"fdfad962a4861e69b66ec8b93147bfaf4013db28","author":{"email":"a30d5417db2a59efc67ebffe542ab1a89e3ed3a7@codeaurora.org","name":"Colin LeMahieu"},"message":"[Hexagon] Simplify boolean expression\n\nPatch by Richard\nhttp://reviews.llvm.org/D8523\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232955 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/Zoxc/llvm/commits/fdfad962a4861e69b66ec8b93147bfaf4013db28"},{"sha":"fd58f22744e692773da5a806686c6d787826c3cd","author":{"email":"85590917cb30a670bf23f5b4273617f8815d1e87@amd.com","name":"Tom Stellard"},"message":"R600/SI: Fix crash in SIInstrInfo::areLoadsFromSameBasePtr()\n\nThis function assumed that SMRD instructions always have immediate\noffsets, which is not always the case.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232957 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/Zoxc/llvm/commits/fd58f22744e692773da5a806686c6d787826c3cd"},{"sha":"2f729838f1e1baa473f669be3e8351cb591f1c92","author":{"email":"f4a524c472c347a18d71daaa7c4ae51db69c69da@arm.com","name":"James Molloy"},"message":"[ARM] Remove target-specific ITOFP/FPTOI nodes\n\nAnton tried this 5 years ago but it was reverted due to extra VMOVs\nbeing emitted. This can be easily fixed with a liberal application\nof patterns - matching loads/stores and extractelts.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232958 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/Zoxc/llvm/commits/2f729838f1e1baa473f669be3e8351cb591f1c92"},{"sha":"437c2863f0dc9795c7f2bb8c1b24baf8d96e8cf0","author":{"email":"e83e4a9813852caf164372e4b6bd506b7819d6ab@google.com","name":"Eli Bendersky"},"message":"Simplify boolean expressions with true and false using clang-tidy\n\nPatch by Richard (legalize@xmission.com)\n\nDifferential Revision: http://reviews.llvm.org/D8521\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232961 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/Zoxc/llvm/commits/437c2863f0dc9795c7f2bb8c1b24baf8d96e8cf0"},{"sha":"a75fecc3702562ef6c51c76242b9c31eed40b67a","author":{"email":"f0ffa6f967f90214e3dddd44a9618a10ee27acfa@arm.com","name":"Bradley Smith"},"message":"Revert \"[ARM] Add more pattern matching for f16 <-> f64 conversions\"\n\nThis change is incorrect since it converts double rounding into single rounding,\nwhich can produce different results. Instead this optimization will be done by\nmodifying Clang's codegen to not produce double rounding in the first place.\n\nThis reverts commit r232954.\n\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232962 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/Zoxc/llvm/commits/a75fecc3702562ef6c51c76242b9c31eed40b67a"}]}