{"push_id":809749546,"size":6,"distinct_size":6,"ref":"refs/heads/master","head":"d170014938e551ab33ce9b1dcdf99e53e2b5363d","before":"a5d65f41c9da764376510abc2e85e87375ef870a","commits":[{"sha":"f07af3c36460a829be3b06bac577517ca6602a50","author":{"email":"d9688ef3057d444a28533a3a1e7008526e24d16d@eclipso.eu","name":"Roy Spliet"},"message":"fb/ramgt215: Restructure r111100 calculation for DDR2\n\nSeems to be mostly equal to DDR3 on < GT218, should improve stability for\nDDR2 reclocks.\n\nSigned-off-by: Roy Spliet <rspliet@eclipso.eu>","distinct":true,"url":"https://api.github.com/repos/RSpliet/kernel-nouveau-nv50-pm/commits/f07af3c36460a829be3b06bac577517ca6602a50"},{"sha":"ab701fefdb16a201c7306709cee63543bef83b05","author":{"email":"d9688ef3057d444a28533a3a1e7008526e24d16d@eclipso.eu","name":"Roy Spliet"},"message":"fb/ramnv50: Voltage GPIOs\n\nDoes not seem to be necessary for NVA0, hence untested by me.\n\nSigned-off-by: Roy Spliet <rspliet@eclipso.eu>\nTested-by: Pierre Moreau <pierre.morrow@free.fr>","distinct":true,"url":"https://api.github.com/repos/RSpliet/kernel-nouveau-nv50-pm/commits/ab701fefdb16a201c7306709cee63543bef83b05"},{"sha":"bb734440d8dc62ff30768a5fc01aeedab9e5609e","author":{"email":"d9688ef3057d444a28533a3a1e7008526e24d16d@eclipso.eu","name":"Roy Spliet"},"message":"fb/ramnv50: Deal with cards without timing entries\n\nLike Pierre's G94. We might want to structure Kepler similarly in a follow-up.\n\nSigned-off-by: Roy Spliet <rspliet@eclipso.eu>\nTested-by: Pierre Moreau <pierre.morrow@free.fr>","distinct":true,"url":"https://api.github.com/repos/RSpliet/kernel-nouveau-nv50-pm/commits/bb734440d8dc62ff30768a5fc01aeedab9e5609e"},{"sha":"2937c4c9a7cfa63a045dd2c14a93c335ea4c30f3","author":{"email":"d9688ef3057d444a28533a3a1e7008526e24d16d@eclipso.eu","name":"Roy Spliet"},"message":"fb/ramnv50: Script changes for G94 and up\n\n10053c is not even read on some cards, and I have no idea exactly what the\ncriteria are. Likely NVIDIA pre-scans the VBIOS and in their driver disables\nall features that are never used. The practical effect should be the same\nas this implementation though.\n\nSigned-off-by: Roy Spliet <rspliet@eclipso.eu>\nTested-by: Pierre Moreau <pierre.morrow@free.fr>","distinct":true,"url":"https://api.github.com/repos/RSpliet/kernel-nouveau-nv50-pm/commits/2937c4c9a7cfa63a045dd2c14a93c335ea4c30f3"},{"sha":"1e8efcf9c49683ce023b90a3b1ce977414ff9c0d","author":{"email":"d9688ef3057d444a28533a3a1e7008526e24d16d@eclipso.eu","name":"Roy Spliet"},"message":"bus/hwsq: Implement VBLANK waiting heuristic\n\nAvoids waiting for VBLANKS that never arrive on headless or otherwise\nunconventional set-ups. Strategy taken from MEMX.\n\nSigned-off-by: Roy Spliet <rspliet@eclipso.eu>\nTested-by: Pierre Moreau <pierre.morrow@free.fr>","distinct":true,"url":"https://api.github.com/repos/RSpliet/kernel-nouveau-nv50-pm/commits/1e8efcf9c49683ce023b90a3b1ce977414ff9c0d"},{"sha":"d170014938e551ab33ce9b1dcdf99e53e2b5363d","author":{"email":"d9688ef3057d444a28533a3a1e7008526e24d16d@eclipso.eu","name":"Roy Spliet"},"message":"clk/g84: Enable reclocking for GDDR3 G94-G200\n\nYour milage may vary, as it's only been tested on a single G94 and one G96.\n\nSigned-off-by: Roy Spliet <rspliet@eclipso.eu>\nTested-by: Pierre Moreau <pierre.morrow@free.fr>","distinct":true,"url":"https://api.github.com/repos/RSpliet/kernel-nouveau-nv50-pm/commits/d170014938e551ab33ce9b1dcdf99e53e2b5363d"}]}