{"push_id":780500021,"size":43,"distinct_size":43,"ref":"refs/heads/master","head":"695c1329e8c5cefcd79ed43ca556ddfaeefb368e","before":"da9d8580ff9ce17452ef931072e5799a9df8807f","commits":[{"sha":"458a070076dc920a7106f0c8f0cfa880503ce498","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"pinctrl: Add help text to Kconfig\n\nThe pinctrl Kconfig options should have help messages. Add this to a few\noptions.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/trini/u-boot/commits/458a070076dc920a7106f0c8f0cfa880503ce498"},{"sha":"c5acf4a2b3c6fd49aa0bc02db50f4b625b2e2991","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"pinctrl: Add the concept of peripheral IDs\n\nMy original pinctrl patch operating using a peripheral ID enum. This was\nshared between pinmux and clock and provides an easy way to specify a device\nthat needs to be controlled, even it is does not (yet) have a driver within\ndriver model.\n\nMasahiro's new simple pinctrl gets around this by providing a\nset_state_simple() pinctrl method. By passing a device to that call the\nperipheral ID becomes unnecessary. If the driver needs it, it can calculate\nit itself and use it internally.\n\nHowever this does not solve the problem for peripheral clocks. The 'pure'\nsolution would be to pass a driver to the clock uclass also. But this\nrequires that all devices should have a driver, and a struct udevide. Also\na key optimisation of the clock uclass is allowing a peripheral clock to\nbe set even when there is no device for that clock.\n\nThere may be a better way to achive the same goal, but for now it seems\nexpedient to add in peripheral ID to the pinctrl uclass. Two methods are\nadded - one to get the peripheral ID and one to select it. The existing\nset_state_simple() is effectively the union of these.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/trini/u-boot/commits/c5acf4a2b3c6fd49aa0bc02db50f4b625b2e2991"},{"sha":"6a436c9182a90551739a5b7b3f44254234056915","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"dm: led: Tidy up SPL options for the led and led-gpio\n\nAt present SPL does not have its own option. But these features can\nincrease SPL code size. Adjust the Kconfig and Makefile so that\nseparate a SPL option can be selected.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/trini/u-boot/commits/6a436c9182a90551739a5b7b3f44254234056915"},{"sha":"e3563f2ec768fb989149362ca0c6ca4a27513924","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"mmc: Support bypass mode with the get_mmc_clk() method\n\nSome SoCs want to adjust the input clock to the DWMMC block as a way of\ncontrolling the MMC bus clock. Update the get_mmc_clk() method to support\nthis.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>\nAcked-by: Jaehoon Chung <jh80.chung@samsung.com>","distinct":true,"url":"https://api.github.com/repos/trini/u-boot/commits/e3563f2ec768fb989149362ca0c6ca4a27513924"},{"sha":"3346c87625b8a736af5636a0bd1be89f781eb5f2","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"dm: Improve handling of a missing uclass\n\nWhen a uclass definition is missing, no drivers in that uclass can operate.\nThis can happen if a board has a strange collection of options (e.g. the\ndriver is enabled but the uclass is not).\n\nUnfortunately this is very confusing at present. Starting up driver model\nresults in a -ENOENT error, which is pretty generic. Quite a big of digging\nis needed to get to the root cause.\n\nTo help with this, change the error to a very strange one with no other\nusers in U-Boot. Also add a debug message.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/trini/u-boot/commits/3346c87625b8a736af5636a0bd1be89f781eb5f2"},{"sha":"bc7b2f431d5e5b48c009007bdf22d2f2d8aed4c4","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"dm: Provide better debugging when a device fails to bind\n\nAll devices should bind without error. But when they don't, they can cause\ndriver model init to fail. A real situation where this can happen is when\nthere is a missing uclass.\n\nAdd a debug() call to dm_scan_fdt_node to make this easier to track.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/trini/u-boot/commits/bc7b2f431d5e5b48c009007bdf22d2f2d8aed4c4"},{"sha":"c6aabe9289e4f3a3b9066cd494c413302dfa970a","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"arm: reset: Avoid a build error when the reset uclass is enabled\n\nThere can be only one do_reset(). When CONFIG_RESET is enabled this is\nprovided by the reset uclass, and ARM's version should be disabled.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/trini/u-boot/commits/c6aabe9289e4f3a3b9066cd494c413302dfa970a"},{"sha":"765a1b1eb397f613a1d522224221d1dd4a812888","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"rockchip: Add serial support\n\nAdd support for the Rockchip serial device using the ns16550 driver.\nThis uses driver model and device tree for both SPL and U-Boot proper.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/trini/u-boot/commits/765a1b1eb397f613a1d522224221d1dd4a812888"},{"sha":"344c837686b4268882ee4942f2a1e5e5716c7383","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"rockchip: Bring in RK3288 device tree file includes and bindings\n\nBring in required device tree files from Linux. Since mainline Linux is\nsomewhat behind, use the files from the Chromium tree. We can re-sync once\nfurther code is acccepted upstream.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/trini/u-boot/commits/344c837686b4268882ee4942f2a1e5e5716c7383"},{"sha":"73a88d0e441ca389b548cf6104b8440ba858b1eb","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"rockchip: rk3288: dts: Make core devices available early\n\nIn SPL we need access to the CRU and other peripherals so we can set up\nSDRAM. Mark these so that they will remain in the device tree.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/trini/u-boot/commits/73a88d0e441ca389b548cf6104b8440ba858b1eb"},{"sha":"424b86ae597fa933b94fa91a6683e8c6b47af81d","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"mkimage: Allow padding to any length\n\nAt present there is an arbitrary limit of 4KB for padding. Rockchip needs\nmore than that, so remove this restriction.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>\nReviewed-by: Joe Hershberger <joe.hershberger@ni.com>","distinct":true,"url":"https://api.github.com/repos/trini/u-boot/commits/424b86ae597fa933b94fa91a6683e8c6b47af81d"},{"sha":"1b99e5bbb619f91c675306226a262a14c9d9a3a3","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"mkimage: Allow the original file size to be recorded\n\nAllow the image handler to store the original input file size so that it\ncan reference it later.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>\nReviewed-by: Joe Hershberger <joe.hershberger@ni.com>","distinct":true,"url":"https://api.github.com/repos/trini/u-boot/commits/1b99e5bbb619f91c675306226a262a14c9d9a3a3"},{"sha":"a131c1f44231e3546b1cca8480400c98d1dd7ac8","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"rockchip: Add the rkimage format to mkimage\n\nRockchip SoCs require certain formats for code that they execute, The\nsimplest format is a 4-byte header at the start of a binary file. Add\nsupport for this so that we can create images that the boot ROM understands.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/trini/u-boot/commits/a131c1f44231e3546b1cca8480400c98d1dd7ac8"},{"sha":"f9a3c278b98a17eddbf0ad903689cce47e3e6f47","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"rockchip: Add support for the SD image\n\nThe Rockchip boot ROM requires a particular file format. It consists of\n64KB of zeroes, a 512-byte header encoded with RC4, and then some executable\ncode.\n\nAdd support to mkimage so that an SPL image (u-boot-spl-dtb.bin) can be\nconverted to this format.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/trini/u-boot/commits/f9a3c278b98a17eddbf0ad903689cce47e3e6f47"},{"sha":"10b84fe1b59b4f8b485057b911f2d5bdd9b1c9a4","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"rockchip: Add support for the SPI image\n\nThe Rockchip boot ROM requires a particular file format for booting from SPI.\nIt consists of a 512-byte header encoded with RC4, some padding and then up\nto 32KB of executable code in 2KB blocks, separated by 2KB empty blocks.\n\nAdd support to mkimage so that an SPL image (u-boot-spl-dtb.bin) can be\nconverted to this format. This allows booting from SPI flash on supported\nmachines.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/trini/u-boot/commits/10b84fe1b59b4f8b485057b911f2d5bdd9b1c9a4"},{"sha":"1f8f7730a8a3c8cc73ecb5715f5d87ed55fec541","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"rockchip: gpio: Add rockchip GPIO driver\n\nThis supports RK3288 at present. It does not implement functions or support\nfor pull up/down.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/trini/u-boot/commits/1f8f7730a8a3c8cc73ecb5715f5d87ed55fec541"},{"sha":"26ad30e9d3ec445f61f94910fb14cc6e7d8efa25","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"rockchip: Add basic peripheral and clock definitions\n\nAdd header files for the peripherals and clocks supported on Rockchip\nplatforms. The particular implementation (and register set) for each is\nSoC-specific, but it seems that the naming can be generic.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/trini/u-boot/commits/26ad30e9d3ec445f61f94910fb14cc6e7d8efa25"},{"sha":"d2c88f7d528a3490dc3ce5317db39c0912bd2de1","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"power: Add support for ACT8846 PMIC\n\nAdd a driver for the ACT8846 PMIC. This supports several LDOs and BUCKs and\nis connected to the I2C bus. This driver supports using a regulator driver\nto access the regulators.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/trini/u-boot/commits/d2c88f7d528a3490dc3ce5317db39c0912bd2de1"},{"sha":"9119820b6bd5a8131ae5d5f6f352ba657fe889a6","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"power: regulator: Add a driver for ACT8846 regulators\n\nAdd a full regulator driver for the ACT8846. This provides easy access to\nvoltage and current settings for each regulator.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/trini/u-boot/commits/9119820b6bd5a8131ae5d5f6f352ba657fe889a6"},{"sha":"99c156508286ff0338c78b24e2498bb17362af1d","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"rockchip: rk3288: Add clock driver\n\nAdd a driver for setting up and modifying the various PLLs and peripheral\nclocks on the RK3288.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/trini/u-boot/commits/99c156508286ff0338c78b24e2498bb17362af1d"}]}