{"push_id":616056699,"size":1,"distinct_size":1,"ref":"refs/heads/master","head":"c4550d4c08cee0ae1d804ccadd998c4e56675cee","before":"05d2c3f4b203b361dc7b2202128ee06a9a210afe","commits":[{"sha":"c4550d4c08cee0ae1d804ccadd998c4e56675cee","author":{"email":"f2c659f01951776204a6c5b902787d9019fbeebd@arndb.de","name":"Arnd Bergmann"},"message":"crypto: ux500 - make interrupt mode plausible\n\ncommit e1f8859ee265fc89bd21b4dca79e8e983a044892 upstream.\n\nThe interrupt handler in the ux500 crypto driver has an obviously\nincorrect way to access the data buffer, which for a while has\ncaused this build warning:\n\n../ux500/cryp/cryp_core.c: In function 'cryp_interrupt_handler':\n../ux500/cryp/cryp_core.c:234:5: warning: passing argument 1 of '__fswab32' makes integer from pointer without a cast [enabled by default]\n     writel_relaxed(ctx->indata,\n     ^\nIn file included from ../include/linux/swab.h:4:0,\n                 from ../include/uapi/linux/byteorder/big_endian.h:12,\n                 from ../include/linux/byteorder/big_endian.h:4,\n                 from ../arch/arm/include/uapi/asm/byteorder.h:19,\n                 from ../include/asm-generic/bitops/le.h:5,\n                 from ../arch/arm/include/asm/bitops.h:340,\n                 from ../include/linux/bitops.h:33,\n                 from ../include/linux/kernel.h:10,\n                 from ../include/linux/clk.h:16,\n                 from ../drivers/crypto/ux500/cryp/cryp_core.c:12:\n../include/uapi/linux/swab.h:57:119: note: expected '__u32' but argument is of type 'const u8 *'\n static inline __attribute_const__ __u32 __fswab32(__u32 val)\n\nThere are at least two, possibly three problems here:\na) when writing into the FIFO, we copy the pointer rather than the\n   actual data we want to give to the hardware\nb) the data pointer is an array of 8-bit values, while the FIFO\n   is 32-bit wide, so both the read and write access fail to do\n   a proper type conversion\nc) This seems incorrect for big-endian kernels, on which we need to\n   byte-swap any register access, but not normally FIFO accesses,\n   at least the DMA case doesn't do it either.\n\nThis converts the bogus loop to use the same readsl/writesl pair\nthat we use for the two other modes (DMA and polling). This is\nmore efficient and consistent, and probably correct for endianess.\n\nThe bug has existed since the driver was first merged, and was\nprobably never detected because nobody tried to use interrupt mode.\nIt might make sense to backport this fix to stable kernels, depending\non how the crypto maintainers feel about that.\n\nSigned-off-by: Arnd Bergmann <arnd@arndb.de>\nCc: linux-crypto@vger.kernel.org\nCc: Fabio Baltieri <fabio.baltieri@linaro.org>\nCc: Linus Walleij <linus.walleij@linaro.org>\nCc: Herbert Xu <herbert@gondor.apana.org.au>\nCc: \"David S. Miller\" <davem@davemloft.net>\nSigned-off-by: Herbert Xu <herbert@gondor.apana.org.au>\nSigned-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>","distinct":true,"url":"https://api.github.com/repos/friedrich420/N4-AEL-KERNEL-LOLLIPOP/commits/c4550d4c08cee0ae1d804ccadd998c4e56675cee"}]}