{"action":"opened","number":1422,"pull_request":{"url":"https://api.github.com/repos/dotnet/coreclr/pulls/1422","id":43082922,"html_url":"https://github.com/dotnet/coreclr/pull/1422","diff_url":"https://github.com/dotnet/coreclr/pull/1422.diff","patch_url":"https://github.com/dotnet/coreclr/pull/1422.patch","issue_url":"https://api.github.com/repos/dotnet/coreclr/issues/1422","number":1422,"state":"open","locked":false,"title":"LTTng supports hardware context","user":{"login":"jgalar","id":1395184,"avatar_url":"https://avatars.githubusercontent.com/u/1395184?v=3","gravatar_id":"","url":"https://api.github.com/users/jgalar","html_url":"https://github.com/jgalar","followers_url":"https://api.github.com/users/jgalar/followers","following_url":"https://api.github.com/users/jgalar/following{/other_user}","gists_url":"https://api.github.com/users/jgalar/gists{/gist_id}","starred_url":"https://api.github.com/users/jgalar/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/jgalar/subscriptions","organizations_url":"https://api.github.com/users/jgalar/orgs","repos_url":"https://api.github.com/users/jgalar/repos","events_url":"https://api.github.com/users/jgalar/events{/privacy}","received_events_url":"https://api.github.com/users/jgalar/received_events","type":"User","site_admin":false},"body":"LTTng supports the annotation of events (both kernel and userspace) with perf hardware counters via the use of the \"add-context\" command.\r\n\r\nFor instance, userspace events can be annotated with the Instruction Cache Prefetch Misses counter using\r\n```\r\n$ lttng add-context --userspace --type perf:thread:L1-icache-prefetch-misses\r\n```\r\n\r\nThe complete list of available contexts is given by\r\n```\r\n$ lttng add-context --help\r\nusage: lttng add-context -t TYPE [-k|-u] [OPTIONS]\r\n\r\nIf no channel is given (-c), the context is added to\r\nall channels.\r\n\r\nOtherwise the context is added only to the channel (-c).\r\n\r\nExactly one domain (-k or -u) must be specified.\r\n\r\nOptions:\r\n  -h, --help               Show this help\r\n      --list-options       Simple listing of options\r\n  -s, --session NAME       Apply to session name\r\n  -c, --channel NAME       Apply to channel\r\n  -k, --kernel             Apply to the kernel tracer\r\n  -u, --userspace          Apply to the user-space tracer\r\n\r\nContext:\r\n  -t, --type TYPE          Context type. You can repeat that option on\r\n                           the command line to specify multiple contexts at once.\r\n                           (--kernel preempts --userspace)\r\n                           TYPE can be one of the strings below:\r\n                               pid, procname, prio, nice, vpid, tid, pthread_id,\r\n                               vtid, ppid, vppid, hostname, ip,\r\n                               perf:cpu:cpu-cycles, perf:cpu:cycles,\r\n                               perf:cpu:stalled-cycles-frontend,\r\n                               perf:cpu:idle-cycles-frontend,\r\n                               perf:cpu:stalled-cycles-backend,\r\n                               perf:cpu:idle-cycles-backend,\r\n                               perf:cpu:instructions, perf:cpu:cache-references,\r\n                               perf:cpu:cache-misses,\r\n                               perf:cpu:branch-instructions, perf:cpu:branches,\r\n                               perf:cpu:branch-misses, perf:cpu:bus-cycles,\r\n                               perf:cpu:L1-dcache-loads,\r\n                               perf:cpu:L1-dcache-load-misses,\r\n                               perf:cpu:L1-dcache-stores,\r\n                               perf:cpu:L1-dcache-store-misses,\r\n                               perf:cpu:L1-dcache-prefetches,\r\n                               perf:cpu:L1-dcache-prefetch-misses,\r\n                               perf:cpu:L1-icache-loads,\r\n                               perf:cpu:L1-icache-load-misses,\r\n                               perf:cpu:L1-icache-stores,\r\n                               perf:cpu:L1-icache-store-misses,\r\n                               perf:cpu:L1-icache-prefetches,\r\n                               perf:cpu:L1-icache-prefetch-misses,\r\n                               perf:cpu:LLC-loads, perf:cpu:LLC-load-misses,\r\n                               perf:cpu:LLC-stores, perf:cpu:LLC-store-misses,\r\n                               perf:cpu:LLC-prefetches,\r\n                               perf:cpu:LLC-prefetch-misses,\r\n                               perf:cpu:dTLB-loads, perf:cpu:dTLB-load-misses,\r\n                               perf:cpu:dTLB-stores, perf:cpu:dTLB-store-misses,\r\n                               perf:cpu:dTLB-prefetches,\r\n                               perf:cpu:dTLB-prefetch-misses,\r\n                               perf:cpu:iTLB-loads, perf:cpu:iTLB-load-misses,\r\n                               perf:cpu:branch-loads,\r\n                               perf:cpu:branch-load-misses, perf:cpu:cpu-clock,\r\n                               perf:cpu:task-clock, perf:cpu:page-fault,\r\n                               perf:cpu:faults, perf:cpu:major-faults,\r\n                               perf:cpu:minor-faults, perf:cpu:context-switches,\r\n                               perf:cpu:cs, perf:cpu:cpu-migrations,\r\n                               perf:cpu:migrations, perf:cpu:alignment-faults,\r\n                               perf:cpu:emulation-faults,\r\n                               perf:thread:cpu-cycles, perf:thread:cycles,\r\n                               perf:thread:stalled-cycles-frontend,\r\n                               perf:thread:idle-cycles-frontend,\r\n                               perf:thread:stalled-cycles-backend,\r\n                               perf:thread:idle-cycles-backend,\r\n                               perf:thread:instructions,\r\n                               perf:thread:cache-references,\r\n                               perf:thread:cache-misses,\r\n                               perf:thread:branch-instructions,\r\n                               perf:thread:branches, perf:thread:branch-misses,\r\n                               perf:thread:bus-cycles,\r\n                               perf:thread:L1-dcache-loads,\r\n                               perf:thread:L1-dcache-load-misses,\r\n                               perf:thread:L1-dcache-stores,\r\n                               perf:thread:L1-dcache-store-misses,\r\n                               perf:thread:L1-dcache-prefetches,\r\n                               perf:thread:L1-dcache-prefetch-misses,\r\n                               perf:thread:L1-icache-loads,\r\n                               perf:thread:L1-icache-load-misses,\r\n                               perf:thread:L1-icache-stores,\r\n                               perf:thread:L1-icache-store-misses,\r\n                               perf:thread:L1-icache-prefetches,\r\n                               perf:thread:L1-icache-prefetch-misses,\r\n                               perf:thread:LLC-loads,\r\n                               perf:thread:LLC-load-misses,\r\n                               perf:thread:LLC-stores,\r\n                               perf:thread:LLC-store-misses,\r\n                               perf:thread:LLC-prefetches,\r\n                               perf:thread:LLC-prefetch-misses,\r\n                               perf:thread:dTLB-loads,\r\n                               perf:thread:dTLB-load-misses,\r\n                               perf:thread:dTLB-stores,\r\n                               perf:thread:dTLB-store-misses,\r\n                               perf:thread:dTLB-prefetches,\r\n                               perf:thread:dTLB-prefetch-misses,\r\n                               perf:thread:iTLB-loads,\r\n                               perf:thread:iTLB-load-misses,\r\n                               perf:thread:branch-loads,\r\n                               perf:thread:branch-load-misses,\r\n                               perf:thread:cpu-clock, perf:thread:task-clock,\r\n                               perf:thread:page-fault, perf:thread:faults,\r\n                               perf:thread:major-faults,\r\n                               perf:thread:minor-faults,\r\n                               perf:thread:context-switches, perf:thread:cs,\r\n                               perf:thread:cpu-migrations,\r\n                               perf:thread:migrations,\r\n                               perf:thread:alignment-faults,\r\n                               perf:thread:emulation-faults\r\nNote that the vpid, vppid and vtid context types represent the virtual process id,\r\nvirtual parent process id and virtual thread id as seen from the current execution context\r\nas opposed to the pid, ppid and tid which are kernel internal data structures.\r\n\r\nExample:\r\nThis command will add the context information 'prio' and two per-cpu\r\nperf counters (hardware branch misses and cache misses), to all channels\r\nin the trace data output:\r\n# lttng add-context -k -t prio -t perf:cpu:branch-misses -t perf:cpu:cache-misses\r\n```\r\n\r\nHowever, the counters cannot be \"sampled\"; they are only recorded along with events to which the context has been associated.\r\n\r\nhttps://lttng.org/docs/#doc-adding-context","created_at":"2015-08-21T21:27:43Z","updated_at":"2015-08-21T21:27:43Z","closed_at":null,"merged_at":null,"merge_commit_sha":null,"assignee":null,"milestone":null,"commits_url":"https://api.github.com/repos/dotnet/coreclr/pulls/1422/commits","review_comments_url":"https://api.github.com/repos/dotnet/coreclr/pulls/1422/comments","review_comment_url":"https://api.github.com/repos/dotnet/coreclr/pulls/comments{/number}","comments_url":"https://api.github.com/repos/dotnet/coreclr/issues/1422/comments","statuses_url":"https://api.github.com/repos/dotnet/coreclr/statuses/f15258cb52278152bb319e50c2a930f1c3818bd3","head":{"label":"jgalar:master","ref":"master","sha":"f15258cb52278152bb319e50c2a930f1c3818bd3","user":{"login":"jgalar","id":1395184,"avatar_url":"https://avatars.githubusercontent.com/u/1395184?v=3","gravatar_id":"","url":"https://api.github.com/users/jgalar","html_url":"https://github.com/jgalar","followers_url":"https://api.github.com/users/jgalar/followers","following_url":"https://api.github.com/users/jgalar/following{/other_user}","gists_url":"https://api.github.com/users/jgalar/gists{/gist_id}","starred_url":"https://api.github.com/users/jgalar/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/jgalar/subscriptions","organizations_url":"https://api.github.com/users/jgalar/orgs","repos_url":"https://api.github.com/users/jgalar/repos","events_url":"https://api.github.com/users/jgalar/events{/privacy}","received_events_url":"https://api.github.com/users/jgalar/received_events","type":"User","site_admin":false},"repo":{"id":41177279,"name":"coreclr","full_name":"jgalar/coreclr","owner":{"login":"jgalar","id":1395184,"avatar_url":"https://avatars.githubusercontent.com/u/1395184?v=3","gravatar_id":"","url":"https://api.github.com/users/jgalar","html_url":"https://github.com/jgalar","followers_url":"https://api.github.com/users/jgalar/followers","following_url":"https://api.github.com/users/jgalar/following{/other_user}","gists_url":"https://api.github.com/users/jgalar/gists{/gist_id}","starred_url":"https://api.github.com/users/jgalar/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/jgalar/subscriptions","organizations_url":"https://api.github.com/users/jgalar/orgs","repos_url":"https://api.github.com/users/jgalar/repos","events_url":"https://api.github.com/users/jgalar/events{/privacy}","received_events_url":"https://api.github.com/users/jgalar/received_events","type":"User","site_admin":false},"private":false,"html_url":"https://github.com/jgalar/coreclr","description":"This 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