{"push_id":584656943,"size":5,"distinct_size":5,"ref":"refs/heads/staging","head":"a3214b4b9979320249b46d12d857a5a66cbcb49e","before":"f74a9a5fe44d4060ae02d9bf7cefc597a3a6b785","commits":[{"sha":"67c7e46c7c78b36a3541c48bdb3b4739b932a426","author":{"email":"9be92b3dbbd6611e3e4c9209fb3d04b4919e7cca@citrix.com","name":"Ian Campbell"},"message":"xen: arm32: reduce default size of the xenheap\n\n... and make it tunable via the command line.\n\n1/8 of RAM is 128M on a 1GB system and 256M on a 2GB system etc,\nwhich is a lot. 1/32 of RAM seems more reasonable. Also drop the\nminimum to 32M.\n\nLeave the maximum at 1GB.\n\nSigned-off-by: Ian Campbell <ian.campbell@citrix.com>\nReviewed-by: Julien Grall <julien.grall@linaro.org>\nCc: Jintack Lim <jintack@cs.columbia.edu>\nCc: Jan Beulich <JBeulich@suse.com>","distinct":true,"url":"https://api.github.com/repos/mirage/xen/commits/67c7e46c7c78b36a3541c48bdb3b4739b932a426"},{"sha":"7eb6564d2339c7c1c94b74a8228f34a8b4d6444f","author":{"email":"9be92b3dbbd6611e3e4c9209fb3d04b4919e7cca@citrix.com","name":"Ian Campbell"},"message":"xen: arm: log warning for interrupt configuration mismatch\n\nThe ICFGR register is not necessarily writeable, in particular it is\nIMPLEMENTATION DEFINED for a PPI if the configuration register is\nwriteable. Log a warning if the hardware has ignored our write and\nupdate the actual type in the irq descriptor so subsequent code can do\nthe right thing.\n\nThis most likely implies a buggy firmware description (e.g.\ndevice-tree).\n\nThe issue is observed for example on the APM Mustang board where the\ndevice tree (as shipped by Linux) describes all 3 timer interrupts as\nrising edge but the PPI is hard-coded to level triggered (as makes\nsense for an arch timer interrupt).\n\nSigned-off-by: Ian Campbell <ian.campbell@citrix.com>\nReviewed-by: Julien Grall <julien.grall@linaro.org>\nCc: Pranavkumar Sawargaonkar <psawargaonkar@apm.com>","distinct":true,"url":"https://api.github.com/repos/mirage/xen/commits/7eb6564d2339c7c1c94b74a8228f34a8b4d6444f"},{"sha":"61d6a849fd220663462b15990482d1d4b0d3f73b","author":{"email":"9be92b3dbbd6611e3e4c9209fb3d04b4919e7cca@citrix.com","name":"Ian Campbell"},"message":"xen: arm: Warn if timer interrupts are not level triggered\n\nEdge trigger arch timer interrupts really don't make much sense, so if\nwe discover we are booting on such a system issue a warning.\n\nSo far this has only been seen on the fast model emulators which have\nboth an incorrect DT description of the interrupt and a writeable\nICFGR allowing us to program the incorrect configuration. Other\nplatforms have incorrect DT descriptions (warned about by previous\npatch) but the corresponding ICFGR isn't actually writeable so the\neventual configuration is level as desired.\n\nI did consider overriding the incorrect DT on such systems but since\nso far it has only been observed on emulators and we have code in\nplace to deal with edge triggering here I think warning is sufficient\nfor now.\n\nSigned-off-by: Ian Campbell <ian.campbell@citrix.com>\nReviewed-by: Julien Grall <julien.grall@linaro.org>\n[ ijc -- s/contoller/controller twice ]","distinct":true,"url":"https://api.github.com/repos/mirage/xen/commits/61d6a849fd220663462b15990482d1d4b0d3f73b"},{"sha":"1c4159922adf931fa3362963910af8862b4accec","author":{"email":"2fe41d4e32b0bb991f63b975f2bed08c1e666665@linaro.org","name":"Julien Grall"},"message":"xen/arm: vgic: Keep track of vIRQ used by a domain\n\nWhile it's easy to know which hardware IRQ is assigned to a domain, there\nis no way to know which vIRQ is allocated by Xen for a specific domain.\n\nIntroduce a bitmap to keep track of every vIRQ used by a domain. This\nwill be used later to find free vIRQ for interrupt device assignment and\nemulated interrupt.\n\nSigned-off-by: Julien Grall <julien.grall@linaro.org>\nAcked-by: Ian Campbell <ian.campbell@citrix.com>","distinct":true,"url":"https://api.github.com/repos/mirage/xen/commits/1c4159922adf931fa3362963910af8862b4accec"},{"sha":"a3214b4b9979320249b46d12d857a5a66cbcb49e","author":{"email":"2fe41d4e32b0bb991f63b975f2bed08c1e666665@linaro.org","name":"Julien Grall"},"message":"xen/arm: Automatically find a PPI for the DOM0 event channel interrupt\n\nUse the new vgic interface to know which virtual PPI is free and use it\nfor the event channel code.\n\nAt the DOM0 creation time, Xen doesn't know which vIRQ will be free.\nAll the vIRQ will be reserved when we parse the device tree. So we can\nallocate the vIRQ just after the device tree has been parsed.\n\nIt's safe to defer the allocation because no vIRQ can be injected as\nlong as the vCPU is not online.\n\nAs the device tree node \"hypervisor\" containing the description of the\nevent channel interrupt is created earlier, add a placeholder which will\nbe fix up once Xen has allocated the PPI.\n\nAlso correct the check in arch_domain_create to use is_hardware_domain.\n\nSigned-off-by: Julien Grall <julien.grall@linaro.org>\nAcked-by: Ian Campbell <ian.campbell@citrix.com>","distinct":true,"url":"https://api.github.com/repos/mirage/xen/commits/a3214b4b9979320249b46d12d857a5a66cbcb49e"}]}