{"push_id":746059522,"size":1,"distinct_size":1,"ref":"refs/heads/mttcg/current-tests-v2","head":"0953549985134268bf9079a7a01b2631d8a4fdee","before":"7ef2a9749f277cadb654a0305f3f5e113d300c28","commits":[{"sha":"0953549985134268bf9079a7a01b2631d8a4fdee","author":{"email":"60c6d277a8bd81de7fdde19201bf9c58a3df08f4@bennee.com","name":"Alex Bennée"},"message":"arm/barrier-test: add memory barrier tests\n\nThis test has been written mainly to stress multi-threaded TCG behaviour\nbut will demonstrate failure by default on real hardware. The test takes\nthe following parameters:\n\n  - \"lock\" use GCC's locking semantics\n  - \"atomic\" use GCC's __atomic primitives\n  - \"barrier\" use plain dmb() barriers\n  - \"wfelock\" use WaitForEvent sleep\n  - \"excl\" use load/store exclusive semantics\n  - \"acqrel\" use acquire/release semantics\n\nAlso two more options allow the test to be tweaked\n\n  - \"noshuffle\" disables the memory shuffling\n  - \"count=%ld\" set your own per-CPU increment count\n\nSigned-off-by: Alex Bennée <alex.bennee@linaro.org>\n\n---\nv2\n  - Don't use thumb style strexeq stuff\n  - Add atomic, barrier and wfelock tests\n  - Add count/noshuffle test controls","distinct":true,"url":"https://api.github.com/repos/stsquad/kvm-unit-tests/commits/0953549985134268bf9079a7a01b2631d8a4fdee"}]}