{"push_id":574520255,"size":1,"distinct_size":1,"ref":"refs/heads/master","head":"d777c2c0c09f20bf2decf763bb2946291f28960f","before":"c4300b9c0147889e77d2a51ded9fa025545d27e2","commits":[{"sha":"d777c2c0c09f20bf2decf763bb2946291f28960f","author":{"email":"1a6d70c497b881333962fb40612e3f3827d7c1cd@philipreames.com","name":"Philip Reames"},"message":"[InstCombine] When canonicalizing gep indices, prefer zext when possible\n\nIf we know that the sign bit of a value being sign extended is zero, we can use a zero extension instead.  This is motivated by the fact that zero extensions are generally cheaper on x86 (and most other architectures?).  We already apply a similar transform in DAGCombine, this just extends that to the IR level.\n\nThis comes up when we eagerly canonicalize gep indices to the width of a machine register (i64 on x86_64). To do so, we insert sign extensions (sext) to promote smaller types. \n\nDifferential Revision: http://reviews.llvm.org/D7255\n\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229189 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/llvm-project/llvm/commits/d777c2c0c09f20bf2decf763bb2946291f28960f"}]}