{"push_id":651503097,"size":3,"distinct_size":1,"ref":"refs/heads/LA.BF64.1.1.c3","head":"002019dd60cfbec5bcefa5e184606ba02a7adca3","before":"772f37a334101de41d3d3090efa89a121b14ee43","commits":[{"sha":"3cac414e53b737314b045f5fe4f959e19a453cce","author":{"email":"95d0b9cec7d8aec8fe1bfe717f38f7888600016e@arm.com","name":"Matteo Franchin"},"message":"AArch64: Addressing Cortex-A53 erratum 835769.\n\nSome early revisions of the Cortex-A53 have an erratum (835769) whereby\nit is possible for a 64-bit multiply-accumulate instruction in AArch64\nstate to generate an incorrect result. The conditions which a portion\nof code must satisfy in order for the issue to be observed are somewhat\ncomplex, but all cases end with a memory (load, store, or prefetch)\ninstruction followed immediately by the multiply-accumulate operation.\n\nThis commit makes sure to insert a nop instruction before a 64-bit msub\ninstruction, whenever the latter is preceded by a memory instruction.\nThis behaviour should make it impossible for the Arm64 backend to\ngenerate a sequence of instructions which matches the erratum\nconditions.\n\nConflicts:\n\tcompiler/dex/compiler_enums.h\n\nChange-Id: I115e509fbc7e9e1c3ddbc061d29a32d99f6bddb7","distinct":false,"url":"https://api.github.com/repos/codeaurora-unoffical/platform-art/commits/3cac414e53b737314b045f5fe4f959e19a453cce"},{"sha":"3d77aaf333cbb015d3038e722bf4bebbbd23581e","author":{"email":"43dea8d1bb0ef5aeb1e9603b314352188918c67f@arm.com","name":"Ningsheng Jian"},"message":"AArch64: Fix incorrect use of preceding LIR.\n\nIn Cortex-A53 erratum 835769 fixup, we should check the LIR for\nprevious emitted instruction, skipping pseudo LIRs and other\nnon-emitting LIRs.\n\nChange-Id: I908f4c638650d7ad9c91112b74095bba2d81612e","distinct":false,"url":"https://api.github.com/repos/codeaurora-unoffical/platform-art/commits/3d77aaf333cbb015d3038e722bf4bebbbd23581e"},{"sha":"002019dd60cfbec5bcefa5e184606ba02a7adca3","author":{"email":"d3c7bae90ce2477533ec852edf38b65198016249@localhost","name":"Linux Build Service Account"},"message":"Merge 3d77aaf333cbb015d3038e722bf4bebbbd23581e on remote branch\n\nChange-Id: If018629c79ced8f4941552c3f524d511603f436f","distinct":true,"url":"https://api.github.com/repos/codeaurora-unoffical/platform-art/commits/002019dd60cfbec5bcefa5e184606ba02a7adca3"}]}