{"push_id":721227916,"size":19,"distinct_size":19,"ref":"refs/heads/EZ-arc-upstream","head":"4a8bb1a70d493abb0c712adde9c76b261b51123f","before":"d488363c0ec6661e1c7ce410b426be993db43464","commits":[{"sha":"dcc8cb0dca0c1f7dd3c48a119f4113dfefddfe67","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: [plat-eznps] Add eznps DTS file\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/dcc8cb0dca0c1f7dd3c48a119f4113dfefddfe67"},{"sha":"aa017c67814f751121c8d370eb9a21ab2c5964a4","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: [plat-eznps] Add eznps platform\n\nThis platform include boards:\n\tHardware Emulator (HE)\n\tSimulator based upon nSIM.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/aa017c67814f751121c8d370eb9a21ab2c5964a4"},{"sha":"0604ee301ea1360faaac0db1529e14cec57d74e2","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: [plat-eznps] Use dedicated user stack top\n\nNPS use special mapping right below TASK_SIZE.\nHence we need to lower STACK_TOP so that user stack won't\noverlap NPS special mapping.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/0604ee301ea1360faaac0db1529e14cec57d74e2"},{"sha":"710d45b7b9b1c48c1ff4c0199f0bfee481e2ffb1","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: [plat-eznps] Use dedicated bitops/atomic/cmpxchg\n\nWe need our own implementaions since we lack of LLSC.\nOur extended ISA provided with optimized solution for all 32bit\noperations we see in those three headers.\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/710d45b7b9b1c48c1ff4c0199f0bfee481e2ffb1"},{"sha":"51d175f41c503c054f36c396d0d5f735dd17d600","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: [plat-eznps] Use dedicated SMP barriers\n\nWe use EZchip dedicated ISA that fits to CTOP core.\nThis way we can use CPU barrier between HW threads.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/51d175f41c503c054f36c396d0d5f735dd17d600"},{"sha":"80d2fc43a619ae84a9879c843919d18e7e5e9578","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: [plat-eznps] Use dedicated identity auxiliary register.\n\nWith generic \"identity\" num of CPUs is limited to 256 (8 bit).\nWe use our alternative AUX register GLOBAL_ID (12 bit).\nNow we can support up to 4096 CPUs.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/80d2fc43a619ae84a9879c843919d18e7e5e9578"},{"sha":"031491b22bd453b957714e2afc891c6dbac66bef","author":{"email":"9eb5903f3e94f804514a44d30418315f7a8c2f7d@ezchip.com","name":"Tal Zilcer"},"message":"ARC: [plat-eznps] Use dedicated reset exception entry\n\nWakening up CPUs is dependent on CPU physical location\nCPU0 is special and is kicked from generic ARC symbol stext\nCPUxxxx where xxxx is multiple of 16 is the first HW thread\nof each core and is kicked from first_lines_of_secondary()\nAll other CPUs are not first HW threads and awakened by the first\nHW thread of the core and therefore are kicked from reset exception\nentry, which in turn is a trampoline to first_lines_of_secondary().\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/031491b22bd453b957714e2afc891c6dbac66bef"},{"sha":"10da77b62c9bac03b778be2c1cb32ab6d31cce72","author":{"email":"9eb5903f3e94f804514a44d30418315f7a8c2f7d@ezchip.com","name":"Tal Zilcer"},"message":"ARC: [plat-eznps] Use dedicated cpu_relax()\n\nWhen using HW threads we need special ISA.\nOtherwise we will put in sleep all threads within core\nand not only the calling HW thread.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/10da77b62c9bac03b778be2c1cb32ab6d31cce72"},{"sha":"d155e51a8dc06622e59ec0e2f019867e4747e1ba","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: [plat-eznps] Add EZNPS_NET support\n\nThis platform uses this ethernet device for management and\nfor debug reasons\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/d155e51a8dc06622e59ec0e2f019867e4747e1ba"},{"sha":"1511e20faa02ff39ea481b7efb44a7800c2f2225","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: [plat-eznps] Add character device for Data Plane Linux\n\nAdd new device /dev/dpl.\nThis device adds ioctl to access platform resources such:\n1) extended auxiliary registers\n2) configuration registers\n\nThis device also provide mmap service.\nThis service porpuse is to create VM_IO vma that ptrace can use\nto access core memory (CMEM) of the task being debuged.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/1511e20faa02ff39ea481b7efb44a7800c2f2225"},{"sha":"33bfa0aa02643d9bc7ab262f6fc2b9acf4246a0d","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: [plat-eznps] Save/Restore data plane registers\n\nWe add here a place holder for future commits to save auxiliary\nregisters across context switch.\n\nthread_struct got new field for data plane of eznps platform.\nThis field got place for Data Plane auxiliary registers.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/33bfa0aa02643d9bc7ab262f6fc2b9acf4246a0d"},{"sha":"fc62658d7113e875f4dd083346744f6be4c8e0b7","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: [plat-eznps] save AUX during context switch\n\nWe save registers DPC, EFLAGS, and GPA1.\n\nSave EFLAGS, and GPA1 auxiliaries since they may be changed\nby the new task.\nSave DPC auxiliary since it is part of data plane task attribute.\nDPC attribute allow using FMTs and CMEM as well as our CTOP special\nISA for accessing accelerators.\n\nWe use this attribute also when called from ptrace.\nThis way we use the debuged task attribute for accessing CMEM.\nEven if the debuged task is not running during access.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/fc62658d7113e875f4dd083346744f6be4c8e0b7"},{"sha":"38bbc1e74b13bb74cb0c5209ff195fd1ab76db0f","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: [plat-eznps] preserve dedicated AUX registers during exception\n\nPreserve eflags and gpa1 auxiliaries during exception\nsince they are used by compare exchange instructions.\n\nNOTE: also GDB should be updated.\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/38bbc1e74b13bb74cb0c5209ff195fd1ab76db0f"},{"sha":"e64b92a6d996e5a83c52d2286c114a95c43587e0","author":{"email":"68bcf2e31c6d30ede2ee225536656df5156ec4c4@ezchip.com","name":"Gil Fruchter"},"message":"ARC: [plat-eznps] Add actionpoints support for HW threads\n\nAdd NPS HW threads fields to hardware breakpoints struct.\nUpdate NPS threads fields when settings breakpoints.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/e64b92a6d996e5a83c52d2286c114a95c43587e0"},{"sha":"ff9f68299a6b76fe67125c3b5efdc02a61d36824","author":{"email":"68bcf2e31c6d30ede2ee225536656df5156ec4c4@ezchip.com","name":"Gil Fruchter"},"message":"ARC: [plat-eznps] Use dedicated atomic64\n\nThis is preperation for our PERF implementation.\nSo atomic64 ops will be protected from overflow exception as well.\n\nThis specific commit is to maintain bisect ability.\nAll it does is copy the generic implementation - which the next commits will modify.\nThen it will be very obvious what are the changes that were done on top of the generic.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/ff9f68299a6b76fe67125c3b5efdc02a61d36824"},{"sha":"7c196778baa0a8ce7926126d43cc41d65702ee27","author":{"email":"68bcf2e31c6d30ede2ee225536656df5156ec4c4@ezchip.com","name":"Gil Fruchter"},"message":"ARC: [plat-eznps] Use dedicated performance monitor\n\nAdd NPS PMU driver and handle perf monitor exception.\nSupport generic perf events, cache events and RAW events.\nDo not select perf vmalloc option for eznps platform.\natomic64 operations with disabled pmu while using spinlocks.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/7c196778baa0a8ce7926126d43cc41d65702ee27"},{"sha":"f8ae93b8b5428f6093f2d8392dabb0e01d9d9fc0","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: [plat-eznps] Use dedicated COMMAND_LINE_SIZE\n\nThe default 256 bytes sometimes is just not enough.\nWe usually provide earlycon=... and console=... and ip=...\nAll this and more may need more room.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/f8ae93b8b5428f6093f2d8392dabb0e01d9d9fc0"},{"sha":"c8a2a4dd58175cd8b2780c6f5a0aba25d7c2350e","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: [plat-eznps] set CONFIG_NO_HZ_FULL as default.\n\nNow it is the default timer tick handling system.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>\nSigned-off-by: Gil Fruchter <gilf@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/c8a2a4dd58175cd8b2780c6f5a0aba25d7c2350e"},{"sha":"4a8bb1a70d493abb0c712adde9c76b261b51123f","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"!!!!!!!!!!!!!! EZchip patch set END !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/4a8bb1a70d493abb0c712adde9c76b261b51123f"}]}