{"push_id":843957667,"size":1000,"distinct_size":2302,"ref":"refs/heads/master","head":"677f970bc62a661690b3431543d5a5d5e682ba70","before":"605e15db2b54302364a2528d3c6604fbc57be846","commits":[{"sha":"4dd02a752c714e1616025fceba78e121807cfc11","author":{"email":"0f584745b714e230c31946b740db1d21d0507567@gmail.com","name":"Bin Meng"},"message":"x86: crownbay: Enable on-board SMSC superio keyboard controller\n\nSo far we only enabled one legacy serial port on the SMSC LPC47m\nsuperio chipset on Intel Crown Bay board. As the board also has\ndual PS/2 ports routed out, enable the keyboard controller which\nis i8042 compatible so that we can use PS/2 keyboard and mouse.\n\nIn order to make PS/2 keyboard work with the VGA console, remove\nCONFIG_VGA_AS_SINGLE_DEVICE. To boot Linux kernel with PIC mode\nusing PIRQ routing table, adjust the mask in the device tree to\nreserve irq12 which is used by PS/2 mouse.\n\nSigned-off-by: Bin Meng <bmeng.cn@gmail.com>\nReviewed-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/SelfDestroyer/u-boot/commits/4dd02a752c714e1616025fceba78e121807cfc11"},{"sha":"3242998e24b899540790077f8bbde447f4c039c6","author":{"email":"0f584745b714e230c31946b740db1d21d0507567@gmail.com","name":"Bin Meng"},"message":"video: ct69000: Remove unused codes\n\nRemove unused CONFIG_USE_CPCIDVI wrapped codes.\n\nSigned-off-by: Bin Meng <bmeng.cn@gmail.com>\nAcked-by: Simon Glass <sjg@chromium.org>\nAcked-by: Anatolij Gustschin <agust@denx.de>","distinct":true,"url":"https://api.github.com/repos/SelfDestroyer/u-boot/commits/3242998e24b899540790077f8bbde447f4c039c6"},{"sha":"1887ed3ad6509a4ce411b7981dd27515e0c44bb7","author":{"email":"0f584745b714e230c31946b740db1d21d0507567@gmail.com","name":"Bin Meng"},"message":"dm: pci: Optimize pci_uclass_post_bind()\n\nIf there is no pci device listed in the device tree,\ndon't bother scanning the device tree.\n\nSigned-off-by: Bin Meng <bmeng.cn@gmail.com>\nAcked-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/SelfDestroyer/u-boot/commits/1887ed3ad6509a4ce411b7981dd27515e0c44bb7"},{"sha":"cdeb2ba99cb333f7729cd5784ea2de00e265f22f","author":{"email":"0f584745b714e230c31946b740db1d21d0507567@gmail.com","name":"Bin Meng"},"message":"dm: core: Fix code reentrancy issue in device_probe_child()\n\nThe device might have already been probed during the call to\ndevice_probe() on its parent device (e.g. PCI bridge devices).\nIn its parent device's probe routine, it might probe all of\nits child devices via device_probe() thus the codes reenter\ndevice_probe_child(). To support code reentrancy, test these\nallocated memory against NULL to avoid memory leak, and return\nto the caller if dev->flags has DM_FLAG_ACTIVATED set after\ndevice_probe() returns, so that we don't mess up the device.\n\nSigned-off-by: Bin Meng <bmeng.cn@gmail.com>\nAcked-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/SelfDestroyer/u-boot/commits/cdeb2ba99cb333f7729cd5784ea2de00e265f22f"},{"sha":"a1f1582b73a5c82b3d63697d521dbcef31e05229","author":{"email":"0f584745b714e230c31946b740db1d21d0507567@gmail.com","name":"Bin Meng"},"message":"x86: crownbay: Support Topcliff integrated pci uart devices with driver model\n\nIn order to make a pci uart device node to be properly bound to its\ndriver, we need make sure its parent node has a compatible string\nwhich matches a driver that scans all of its child device nodes in\nthe device tree.\n\nChange all pci bridge nodes under root pci node to use \"pci-bridge\"\ncompatible driver, as well as corresponding <reg> properties to\nindicate its devfn. At last, adding \"u-boot,dm-pre-reloc\" to each\nof these nodes for driver model to initialize them before relocation.\n\nSigned-off-by: Bin Meng <bmeng.cn@gmail.com>\nAcked-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/SelfDestroyer/u-boot/commits/a1f1582b73a5c82b3d63697d521dbcef31e05229"},{"sha":"f4b5db7c5309dd7f3ecc6369f3c1f41e8bfe93ae","author":{"email":"0f584745b714e230c31946b740db1d21d0507567@gmail.com","name":"Bin Meng"},"message":"dm: pci: Document binding of pci device drivers\n\nDocument how pci devices are bound to device drivers.\n\nSigned-off-by: Bin Meng <bmeng.cn@gmail.com>\nAcked-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/SelfDestroyer/u-boot/commits/f4b5db7c5309dd7f3ecc6369f3c1f41e8bfe93ae"},{"sha":"79c884d7e449a63fa8f07b7495f8f9873355c48f","author":{"email":"47764aff062bf9ebe98a2274b29052b74a9567e2@konsulko.com","name":"Tom Rini"},"message":"Merge git://git.denx.de/u-boot-x86","distinct":true,"url":"https://api.github.com/repos/SelfDestroyer/u-boot/commits/79c884d7e449a63fa8f07b7495f8f9873355c48f"},{"sha":"9734b97f76a942f449fdc9ff445a003aa812baa7","author":{"email":"3055038c414aef68bf32c33b8118623e7554e0f2@nvidia.com","name":"Thierry Reding"},"message":"image: Fix loop condition to avoid warning\n\nGCC 5.1 starts warning for comparisons such as !a > 0, assuming that the\nnegation was meant to apply to the whole expression rather than just the\nleft operand.\n\nIndeed the comparison in the FIT loadable code is confusingly written,\nthough it does end up doing the right thing. Rewrite the condition to be\nmore explicit, that is, iterate over strings until they're exhausted.\n\nSigned-off-by: Thierry Reding <treding@nvidia.com>\nReviewed-by: Tom Rini <trini@konsulko.com>\nReviewed-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/SelfDestroyer/u-boot/commits/9734b97f76a942f449fdc9ff445a003aa812baa7"},{"sha":"14006a5671058bfe2f323beeec66448fce228adb","author":{"email":"44960b6aa03eb2fb89c62409a43f0b56d13ff84f@gmail.com","name":"Jonathan Liu"},"message":"rpi: set fdt_addr_r to 0x00000100 to match default device_tree_address\n\nRaspberry Pi by default loads the FDT to 0x00000100 so set fdt_addr_r to\nmatch and move scriptaddr to 0x02000000 to avoid clobbering the FDT.\n\nSigned-off-by: Jonathan Liu <net147@gmail.com>","distinct":true,"url":"https://api.github.com/repos/SelfDestroyer/u-boot/commits/14006a5671058bfe2f323beeec66448fce228adb"},{"sha":"2e88bb28d8061286d2f1cabcac224df15b941b82","author":{"email":"acf0eb237821a36effc39e078cdb66d28d13b564@andestech.com","name":"Kun-Hua Huang"},"message":"NDS32: Generic Board Support and Unsupport\n\n\tAdd nds32 ag101p generic board support.\n\nSigned-off-by: Kun-Hua Huang <kunhua@andestech.com>","distinct":true,"url":"https://api.github.com/repos/SelfDestroyer/u-boot/commits/2e88bb28d8061286d2f1cabcac224df15b941b82"},{"sha":"b3537c08e14b9d7e3b3207de2d280dab2dc499fa","author":{"email":"acf0eb237821a36effc39e078cdb66d28d13b564@andestech.com","name":"Kun-Hua Huang"},"message":"NDS32: Generic Board Support and Unsupport\n\n\tRemove ag101 and ag102 support\n\nSigned-off-by: Kun-Hua Huang <kunhua@andestech.com>","distinct":true,"url":"https://api.github.com/repos/SelfDestroyer/u-boot/commits/b3537c08e14b9d7e3b3207de2d280dab2dc499fa"},{"sha":"e9015b304ad2a39a03f2684dadeabef474b7addb","author":{"email":"4087b77051f63352d3c83e28b51f4aac202ac80b@gmail.com","name":"Suriyan Ramasami"},"message":"lib/display_options: Fix print_freq\n\nBuild without CONFIG_SPL_SERIAL_SUPPORT does not print the cpu freq.\nI have seen this in the odroid U3 board, where on boot one sees this:\nCPU:   Exynos4412 @  GHz\ninstead of:\nCPU:   Exynos4412 @ 1 GHz\n\nI am assuming that this change was done to get rid of compiler\nwarnings related to unused variables when building with\nCONFIG_SPL_SERIAL_SUPPORT not being defined in an SPL build.\n\nSigned-off-by: Suriyan Ramasami <suriyan.r@gmail.com>\nAcked-by: Simon Glass <sjg@chromium.org>\nAcked-by: Heiko Schocher <hs@denx.de>\nReviewed-by: Joe Hershberger <joe.hershberger@ni.com>","distinct":true,"url":"https://api.github.com/repos/SelfDestroyer/u-boot/commits/e9015b304ad2a39a03f2684dadeabef474b7addb"},{"sha":"70d39f57146a6cb94736db39c770c3d95e07bedb","author":{"email":"f6ce1e3a84979f774d08cfcf0135fdab4b721a81@gmail.com","name":"Chris Packham"},"message":"Makefile: Use correct timezone for U_BOOT_TZ\n\nWhen building with SOURCE_DATE_EPOCH the timezone is in UTC. When\nbuilding normally the timezone is taken from the build machine's locale\nsetting.\n\nSigned-off-by: Chris Packham <judge.packham@gmail.com>\nTested-by: Bin Meng <bmeng.cn@gmail.com>\nTested-by: Paul Kocialkowski <contact@paulk.fr>\nTested-by: Andreas Bießmann <andreas.devel@googlemail.com>","distinct":true,"url":"https://api.github.com/repos/SelfDestroyer/u-boot/commits/70d39f57146a6cb94736db39c770c3d95e07bedb"},{"sha":"c1ea3bece22da38c9aba3d7cd00e1720634add12","author":{"email":"50c3c575ce2bb12c45e20736ce59e86fe81915b4@ti.com","name":"Nishanth Menon"},"message":"ARM: DRA7: Add detection of ES2.0\n\nAdd support for detection of ES2.0 version of DRA7 family of\nprocessors. ES2.0 is an incremental revision with various fixes\nincluding the following:\n- reset logic fixes\n- few assymetric aging logic fixes\n- MMC clock rate fixes\n- Ethernet speed fixes\n- edma fixes for mcasp\n\n[ravibabu@ti.com: posted internal for an older bootloader]\nSigned-off-by: Ravi Babu <ravibabu@ti.com>\nSigned-off-by: Nishanth Menon <nm@ti.com>\nAcked-by: Lokesh Vutla <lokeshvutla@ti.com>\nReviewed-by: Tom Rini <trini@konsulko.com>","distinct":true,"url":"https://api.github.com/repos/SelfDestroyer/u-boot/commits/c1ea3bece22da38c9aba3d7cd00e1720634add12"},{"sha":"03589234090db645f80896a2ee5bce98096172da","author":{"email":"50c3c575ce2bb12c45e20736ce59e86fe81915b4@ti.com","name":"Nishanth Menon"},"message":"ARM: DRA74-evm: Add iodelay values for SR2.0\n\nSilicon revision 2.0 has new signal routing hence has an updated set of\niodelay parameters to be used. Update the configuration for the same.\nPadmux remains the same.\n\nBased on data from VayuES2_EVM_Base_Config-20150807.\n\nNOTE: With respect to the RGMII values, the Manual IODelay values\nare used for the fine adjusments needed to meet the tight RGMII\nspecification.\n\nSigned-off-by: Nishanth Menon <nm@ti.com>\nReviewed-by: Tom Rini <trini@konsulko.com>","distinct":true,"url":"https://api.github.com/repos/SelfDestroyer/u-boot/commits/03589234090db645f80896a2ee5bce98096172da"},{"sha":"76cff2b10857c86211ef60024e672ce178cb6d69","author":{"email":"50c3c575ce2bb12c45e20736ce59e86fe81915b4@ti.com","name":"Nishanth Menon"},"message":"ARM: DRA74-evm: Use SMA_1 spare register to workaround DP83865 phy on SR2.0\n\nDP83865 ethernet phy used on DRA74x-evm is quirky and the datasheet\nprovided IODELAY values for standard RGMII phys do not work.\n\nSilicon Revision(SR) 2.0 provides an alternative bit configuration\nthat allows us to do a \"gross adjustment\" to launch the data off a\ndifferent internal clock edge. Manual IO Delay overrides are still\nnecessary to fine tune the clock-to-data delays. This is a necessary\nworkaround for the quirky ethernet Phy we have on the platform.\n\nNOTE: SMA registers are spare \"kitchen sink\" registers that does\ncontain bits for other workaround as necessary as well. Hence the\ncontrol for the same is introduced in a generic SoC specific, board\ngeneric location.\n\nSigned-off-by: Nishanth Menon <nm@ti.com>\nReviewed-by: Tom Rini <trini@konsulko.com>","distinct":true,"url":"https://api.github.com/repos/SelfDestroyer/u-boot/commits/76cff2b10857c86211ef60024e672ce178cb6d69"},{"sha":"90c36d8ab91f07679145f7fe79d7a20d4b016b31","author":{"email":"f650684f780c6b48c0158c4e0f2e27f74aabc755@gmail.com","name":"Ulf Magnusson"},"message":"kconfiglib: update to the latest version\n\nCorresponds to ba71a0e (Fix _parse_block() 'parent' documentation re.\nifs.) from upstream, just adding the SPDX tag.\n\nHas performance improvements, code cleanup, Python 3 support, and various\nsmall fixes, including the following:\n\n  - Unset user values when loading a zero-byte .config. (5e54e2c)\n  - Ignore indented .config assignments. (f8a7510)\n  - Do not require $srctree to be set for non-kernel projects. (d56e9c1)\n  - Report correct locations in the presence of continuation lines.\n    (0cebc87)\nSigned-off-by: Ulf Magnusson <ulfalizer@gmail.com>","distinct":true,"url":"https://api.github.com/repos/SelfDestroyer/u-boot/commits/90c36d8ab91f07679145f7fe79d7a20d4b016b31"},{"sha":"972ea5339006e12a6c5d79f8c263ff5d1f463b30","author":{"email":"c00b0378376498bd9cd974c388df8854c0131d27@chromium.org","name":"Simon Glass"},"message":"malloc_simple: Correct the alignment logic in memalign_simple()\n\nThis should use the align parameter, not bytes. Natural alignment is one\nuse case but should not be the only one supported by this function.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>\nReviewed-by: Tom Rini <trini@konsulko.com>","distinct":true,"url":"https://api.github.com/repos/SelfDestroyer/u-boot/commits/972ea5339006e12a6c5d79f8c263ff5d1f463b30"},{"sha":"a85da21f7527e70a2b81d71aa73d318fb354e912","author":{"email":"9fa1be1a5b5729e4c6b404f34c9ce49ff4882fd8@redhat.com","name":"Hans de Goede"},"message":"env_mmc: Properly prefix mmc errors with '!'\n\nThe set_default_env() function from env_common.c expects either\na fully formatted error msg, e.g.: \"## Resetting to default environment\\n\"\nor an error msg prefixed with an !, in which case it will format it.\n\nFix the init_mmc_for_env() error messages to be prefixed with a !\nthis changes the bootup-log on sunxi when no mmc card is found from:\n\nMMC:   SUNXI SD/MMC: 0\nNo MMC card foundIn:    serial\nOut:   serial\n\nTo:\n\nMMC:   SUNXI SD/MMC: 0\n*** Warning - No MMC card found, using default environment\n\nIn:    serial\nOut:   serial\n\nWhich clearly is how things should look.\n\nSigned-off-by: Hans de Goede <hdegoede@redhat.com>","distinct":true,"url":"https://api.github.com/repos/SelfDestroyer/u-boot/commits/a85da21f7527e70a2b81d71aa73d318fb354e912"},{"sha":"401f2d91acac2b455dbaf222982ad461d5a2e43e","author":{"email":"c1574519d727edaf2e16b260e452051ef77bf018@ti.com","name":"Lokesh Vutla"},"message":"ARM: keystone2: configs: Move SP to end of u-boot section\n\nCurrently u-boot stack is defined at the beginning of MSMC RAM.\nThis is a problem for uart boot mode as ROM downloads directly to\nstarting of MSMC RAM.\nFixing it by moving stack to the end of u-boot section and shifting\nSYS_TEXT_BASE to the start of MSMC RAM.\nUpdated division of MSMC RAM is shown below:\n\t-----------------------------------------\n\t|\t\t|\t|\t\t|\n\t| U-Boot text\t|U-Boot\t| SPL text\t|\n\t| download\t| Stack\t| Download +\t|\n\t|\t\t|\t| SPL_BSS +\t|\n\t|\t\t|\t| SPL_STACK\t|\n\t-----------------------------------------\n\t[1]\t\t[2]\t[3]\t\t[4]\n\n[1] SYS_TEXT_BASE (Start of MSMC RAM)\n[2] SPL_TEXT_BASE - GBL_DATA_SIZE\n[3] SPL_TEXT_BASE\n[4] END of SPL\n\n[1] + [2] is at least 1M on all platforms, so no chance of overlap.\n\nReviewed-by: Nishanth Menon <nm@ti.com>\nSigned-off-by: Lokesh Vutla <lokeshvutla@ti.com>","distinct":true,"url":"https://api.github.com/repos/SelfDestroyer/u-boot/commits/401f2d91acac2b455dbaf222982ad461d5a2e43e"}]}