{"push_id":636820516,"size":9,"distinct_size":9,"ref":"refs/heads/aosp/AU_LINUX_ANDROID_LA.BF64.1.2.1_RB1.05.00.02.019.067","head":"b6043574a7e9d06a5cc1eeeebc50cb6babf6166a","before":"4ab99130ef8f2938d3c85c9b4a95040bfc25c4f6","commits":[{"sha":"3d45addda8a9ad509fcc480d0f94292266001362","author":{"email":"f4561ccbe90a02dadc9d168b29bfea0c1b57222c@codeaurora.org","name":"Adrian Salido-Moreno"},"message":"mdss: dsi: fix potential race conditions in mdp busy wait\n\nCurrent mdp busy wait logic is prone to race conditions if there are\nmultiple threads waiting on MDP DMA transfer to be complete because use\nof complete will only unblock one caller. Fix this by doing complete_all\ninstead to unblock all waiters.\n\nChange-Id: I7b568f9d5fe3c68dec1532def2664f946925e770\nSigned-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/xperia-aosp-project/kernel/commits/3d45addda8a9ad509fcc480d0f94292266001362"},{"sha":"f620b410a9e07fd390d85579e7f6c154692e204c","author":{"email":"168a6a722f36cbfb19d9b32bbc952ac3ffb3b983@codeaurora.org","name":"Ujwal Patel"},"message":"msm: mdss: modify bus bw vote lock and count strategy\n\nCurrently bus bandwidth can happen from 2 separate contexts where commit\ncontext does not hold lock and blindly votes bandwidth. Rather use a\nsingle bandwidth lock and count for all contexts. This also requires\nfixing a bug during ctl stop where ctl power status needs to be changed\nonly after bus vote has finished.\n\nChange-Id: I4131b05195298d15a46101aa4ebb88ea2e80b3dc\nSigned-off-by: Ujwal Patel <ujwalp@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/xperia-aosp-project/kernel/commits/f620b410a9e07fd390d85579e7f6c154692e204c"},{"sha":"5670a416d39584d32408f4f857d375a7f0df76d5","author":{"email":"f353a1326f7aad71d23381a3beb9470c3b31d81b@codeaurora.org","name":"Matt Wagantall"},"message":"irqchip: gic: Mask PPIs during disable_percpu_irq()\n\nBy default, when disable_percpu_irq() is called, the IRQ chip's\n.irq_mask() function is invoked. This is not the case for the\ncurrent GIC driver however, since integration of the following\ncommit:\n\n c8e0c91f (arm: gic: Add irq_disable callback fixup)\n\nThese changes implement .irq_disable() hooks, the presence of which\nalters the behavior of disable_percpu_irq(), causing .irq_disable() to\nbe called instead of .irq_mask().\n\nAs a result, when disable_percpu_irq() is called, the PPI interrupt\nis no longer disabled immediately. It will be lazily disabled the\nnext time it fires (if it fires), similar to what's done for all SPI.\n\nThis lazy-disablement of PPIs can cause problems on systems where\nCPU hotplug puts cores into a low power state. If a CPU is hotpluged-\nout and collapsed, a PPI from an active peripheral may fire. Since\nthe PPI is not masked, the CPU will receive the interrupt, waking it\nfrom its slumber.\n\nAt best, this is bad for power reasons. The CPU will wake up and park\nitself in a loop until someone decides to intentionally hotplug-in\nthe CPU again.  At worst, the CPU will wake up when its power\nrequirements (voltage, current) are not being considered, and the\nsystem may crash in fun and interesting ways.\n\nRevert back to the previous behaviour of masking PPIs immediately\nupon calling disable_percpu_irq() by adding a call to .irq_mask()\nfrom within .irq_disable().\n\nThis change only affects PPIs. APIs for raising SGIs contain other\nprotections to prevent them from being sent to offline CPUs\nunintentionally. SPI are anyways migrated to other CPUs during\nhotplug.\n\nThis change addresses an issue where level-triggered arch_timer\ninterrupts are seen to wake-up offlined CPUs.\n\nChange-Id: Id652c0ffd44c2a662a20a1308b754da672eb2b7d\nSigned-off-by: Matt Wagantall <mattw@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/xperia-aosp-project/kernel/commits/5670a416d39584d32408f4f857d375a7f0df76d5"},{"sha":"ba5e9cf89dac781f777055d978bd75ee5bc05630","author":{"email":"b0301a71c2ea6192a01027e30a0b2b48d68037d5@codeaurora.org","name":"Dov Levenglick"},"message":"mmc: sdhci: support IRQ affinity\n\nVote for host irq affinity to be the same as\nthe cluster on which the mmcqd is currently scheduled.\nThis is towards gaining performance by upping\nthe probability that the cpu will already be awake\nfor the thread/irq when it is time for them to be\nscheduled.\n\nCRs-Fixed: 811981\nChange-Id: I9f72e21b6b6d53afed2158f6063c7afc7b1d680f\nSigned-off-by: Dov Levenglick <dovl@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/xperia-aosp-project/kernel/commits/ba5e9cf89dac781f777055d978bd75ee5bc05630"},{"sha":"486c05048fd55ebd0e98aff41fdf221113ad2ba8","author":{"email":"c2ec5539c4473ab294a95eac689618c01a8f4c1f@codeaurora.org","name":"Joonwoo Park"},"message":"timer: reduce cache bouncing of deferral timer wheel\n\nCommit a40f752 (timer: make deferrable cpu unbound timers really not\nbound to a cpu) made any non-idle CPUs in the system can service expired\ndeferral timer entries.  This means deferral timer entries can be\nserviced as early as possible after it expires but in many cases it's\nsuboptimal since switching the CPU of timer wheel incurs a cache\nbouncing/synchronization cost.\n\nReduce cache bouncing by servicing the deferrable timer wheel with timer\ntick CPU as it doesn't bounce as often but still guarantees to run timer\nsoftirq when there is any CPU that isn't idle.\n\nCRs-fixed: 815184\nChange-Id: I6d51390832538ad90eccf459e90bff0b25aad09f\nSigned-off-by: Joonwoo Park <joonwoop@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/xperia-aosp-project/kernel/commits/486c05048fd55ebd0e98aff41fdf221113ad2ba8"},{"sha":"b3e358564dc2ed489e56aabdf5d8896b382ac148","author":{"email":"427b3e89cfa4833e90373054043f85c2b5772665@codeaurora.org","name":"Hemant Kumar"},"message":"usb: qmp: phy: Clear LFPS RXTERM irq upon bus suspend\n\nAfter XO shutdown, QMP phy generates LFPS RXTERM interrupt\nto wake up the system as a result of host initiated resume.\nSince phy driver is not clearing this interrupt, device fails\nto wakeup from subsequent XO shutdown. Hence clear this\ninterrupt before enabling phy autonomous mode upon bus suspend.\n\nCRs-Fixed: 812087\nChange-Id: I0ce5af185b3f3670d32bb03cb2fd0f39abb70e7e\nSigned-off-by: Hemant Kumar <hemantk@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/xperia-aosp-project/kernel/commits/b3e358564dc2ed489e56aabdf5d8896b382ac148"},{"sha":"11726d7752e5f52a1748cce23d618a519cba6cad","author":{"email":"87bc22e1ffe89e26fa2661ba9c7fe7c19f55bf7b@gmail.com","name":"Angelo G. Del Regno -- EternityProject Team Manager"},"message":"arm: DT: msm8226-v2-pm: Re-enable full PM functionalities for MSM8226\n\nNow it's safe to re-enable the PM, as it's working pretty fine.","distinct":true,"url":"https://api.github.com/repos/xperia-aosp-project/kernel/commits/11726d7752e5f52a1748cce23d618a519cba6cad"},{"sha":"008da9d39094822ae6e026941487b682b4813f6a","author":{"email":"1986c66dfccd1d0aab5373adc801d93635565868@sonymobile.com","name":"Alin Jerpelea"},"message":"Merge pull request #282 from kholk/aosp/AU_LINUX_ANDROID_LA.BF64.1.2.1_RB1.05.00.02.019.067\n\n[BF64] Fix MSM8226 PM, fix bad power savings for 8974, fix GIC PPIs","distinct":true,"url":"https://api.github.com/repos/xperia-aosp-project/kernel/commits/008da9d39094822ae6e026941487b682b4813f6a"},{"sha":"b6043574a7e9d06a5cc1eeeebc50cb6babf6166a","author":{"email":"9c94c43751bfea8f12630fe8dc69350b2f62e1d1@hotmail.com","name":"krabappel2548"},"message":"Merge pull request #5 from sonyxperiadev/aosp/AU_LINUX_ANDROID_LA.BF64.1.2.1_RB1.05.00.02.019.067\n\nmaster","distinct":true,"url":"https://api.github.com/repos/xperia-aosp-project/kernel/commits/b6043574a7e9d06a5cc1eeeebc50cb6babf6166a"}]}