{"push_id":775023867,"size":464,"distinct_size":464,"ref":"refs/heads/master","head":"dbd46ba38c7435b0d5aaa243c391036e2c9e9bc1","before":"3a58d1daa0a1d5c669f9ef378c21c46118a9b8d3","commits":[{"sha":"5276862e7f0ae7ba9f23a3ddeab19395a170c452","author":{"email":"606076c6baf28f5c774b7ecc8b17e7756bb544e2@playstation.sony.com","name":"Yunzhong Gao"},"message":"[Tests] Add explicit -std=lang option to a number of tests.\n\nThis patch should not change the test results, but it is useful if clang's\ndefault C++ language is ever changed from gnu++98.\n\nPatch by: Charles Li\n\nhttp://lists.cs.uiuc.edu/pipermail/cfe-commits/Week-of-Mon-20150727/134667.html\n\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@243819 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/faisalv/clang/commits/5276862e7f0ae7ba9f23a3ddeab19395a170c452"},{"sha":"d0c24a02dc82b38f88ec9f3e515ffbeefe89eb70","author":{"email":"fbe9e45cbb51ebd86366cc402735e3c7e9b1e064@gmail.com","name":"David Majnemer"},"message":"Use the reserved keyword spelling of 'typeof'\n\nNo functional change intended, just a drive-by cleanup.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@243826 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/faisalv/clang/commits/d0c24a02dc82b38f88ec9f3e515ffbeefe89eb70"},{"sha":"f86a8612622eb80555d85219db3d20bae41daccb","author":{"email":"1cd424918902c1dbc16c61ea09f30b31f6c2f0e9@freebsd.org","name":"Davide Italiano"},"message":"Convertibility of nullptr_t to bool is available in clang. Note it.\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@243827 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/faisalv/clang/commits/f86a8612622eb80555d85219db3d20bae41daccb"},{"sha":"133cbf204c5b6a927fca47a70e82dcd488c5f68f","author":{"email":"fbe9e45cbb51ebd86366cc402735e3c7e9b1e064@gmail.com","name":"David Majnemer"},"message":"[MS ABI] Create a mangling for extended vector types\n\nExtended vector types are mangled just like normal vector types.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@243828 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/faisalv/clang/commits/133cbf204c5b6a927fca47a70e82dcd488c5f68f"},{"sha":"2abbec88f288baf3c2dc2c2f67a63f6cba3a41e7","author":{"email":"1cd424918902c1dbc16c61ea09f30b31f6c2f0e9@freebsd.org","name":"Davide Italiano"},"message":"[SemaExpr] Factor out common diagnostic code for remainder/division.\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@243832 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/faisalv/clang/commits/2abbec88f288baf3c2dc2c2f67a63f6cba3a41e7"},{"sha":"704d49d258840fca3577c99d3d7b647f3ad843a3","author":{"email":"1cd424918902c1dbc16c61ea09f30b31f6c2f0e9@freebsd.org","name":"Davide Italiano"},"message":"Revert r243827.\n\nUntil I figure out what's the right way of updating this file.\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@243840 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/faisalv/clang/commits/704d49d258840fca3577c99d3d7b647f3ad843a3"},{"sha":"bc96e5803a81f0044a555f3766c351695050daf7","author":{"email":"666af9c7e7c44f7b1a6415c1f07084e8abb68553@gmail.com","name":"Yaron Keren"},"message":"Rangify for loops, NFC.\n\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@243841 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/faisalv/clang/commits/bc96e5803a81f0044a555f3766c351695050daf7"},{"sha":"36c8e634ccc8104a530f1c103930f1a5d02309b9","author":{"email":"bcb35893aada1f4978d895e8692c1754411c1863@intel.com","name":"Asaf Badouh"},"message":"[X86][AVX512VLDQ] add reduce/range/cvt intrinsics \nadd 128 & 256 width intrinsic versions of reduce/range and cvt i64 to FP and vice versa\n\nDifferential Revision: http://reviews.llvm.org/D11598\n\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@243848 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/faisalv/clang/commits/36c8e634ccc8104a530f1c103930f1a5d02309b9"},{"sha":"2a3c90446125f7ce6223eaadb424a6e59e90015c","author":{"email":"af4b1a06dcc93e086b35435d5654eb2aff59399a@redking.me.uk","name":"Simon Pilgrim"},"message":"Fix invalid shufflevector operands\n\nThis patch fixes bug 23800 ( https://llvm.org/bugs/show_bug.cgi?id=23800#c2 ). There existed a case where the index operand from extractelement was directly used to create a shufflevector mask. Since the index can be of any integral type but the mask must only contain 32 bit integers a 64 bit index operand led to an assertion error later on.\n\nCommitted on behalf of mpflanzer (Moritz Pflanzer)\n\nDifferential Revision: http://reviews.llvm.org/D10838\n\ngit-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@243851 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/faisalv/clang/commits/2a3c90446125f7ce6223eaadb424a6e59e90015c"},{"sha":"1703e30a4722cd982281c03eedfac52a7c0bc551","author":{"email":"bcb35893aada1f4978d895e8692c1754411c1863@intel.com","name":"Asaf Badouh"},"message":"[X86][AVX512VLBW] add pack, cvt, mulhi and madd intrinsics\n\nDifferential Revision: http://reviews.llvm.org/D11642\n\ngit-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@243867 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/faisalv/clang/commits/1703e30a4722cd982281c03eedfac52a7c0bc551"},{"sha":"a5ffe75862d56eff189d6adcf9cc7e2d471c7b1d","author":{"email":"9b9f0588f188b4d70760c2b8f5f83f7d33c942ea@gmail.com","name":"Andrey Bokhanko"},"message":"Additional fix for PR14269: Crash on vector elements / global register vars in inline assembler.\n\nCompiler crashed when vector elements / global register vars were used in inline assembler with \"m\" restriction. This patch fixes this.\n\nDifferential Revision: http://reviews.llvm.org/D10476\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@243870 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/faisalv/clang/commits/a5ffe75862d56eff189d6adcf9cc7e2d471c7b1d"},{"sha":"86b5a658bcf568830702b4798b891beef591b90a","author":{"email":"01ac9482d179ea0256332f8ad05d5eb826953c93@gmail.com","name":"Nathan Wilson"},"message":"[CONCEPTS] Add concept to VarDecl and diagnostic for uninitialized variable concept\n\nSummary: Add IsConcept bit to VarDecl::NonParmVarDeclBitfields and associated isConcept/setConcept member functions. Set IsConcept to true when 'concept' specifier is in variable declaration. Create diagnostic when variable concept is not initialized.\n\nReviewers: fraggamuffin, hubert.reinterpretcast, faisalv, aaron.ballman, rsmith\n\nSubscribers: aemerson, cfe-commits\n\nDifferential Revision: http://reviews.llvm.org/D11600\n\ngit-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@243876 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/faisalv/clang/commits/86b5a658bcf568830702b4798b891beef591b90a"},{"sha":"1b3a539a705cfdfe0620238745ca38d137c514cc","author":{"email":"4cc135f29e3f467f02d56be4500c4456826ef141@google.com","name":"Douglas Katzman"},"message":"[SHAVE] Pass all -f, -g, -O, -W options through directly to moviCompile.\n\nDifferential Revision: http://reviews.llvm.org/D11581\n\ngit-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@243878 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/faisalv/clang/commits/1b3a539a705cfdfe0620238745ca38d137c514cc"},{"sha":"f4e2ba74bdae2c5ebb2338b44b2e9bd85461f071","author":{"email":"4cc135f29e3f467f02d56be4500c4456826ef141@google.com","name":"Douglas Katzman"},"message":"Grammar: Don't imply that a program wouldn't want a person as its output.\n\n(Because, hey, who wouldn't?)\n\ngit-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@243901 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/faisalv/clang/commits/f4e2ba74bdae2c5ebb2338b44b2e9bd85461f071"},{"sha":"14b0c6caf8f12547107d5891033072b1d2f589f8","author":{"email":"1d6e1cf70ec6f9ab28d3ea4b27a49a77654d370e@justinbogner.com","name":"Justin Bogner"},"message":"X86: Teach X86 builtins which target features they require\n\nThis adds the required target feature names to x86 builtins that need\nparticular features. Most have exactly one (\"avx\", \"aes\", etc), but some\nof the avx512 features have multiple requirements, eg \"avx512vl,avx512bw\".\n\ngit-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@243908 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/faisalv/clang/commits/14b0c6caf8f12547107d5891033072b1d2f589f8"},{"sha":"ccbefde95d2da751eae5660f55e978e42099d438","author":{"email":"4bb0fbb765155d6f778ba7db1d66889cc175512a@google.com","name":"Naomi Musgrave"},"message":"Dtor callback emitted when msan attribute not repressed for this function.\n\nSummary: In addition to checking compiler flags, the front-end also examines the attributes of the destructor definition to ensure that the SanitizeMemory attribute is attached.\n\nReviewers: eugenis, kcc\n\nSubscribers: cfe-commits\n\nDifferential Revision: http://reviews.llvm.org/D11727\n\nrefactored test into new file, revised how function attribute examined\n\nmodified test to examine default dtor with and without attribute\n\nremoved attribute check\n\ngit-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@243912 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/faisalv/clang/commits/ccbefde95d2da751eae5660f55e978e42099d438"},{"sha":"43665b4d2e812d6b49a4236c1442afb1b097ca80","author":{"email":"a87c861d671c0890de5ca4de7a52a61a2331e1ad@gmail.com","name":"Argyrios Kyrtzidis"},"message":"Remove unused header include.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@243938 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/faisalv/clang/commits/43665b4d2e812d6b49a4236c1442afb1b097ca80"},{"sha":"0128dc8835c73dac96aa100bd5664b426c95c0a6","author":{"email":"9d938db41bf7d07f88e8d8adba89b477eaafa4d6@metafoo.co.uk","name":"Richard Smith"},"message":"[modules] Make IndirectFieldDecl mergeable to avoid lookup ambiguity when the same anonymous union is defined across multiple modules.\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@243940 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/faisalv/clang/commits/0128dc8835c73dac96aa100bd5664b426c95c0a6"},{"sha":"25a74d705687776fb2bac34d518fd5ac4018ede3","author":{"email":"420c9fb3407b8e11ac322a0e7703f7b1f526df04@gmail.com","name":"Chandler Carruth"},"message":"[UB] Fix two cases of UB in copy/pasted code from SmallVector.\n\nWe should really stop copying and pasting code around. =/\n\nFound by UBSan.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@243945 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/faisalv/clang/commits/25a74d705687776fb2bac34d518fd5ac4018ede3"},{"sha":"9bf4b5f6264515fde32523af77dbea5557b1ec7a","author":{"email":"420c9fb3407b8e11ac322a0e7703f7b1f526df04@gmail.com","name":"Chandler Carruth"},"message":"[UB] Fix the two ways that we would try to memcpy from a null buffer in\nthe nested name specifier code.\n\nFirst, skip the entire thing when the input is empty.\n\nNext, handle the case where we started off with a null buffer and a zero\ncapacity to skip copying and freeing.\n\nThis was found with UBSan.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@243946 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/faisalv/clang/commits/9bf4b5f6264515fde32523af77dbea5557b1ec7a"}]}