{"push_id":906104573,"size":7,"distinct_size":7,"ref":"refs/heads/master","head":"a5e90b1b075f89f084047628d4ef181aded0bbfb","before":"edb42dc7bc0da0125ceacab810a553ce1f0cac8d","commits":[{"sha":"40ee068ec09b2d98162da5ea18b7c6fdbaa2bb71","author":{"email":"b913f13ef92ac157955c954ccaaff7be065faba4@arm.com","name":"Will Deacon"},"message":"ARM: 8465/1: mm: keep reserved ASIDs in sync with mm after multiple rollovers\n\nUnder some unusual context-switching patterns, it is possible to end up\nwith multiple threads from the same mm running concurrently with\ndifferent ASIDs:\n\n1. CPU x schedules task t with mm p containing ASID a and generation g\n   This task doesn't block and the CPU doesn't context switch.\n   So:\n     * per_cpu(active_asid, x) = {g,a}\n     * p->context.id = {g,a}\n\n2. Some other CPU generates an ASID rollover. The global generation is\n   now (g + 1). CPU x is still running t, with no context switch and\n   so per_cpu(reserved_asid, x) = {g,a}\n\n3. CPU y schedules task t', which shares mm p with t. The generation\n   mismatches, so we take the slowpath and hit the reserved ASID from\n   CPU x. p is then updated so that p->context.id = {g + 1,a}\n\n4. CPU y schedules some other task u, which has an mm != p.\n\n5. Some other CPU generates *another* CPU rollover. The global\n   generation is now (g + 2). CPU x is still running t, with no context\n   switch and so per_cpu(reserved_asid, x) = {g,a}.\n\n6. CPU y once again schedules task t', but now *fails* to hit the\n   reserved ASID from CPU x because of the generation mismatch. This\n   results in a new ASID being allocated, despite the fact that t is\n   still running on CPU x with the same mm.\n\nConsequently, TLBIs (e.g. as a result of CoW) will not be synchronised\nbetween the two threads.\n\nThis patch fixes the problem by updating all of the matching reserved\nASIDs when we hit on the slowpath (i.e. in step 3 above). This keeps\nthe reserved ASIDs in-sync with the mm and avoids the problem.\n\nCc: <stable@vger.kernel.org>\nReported-by: Tony Thompson <anthony.thompson@arm.com>\nReviewed-by: Catalin Marinas <catalin.marinas@arm.com>\nSigned-off-by: Will Deacon <will.deacon@arm.com>\nSigned-off-by: Russell King <rmk+kernel@arm.linux.org.uk>","distinct":true,"url":"https://api.github.com/repos/openwrt-es/linux/commits/40ee068ec09b2d98162da5ea18b7c6fdbaa2bb71"},{"sha":"08925c2f124f1bac6152a8b234268f9874fc70a5","author":{"email":"b8f3952ea9a7ddc193d05c7cc03f120086c69f1e@redhat.com","name":"Laura Abbott"},"message":"ARM: 8464/1: Update all mm structures with section adjustments\n\nCurrently, when updating section permissions to mark areas RO\nor NX, the only mm updated is current->mm. This is working off\nthe assumption that there are no additional mm structures at\nthe time. This may not always hold true. (Example: calling\nmodprobe early will trigger a fork/exec). Ensure all mm structres\nget updated with the new section information.\n\nReviewed-by: Kees Cook <keescook@chromium.org>\nSigned-off-by: Laura Abbott <labbott@fedoraproject.org>\nSigned-off-by: Russell King <rmk+kernel@arm.linux.org.uk>","distinct":true,"url":"https://api.github.com/repos/openwrt-es/linux/commits/08925c2f124f1bac6152a8b234268f9874fc70a5"},{"sha":"77f1b959b0b6db7a7941b4b4f9d3d287c67d7c15","author":{"email":"f6aa0246ff943bfa8602cdf60d40c481b38ed232@arm.linux.org.uk","name":"Russell King"},"message":"ARM: report proper DACR value in oops dumps\n\nWhen printing the DACR value, we print the domain register value.\nThis is incorrect, as with SW_PAN enabled, that is the current setting,\nrather than the faulting context's setting.  Arrange to print the\nfaulting domain's saved DACR value instead.\n\nSigned-off-by: Russell King <rmk+kernel@arm.linux.org.uk>","distinct":true,"url":"https://api.github.com/repos/openwrt-es/linux/commits/77f1b959b0b6db7a7941b4b4f9d3d287c67d7c15"},{"sha":"c014953d84ec21a4df9a43be2378861ea6e9246e","author":{"email":"f6aa0246ff943bfa8602cdf60d40c481b38ed232@arm.linux.org.uk","name":"Russell King"},"message":"ARM: fix uaccess_with_memcpy() with SW_DOMAIN_PAN\n\nThe uaccess_with_memcpy() code is currently incompatible with the SW\nPAN code: it takes locks within the region that we've changed the DACR,\npotentially sleeping as a result.  As we do not save and restore the\nDACR across co-operative sleep events, can lead to an incorrect DACR\nvalue later in this code path.\n\nReported-by: Peter Rosin <peda@axentia.se>\nTested-by: Peter Rosin <peda@axentia.se>\nSigned-off-by: Russell King <rmk+kernel@arm.linux.org.uk>","distinct":true,"url":"https://api.github.com/repos/openwrt-es/linux/commits/c014953d84ec21a4df9a43be2378861ea6e9246e"},{"sha":"fa0708b320f6da4c1104fe56e01b7abf66fd16ad","author":{"email":"4d6e5019b57e6819e5be9063452c1647eb43e037@freescale.com","name":"Anson Huang"},"message":"ARM: 8471/1: need to save/restore arm register(r11) when it is corrupted\n\nIn cpu_v7_do_suspend routine, r11 is used while it is NOT\nsaved/restored, different compiler may have different usage\nof ARM general registers, so it may cause issues during\ncalling cpu_v7_do_suspend.\n\nWe meet kernel fault occurs when using GCC 4.8.3, r11 contains\nvalid value before calling into cpu_v7_do_suspend, but when returned\nfrom this routine, r11 is corrupted and lead to kernel fault.\nDoing save/restore for those corrupted registers is a must in\nassemble code.\n\nSigned-off-by: Anson Huang <Anson.Huang@freescale.com>\nReviewed-by: Nicolas Pitre <nico@linaro.org>\nCc: <stable@vger.kernel.org> # v3.3+\nSigned-off-by: Russell King <rmk+kernel@arm.linux.org.uk>","distinct":true,"url":"https://api.github.com/repos/openwrt-es/linux/commits/fa0708b320f6da4c1104fe56e01b7abf66fd16ad"},{"sha":"34bfbae33ae84107d0c257edd6c6a8689a09be26","author":{"email":"5bd8013dd2cd1a75f84b8ab60f6057aa461774f0@freescale.com","name":"Shengjiu Wang"},"message":"ARM: 8475/1: SWP emulation: Restore original *data when failed\n\n__user_swpX_asm maybe failed in first STREX operation, emulate_swpX\nwill try again, but the *data has been changed in first time. which\ncauses the result is wrong.\nThis patch is to fix this issue. When STREX succeed, change the *data.\nif it fail, *data is not changed.\n\nSigned-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>\nSigned-off-by: Russell King <rmk+kernel@arm.linux.org.uk>","distinct":true,"url":"https://api.github.com/repos/openwrt-es/linux/commits/34bfbae33ae84107d0c257edd6c6a8689a09be26"},{"sha":"a5e90b1b075f89f084047628d4ef181aded0bbfb","author":{"email":"69652caca27c8b940640ad396ab71f93cacec34f@linux-foundation.org","name":"Linus Torvalds"},"message":"Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm\n\nPull ARM fixes from Russell King:\n \"Further ARM fixes:\n   - Anson Huang noticed that we were corrupting a register we shouldn't\n     be during suspend on some CPUs.\n   - Shengjiu Wang spotted a bug in the 'swp' instruction emulation.\n   - Will Deacon fixed a bug in the ASID allocator.\n   - Laura Abbott fixed the kernel permission protection to apply to all\n     threads running in the system.\n   - I've fixed two bugs with the domain access control register\n     handling, one to do with printing an appropriate value at oops\n     time, and the other to further fix the uaccess_with_memcpy code\"\n\n* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:\n  ARM: 8475/1: SWP emulation: Restore original *data when failed\n  ARM: 8471/1: need to save/restore arm register(r11) when it is corrupted\n  ARM: fix uaccess_with_memcpy() with SW_DOMAIN_PAN\n  ARM: report proper DACR value in oops dumps\n  ARM: 8464/1: Update all mm structures with section adjustments\n  ARM: 8465/1: mm: keep reserved ASIDs in sync with mm after multiple rollovers","distinct":true,"url":"https://api.github.com/repos/openwrt-es/linux/commits/a5e90b1b075f89f084047628d4ef181aded0bbfb"}]}