{"push_id":615376502,"size":18,"distinct_size":18,"ref":"refs/heads/master","head":"3f54dc48c0579b934eba5cfaeb19fb6c8ddcb9ec","before":"f643d9294f45487f22e8f33d6572530f17eff4e9","commits":[{"sha":"312cc39e270170b37a992b2d57773c828dcb9c6b","author":{"email":"0f584745b714e230c31946b740db1d21d0507567@gmail.com","name":"Bin Meng"},"message":"x86: quark: MRC codes clean up\n\nThis patch cleans up the quark MRC codes coding style by:\n- Remove BIT0/1../31 defines from mrc_util.h\n- Create names for the documented BITs and use them\n- For undocumented single BITs, use (1 << n) directly\n- For undocumented ORed BITs, use the hex number directly\n- Remove redundancy parenthesis all over the codes\n- Replace to use lower case hex numbers\n\nSigned-off-by: Bin Meng <bmeng.cn@gmail.com>","distinct":true,"url":"https://api.github.com/repos/u-boot/u-boot/commits/312cc39e270170b37a992b2d57773c828dcb9c6b"},{"sha":"1c854dc5d4d4ce3ddec08a319d1c094ade8dabe7","author":{"email":"47764aff062bf9ebe98a2274b29052b74a9567e2@ti.com","name":"Tom Rini"},"message":"arch/x86/cpu/quark/mrc.c: Switch to U_BOOT_DATE / U_BOOT_TIME\n\nUsing __DATE__ and __TIME__ results in an error due to -Werror=date-time\nwith gcc-4.9 (__DATE__ / __TIME__ might prevent reproducible builds) so\nswitch these over to U_BOOT_DATE / U_BOOT_TIME\n\nCc: Bin Meng <bmeng.cn@gmail.com>\nCc: Simon Glass <sjg@chromium.org>\nSigned-off-by: Tom Rini <trini@ti.com>\nAcked-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/u-boot/u-boot/commits/1c854dc5d4d4ce3ddec08a319d1c094ade8dabe7"},{"sha":"0eb9dc76e2987a07de9101e026ff26b28fa7496b","author":{"email":"0f584745b714e230c31946b740db1d21d0507567@gmail.com","name":"Bin Meng"},"message":"fdtdec: Improve fdtdec_get_pci_bdf() documentation\n\nAdd the description that how the compatible property is involved in\nthe fdtdec_get_pci_bdf() documentation.\n\nSigned-off-by: Bin Meng <bmeng.cn@gmail.com>\nAcked-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/u-boot/u-boot/commits/0eb9dc76e2987a07de9101e026ff26b28fa7496b"},{"sha":"83d9712e70dcd704462a3dc53254a05087c231f0","author":{"email":"0f584745b714e230c31946b740db1d21d0507567@gmail.com","name":"Bin Meng"},"message":"x86: Add queensbay fsp patch information in README.x86\n\nThe FSP release version 001 for Intel Queensbay has a bug which\ncould cause random endless loop during the FspInit call. This bug\nwas published by Intel although Intel did not describe any details.\nDescribe this information in the x86 doc so that U-Boot Queensbay\nsupport is invulnerable.\n\nSigned-off-by: Bin Meng <bmeng.cn@gmail.com>\nAcked-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/u-boot/u-boot/commits/83d9712e70dcd704462a3dc53254a05087c231f0"},{"sha":"e4ad6031a79fb3182613f95423ebcd771309679d","author":{"email":"0f584745b714e230c31946b740db1d21d0507567@gmail.com","name":"Bin Meng"},"message":"x86: quark: Enable on-chip ethernet controllers\n\nIntel Quark SoC integrates two 10/100 ethernet controllers which can\nbe connected to an external RMII PHY. The MAC IP is from Designware.\nEnable this support with the existing U-Boot Designware MAC driver\nso that the ethernet port on Intel Galileo board can be used.\n\nSigned-off-by: Bin Meng <bmeng.cn@gmail.com>\nAcked-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/u-boot/u-boot/commits/e4ad6031a79fb3182613f95423ebcd771309679d"},{"sha":"a7c3d5e2a9f4d0feb1e21733434e6d29f5ac566b","author":{"email":"0f584745b714e230c31946b740db1d21d0507567@gmail.com","name":"Bin Meng"},"message":"net: Add ethernet FCS length macro in net.h\n\nSome ethernet drivers use their own version of ethernet FCS length\nmacro which is really common. We define ETH_FCS_LEN in net.h and\nreplace those custom versions in various places.\n\nSigned-off-by: Bin Meng <bmeng.cn@gmail.com>\nAcked-by: Joe Hershberger <joe.hershberger@ni.com>","distinct":true,"url":"https://api.github.com/repos/u-boot/u-boot/commits/a7c3d5e2a9f4d0feb1e21733434e6d29f5ac566b"},{"sha":"c58ea6cb8c01b4e43e414cdc26bc29ad52284f21","author":{"email":"0f584745b714e230c31946b740db1d21d0507567@gmail.com","name":"Bin Meng"},"message":"net: Update README.drivers.eth to mention latest APIs\n\nREADME.drivers.eth still refers to the deprecated miiphy_register().\nUpdate the doc to mention new APIs mdio_alloc() and mdio_register().\n\nSigned-off-by: Bin Meng <bmeng.cn@gmail.com>\nAcked-by: Joe Hershberger <joe.hershberger@ni.com>","distinct":true,"url":"https://api.github.com/repos/u-boot/u-boot/commits/c58ea6cb8c01b4e43e414cdc26bc29ad52284f21"},{"sha":"8ee443b8ebb6f533e5f42d8da05600a1996a4dfd","author":{"email":"0f584745b714e230c31946b740db1d21d0507567@gmail.com","name":"Bin Meng"},"message":"net: Add Intel Topcliff GMAC driver\n\nAdd a new driver for the Gigabit Ethernet MAC found on Intel Topcliff\nPlatform Controller Hub. Tested under 10/100 half/full duplex and 1000\nfull duplex modes using ping and tftpboot commands.\n\nSigned-off-by: Bin Meng <bmeng.cn@gmail.com>\nAcked-by: Joe Hershberger <joe.hershberger@ni.com>","distinct":true,"url":"https://api.github.com/repos/u-boot/u-boot/commits/8ee443b8ebb6f533e5f42d8da05600a1996a4dfd"},{"sha":"a84134f72147bc31babba8006f8a9bdc55bc5a03","author":{"email":"0f584745b714e230c31946b740db1d21d0507567@gmail.com","name":"Bin Meng"},"message":"x86: crownbay: Enable Intel Topcliff GMAC support\n\nIntel Crown Bay board has one ethernet port connected from Intel\nTopcliff PCH. Enable it in the board configuration.\n\nSigned-off-by: Bin Meng <bmeng.cn@gmail.com>\nReviewed-by: Joe Hershberger <joe.hershberger@ni.com>","distinct":true,"url":"https://api.github.com/repos/u-boot/u-boot/commits/a84134f72147bc31babba8006f8a9bdc55bc5a03"},{"sha":"fba02d69c6fc7f7861ada6181ab6097d20495027","author":{"email":"0f584745b714e230c31946b740db1d21d0507567@gmail.com","name":"Bin Meng"},"message":"x86: crownbay: Enable saving environment in SPI flash\n\nSaving U-Boot's environment in SPI flash on Intel CrownBay board.\n\nSigned-off-by: Bin Meng <bmeng.cn@gmail.com>\nAcked-by: Simon Glass <sg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/u-boot/u-boot/commits/fba02d69c6fc7f7861ada6181ab6097d20495027"},{"sha":"bea59393c88ba86f6433f8c277478f312ff0acf3","author":{"email":"0f584745b714e230c31946b740db1d21d0507567@gmail.com","name":"Bin Meng"},"message":"x86: galileo: Enable saving environment in SPI flash\n\nSaving U-Boot's environment in SPI flash on Intel Galileo board.\n\nSigned-off-by: Bin Meng <bmeng.cn@gmail.com>\nAcked-by: Simon Glass <sg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/u-boot/u-boot/commits/bea59393c88ba86f6433f8c277478f312ff0acf3"},{"sha":"6f1eba49a558421e3fcb06ab0addc12b9a3804c6","author":{"email":"0f584745b714e230c31946b740db1d21d0507567@gmail.com","name":"Bin Meng"},"message":"x86: Add ramboot and nfsboot commands in x86-common.h\n\nIt is very common in the debug stage to test U-Boot loading a linux\nkernel. The commands to boot linux kernel with ramdisk and nfs as the\nroot are common to all x86 targets, so it makes sense to add them as\nthe U-Boot default environment in x86-common.h.\n\nSigned-off-by: Bin Meng <bmeng.cn@gmail.com>\nAcked-by: Simon Glass <sjg@chroimum.org>","distinct":true,"url":"https://api.github.com/repos/u-boot/u-boot/commits/6f1eba49a558421e3fcb06ab0addc12b9a3804c6"},{"sha":"891ee87e2b4586012ce5bacd9149177f61de4ad5","author":{"email":"378b411a8a63ecc7605ec4272234862d7781c6ae@socionext.com","name":"Masahiro Yamada"},"message":"dm: serial: remove bogus include <ns16550.h>\n\nSerial-uclass should be generically implemented without depending\na particular hardware.  Fortunately, nothing in include/ns16550.h is\nreferenced from drivers/serial/serial-uclass.c, so remove this bogus\ninclude.\n\nSigned-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>\nReviewed-by: Tom Rini <trini@konsulko.com>\nAcked-by: Simon Glass <sjg@chromium.org>","distinct":true,"url":"https://api.github.com/repos/u-boot/u-boot/commits/891ee87e2b4586012ce5bacd9149177f61de4ad5"},{"sha":"a923abc2d3044324e3c88af7776469a31edf3121","author":{"email":"9be92b3dbbd6611e3e4c9209fb3d04b4919e7cca@citrix.com","name":"Ian Campbell"},"message":"sunxi: set GMAC TX delay = 0x1 on Cubietruck.\n\nOf 4 boards in our automated test system 2 do not have reliable\nnetworking with the default TX delay of 0x0. Increasing to 0x1 seems\nto make things reliable on all 4 boards.\n\nSome previous ad-hpoc tests with tx delay set to 0, 1, 2 and 3 on one\nof the problematic boards showed:\n\n0: mw.l 0x1c20164 0x006 1     -- t/o in 4/5 tftp runs\n1: mw.l 0x1c20164 0x406 1     -- t/o in 1/5 tftp runs\n2: mw.l 0x1c20164 0x806 1     -- t/o in 1/5 tftp runs\n3: mw.l 0x1c20164 0xc06 1     -- t/o many times in first tftp run\n\nFor 0, 1 and 2 \"t/o\" means one or two \"T\" glitches in the download,\nbut it did complete. For 3 those were basically continuous and it\ncouldn't complete.\n\ntftp was of a 16M initrd.\n\nSigned-off-by: Ian Campbell <ian.campbell@citrix.com>\nAcked-by: Hans de Goede <hdegoede@redhat.com>\nSigned-off-by: Hans de Goede <hdegoede@redhat.com>","distinct":true,"url":"https://api.github.com/repos/u-boot/u-boot/commits/a923abc2d3044324e3c88af7776469a31edf3121"},{"sha":"99deda1dff206d679fcc87949b7151df0d47ea73","author":{"email":"2c3491876dcb8d10f142a3cb457264baecb55892@gmail.com","name":"Iain Paton"},"message":"sunxi: axp209: fix incorrect limits on ldo3\n\nboard/sunxi/board.c tries to set ldo3 to 2.8v however drivers/power/axp209.c\ncontains an incorrect limit on ldo3 of 2.275v\n\nThe origin of the incorrect limit seems likely due to some inconsistencies\nin the axp209 datasheet. ldo3 is described with different limits in\ndifferent sections. register 0x29 uses 7 bits for voltage configuration\nwhile the 2.275v limit would apply if only 6 bits were used.\nProbably this is a cut&paste error from register 0x23\n\nThe linux kernel driver has the correct limit and operation up to the 2.8v\nrequired by my board has been physically verified with a multimeter.\n\nSigned-off-by: Iain Paton <ipaton0@gmail.com>\nAcked-by: Hans de Goede <hdegoede@redhat.com>\nSigned-off-by: Hans de Goede <hdegoede@redhat.com>","distinct":true,"url":"https://api.github.com/repos/u-boot/u-boot/commits/99deda1dff206d679fcc87949b7151df0d47ea73"},{"sha":"10af87817a3d924bfbfce0cc323f9785cccdb131","author":{"email":"47764aff062bf9ebe98a2274b29052b74a9567e2@konsulko.com","name":"Tom Rini"},"message":"Merge branch 'master' of git://git.denx.de/u-boot-x86","distinct":true,"url":"https://api.github.com/repos/u-boot/u-boot/commits/10af87817a3d924bfbfce0cc323f9785cccdb131"},{"sha":"f2137c2a7f401089918c7768cbdc56444b1c7548","author":{"email":"47764aff062bf9ebe98a2274b29052b74a9567e2@konsulko.com","name":"Tom Rini"},"message":"Merge branch 'master' of git://git.denx.de/u-boot-dm","distinct":true,"url":"https://api.github.com/repos/u-boot/u-boot/commits/f2137c2a7f401089918c7768cbdc56444b1c7548"},{"sha":"3f54dc48c0579b934eba5cfaeb19fb6c8ddcb9ec","author":{"email":"47764aff062bf9ebe98a2274b29052b74a9567e2@konsulko.com","name":"Tom Rini"},"message":"Merge branch 'master' of git://git.denx.de/u-boot-sunxi","distinct":true,"url":"https://api.github.com/repos/u-boot/u-boot/commits/3f54dc48c0579b934eba5cfaeb19fb6c8ddcb9ec"}]}