{"push_id":862688048,"size":1000,"distinct_size":113051,"ref":"refs/heads/test_zram","head":"f1a2df7fe123fb445abc2e9d8010572dceda69bd","before":"afb9079fc824719330f1986e927dc4e3b612fe85","commits":[{"sha":"879f861303e0393edb883199e3c4631242b26b45","author":{"email":"db18ceb40708dab5e9bcdbeb620f7eed18da08e5@codeaurora.org","name":"Vinayak Menon"},"message":"lowmemorykiller: adapt to vmpressure\n\nThere were issues reported, where page cache thrashing was\nobserved because of LMK not killing tasks when required,\nresulting in sluggishness and higher app launch latency.\nLMK does not kill a task for the following reasons.\n1. The free and file pages are above the LMK thresholds\n2. LMK tries to pick task with an adj level corresponding\nto current thresholds, but fails to do so because of the\nabsence of tasks in that level.\nBut sometimes it is better to kill a lower adj task, than thrashing.\nAnd there are cases where the number of file pages are huge, though\nwe dont thrash, the reclaim process becomes time consuming, since\nLMK triggers will be delayed because of higher number of file\npages. Even in such cases, when reclaim path finds it difficult\nto reclaim pages, it is better to trigger lmk to free up some memory\nfaster.\n\nThe basic idea here is to make LMK more aggressive dynamically\nwhen such a thrashing scenario is detected.\n\nTo detect thrashing, this patch uses vmpressure events.\nThe values of vmpressure upon which an action has to be taken,\nwas derived empirically.\n\nThis patch also adds tracepoints to validate this feature,\nalmk_shrink and almk_vmpressure.\n\nTwo knobs are available for the user to tune adaptive lmk\nbehaviour.\n\n/sys/module/lowmemorykiller/parameters/adaptive_lmk - Write\n1 to enable the feature, 0 to disable. By default disabled.\n\n/sys/module/lowmemorykiller/parameters/vmpressure_file_min -\nThis parameter controls the behaviour of LMK when vmpressure\nis in the range of 90-94. Adaptive lmk triggers based on number file\npages wrt vmpressure_file_min, when vmpressure is in the range of\n90-94. Usually this is a pseudo minfree value, higher than the\nhighest configured value in minfree array.\n\nSigned-off-by: Vinayak Menon <vinmenon@codeaurora.org>\n[neo: This will be enabled via userspace.]\nSigned-off-by: Pranav Vashi <neobuddy89@gmail.com>","distinct":true,"url":"https://api.github.com/repos/BrateloSlava/kernel_apq8064/commits/879f861303e0393edb883199e3c4631242b26b45"},{"sha":"5bcb3d6bb805be1041715bf1f649abcef3aa8aec","author":{"email":"d688953a19dcb476c5fb90e6abba87f77b09be65@gmail.com","name":"Pranav Vashi"},"message":"defconfig: Update\n\nSigned-off-by: Pranav Vashi <neobuddy89@gmail.com>","distinct":true,"url":"https://api.github.com/repos/BrateloSlava/kernel_apq8064/commits/5bcb3d6bb805be1041715bf1f649abcef3aa8aec"},{"sha":"0d51068508c42e2775ad912c49edfbc349aa4d9a","author":{"email":"dc8057ea5614a1a9be9ed66fe45614cc7829300e@codeaurora.org","name":"Anil kumar mamidala"},"message":"msm: lpm_levels: return new idle level to cpuidle framework\n\nNeed to return the new idle level to cpuidle framework\nbut just returned input value argument 'index' which is\nnot used actually at lpm_cpu_power_select().\n\nSigned-off-by: Anil kumar mamidala <amami@codeaurora.org>\nSigned-off-by: Pranav Vashi <neobuddy89@gmail.com>","distinct":true,"url":"https://api.github.com/repos/BrateloSlava/kernel_apq8064/commits/0d51068508c42e2775ad912c49edfbc349aa4d9a"},{"sha":"f512eb6e7233f5776fc7a43defef9773d0717490","author":{"email":"6550883a1a6727083a7f532b897352c430bfbacf@codeaurora.org","name":"Murali Nalajala"},"message":"msm: msm-pm: use proper co-processor instructions\n\nExisting assembly instructions are not valid\nfor AArch64 mode for ARMv8 targets. Use proper\nco-processor instructions for AArch64 mode for\nARMv8 targets to read the cache properties.\n\nSigned-off-by: Murali Nalajala <mnalajal@codeaurora.org>\nSigned-off-by: Pranav Vashi <neobuddy89@gmail.com>","distinct":true,"url":"https://api.github.com/repos/BrateloSlava/kernel_apq8064/commits/f512eb6e7233f5776fc7a43defef9773d0717490"},{"sha":"5536b5258ffce964336a3a734f075e9c8ab86510","author":{"email":"6550883a1a6727083a7f532b897352c430bfbacf@codeaurora.org","name":"Murali Nalajala"},"message":"msm: msm-pm: Remove outer cache functions\n\nRemove outer cache functions to do cache maintenance\noperations because all the newer targets having the\nintegrated cache controller and cache operations are\ndone by standard cache maintenance functions.\n\nSigned-off-by: Murali Nalajala <mnalajal@codeaurora.org>\nSigned-off-by: Pranav Vashi <neobuddy89@gmail.com>","distinct":true,"url":"https://api.github.com/repos/BrateloSlava/kernel_apq8064/commits/5536b5258ffce964336a3a734f075e9c8ab86510"},{"sha":"7de1ee1deee6f5580abb27f196c10a616e8fae25","author":{"email":"6550883a1a6727083a7f532b897352c430bfbacf@codeaurora.org","name":"Murali Nalajala"},"message":"msm: pm: Remove redundant cpu_init API\n\ncpu_init() API setup the per-CPU stacks after cores\ncomes out of the low power modes. This API is not\nneeded after the PM driver start using the standard\nARM suspend/resume framework.\n\nSigned-off-by: Murali Nalajala <mnalajal@codeaurora.org>\nSigned-off-by: Pranav Vashi <neobuddy89@gmail.com>","distinct":true,"url":"https://api.github.com/repos/BrateloSlava/kernel_apq8064/commits/7de1ee1deee6f5580abb27f196c10a616e8fae25"},{"sha":"ffd1a9408078a07622e85b1190463cea59964d80","author":{"email":"6550883a1a6727083a7f532b897352c430bfbacf@codeaurora.org","name":"Murali Nalajala"},"message":"msm: pm: move PM driver to a machine independent location\n\nAs part of code reorganisation move PM driver from mach-msm\ndirectory to a machine independent location in kernel.\n\nSigned-off-by: Murali Nalajala <mnalajal@codeaurora.org>\nSigned-off-by: Pranav Vashi <neobuddy89@gmail.com>","distinct":true,"url":"https://api.github.com/repos/BrateloSlava/kernel_apq8064/commits/ffd1a9408078a07622e85b1190463cea59964d80"},{"sha":"be6a08fbaa265c89babf0c79ba6d8132a29591c1","author":{"email":"6550883a1a6727083a7f532b897352c430bfbacf@codeaurora.org","name":"Murali Nalajala"},"message":"msm: pm-stats: move pm-stats driver to a new location\n\nAs part of code reorganisation move pm-stats driver from\nmach-msm direcotry to machine independent location in\nkernel.\n\nSigned-off-by: Murali Nalajala <mnalajal@codeaurora.org>\nSigned-off-by: Pranav Vashi <neobuddy89@gmail.com>","distinct":true,"url":"https://api.github.com/repos/BrateloSlava/kernel_apq8064/commits/be6a08fbaa265c89babf0c79ba6d8132a29591c1"},{"sha":"233be672d9c5657fdf298ea81c85e5f2076a4105","author":{"email":"6550883a1a6727083a7f532b897352c430bfbacf@codeaurora.org","name":"Murali Nalajala"},"message":"msm: idle: fix pm-boot driver compilation errors\n\nCONFIG_CPU_V7 is not defined for latest ARM based targets.\nDue to this few variables and function definitions are not\nvisible to driver and this causes the driver compilation\nfailure(pm-boot.c).\n\nSigned-off-by: Murali Nalajala <mnalajal@codeaurora.org>\nSigned-off-by: Pranav Vashi <neobuddy89@gmail.com>","distinct":true,"url":"https://api.github.com/repos/BrateloSlava/kernel_apq8064/commits/233be672d9c5657fdf298ea81c85e5f2076a4105"},{"sha":"44c55d35c97125e91b7700c68f0a4d6413f0966b","author":{"email":"6550883a1a6727083a7f532b897352c430bfbacf@codeaurora.org","name":"Murali Nalajala"},"message":"msm: pm-boot: move pm-boot driver to a new location\n\nThis patch moves the pm-boot.c driver from mach-msm directory\nto machine independent location in kernel. It also takes care\nof moving the idle.h and pm-boot.h header files.\n\nSigned-off-by: Murali Nalajala <mnalajal@codeaurora.org>\nSigned-off-by: Pranav Vashi <neobuddy89@gmail.com>","distinct":true,"url":"https://api.github.com/repos/BrateloSlava/kernel_apq8064/commits/44c55d35c97125e91b7700c68f0a4d6413f0966b"},{"sha":"1a4f8117b244150337b9dc7b59f7fabbad01aab0","author":{"email":"6550883a1a6727083a7f532b897352c430bfbacf@codeaurora.org","name":"Murali Nalajala"},"message":"msm: no-pm: move no-pm driver to a new location\n\nThis patch moves no-pm driver from mach-msm directory\nto machine independent location in a kernel tree.\n\nSigned-off-by: Murali Nalajala <mnalajal@codeaurora.org>\nSigned-off-by: Pranav Vashi <neobuddy89@gmail.com>","distinct":true,"url":"https://api.github.com/repos/BrateloSlava/kernel_apq8064/commits/1a4f8117b244150337b9dc7b59f7fabbad01aab0"},{"sha":"f92989cc567fb3908d82509bf5280729eb40f36d","author":{"email":"6550883a1a6727083a7f532b897352c430bfbacf@codeaurora.org","name":"Murali Nalajala"},"message":"msm: pm: export msm_pm_collapse\n\nCurrently cpu_suspend() API takes 2 arguments as input\nwhere one of the argument used as a suspend finisher.\nSuspend finisher function takes care of handing over\nthe control to TZ after doing the necessary house\nkeeping of core states. On latest ARM based targets\ncpu_suspend() API is modified and it accepts only\na single argument and suspend finisher is registered\nas cpu_ops at boot time.\n\nSigned-off-by: Murali Nalajala <mnalajal@codeaurora.org>\nSigned-off-by: Pranav Vashi <neobuddy89@gmail.com>","distinct":true,"url":"https://api.github.com/repos/BrateloSlava/kernel_apq8064/commits/f92989cc567fb3908d82509bf5280729eb40f36d"},{"sha":"342bf0d14b43c6a130cdf109fa055d30233a6c3a","author":{"email":"6550883a1a6727083a7f532b897352c430bfbacf@codeaurora.org","name":"Murali Nalajala"},"message":"qcom: msm-pm: move cpu status driver register to arch_initcall\n\nCPU status driver checks whether secondary CPUs are really\npowered off or not in the HOTPLUG path. Currently this\ndriver init being called from the board file. But on newer\ntargets there are no board files exist. Hence move the driver\nregistration to arch_initcall level.\n\nSigned-off-by: Murali Nalajala <mnalajal@codeaurora.org>\nSigned-off-by: Pranav Vashi <neobuddy89@gmail.com>","distinct":true,"url":"https://api.github.com/repos/BrateloSlava/kernel_apq8064/commits/342bf0d14b43c6a130cdf109fa055d30233a6c3a"},{"sha":"406c8d0ffe2fda061a7447d8560ef9b9a6d624ff","author":{"email":"6550883a1a6727083a7f532b897352c430bfbacf@codeaurora.org","name":"Murali Nalajala"},"message":"qcom: msm-pm: modify msm_bus.h header path correctly\n\nModify header path correctly for msm_bus.h to avoid\nARM64 bit compilation issues.\n\nSigned-off-by: Murali Nalajala <mnalajal@codeaurora.org>\nSigned-off-by: Pranav Vashi <neobuddy89@gmail.com>","distinct":true,"url":"https://api.github.com/repos/BrateloSlava/kernel_apq8064/commits/406c8d0ffe2fda061a7447d8560ef9b9a6d624ff"},{"sha":"9b5f3af5f0fda369aad1b41bc610b5e85c987250","author":{"email":"0a7e98000ce64542cef1b32382dcb65c847985af@codeaurora.org","name":"Prasad Sodagudi"},"message":"qcom: msm-pm: fix bug in finding whether cache is WT or WB\n\nBit 30 in Cache size ID register indicates write back cache for\nARMV8 architecture. Fix the bug to use bit30 in finding writeback\ncache.\n\nSigned-off-by: Anji Jonnala <anjir@codeaurora.org>\nSigned-off-by: Pranav Vashi <neobuddy89@gmail.com>","distinct":true,"url":"https://api.github.com/repos/BrateloSlava/kernel_apq8064/commits/9b5f3af5f0fda369aad1b41bc610b5e85c987250"},{"sha":"dbedda5b6a704e9ce1d78480613c672b268ef0a6","author":{"email":"d32984257c2b1f19a52887b31db69164a662fd03@codeaurora.org","name":"Anji Jonnala"},"message":"qcom: power: pm-data: use param_get_int\n\nUsing param_get_long to update the integer variables would leads\nto variables populated with wrong values, hence switch to param_get_int.\n\nSigned-off-by: Anji Jonnala <anjir@codeaurora.org>\nSigned-off-by: Pranav Vashi <neobuddy89@gmail.com>","distinct":true,"url":"https://api.github.com/repos/BrateloSlava/kernel_apq8064/commits/dbedda5b6a704e9ce1d78480613c672b268ef0a6"},{"sha":"793d62b66e57fed5f5ef8f81df1f75ffcb38c096","author":{"email":"dc8057ea5614a1a9be9ed66fe45614cc7829300e@codeaurora.org","name":"Anil kumar mamidala"},"message":"msm: pm: add new stat variable for reporting suspend stats\n\nIncorrectly reporting suspend stats because of moving timekeeping\nlogic to prepare/resume callbacks in suspend. Declare a new\nglobal system_suspend stat variable for reporting suspend\nstats and remove the suspend stats for each core.\n\nSigned-off-by: Anil Kumar Mamidala <amami@codeaurora.org>\nSigned-off-by: Pranav Vashi <neobuddy89@gmail.com>","distinct":true,"url":"https://api.github.com/repos/BrateloSlava/kernel_apq8064/commits/793d62b66e57fed5f5ef8f81df1f75ffcb38c096"},{"sha":"87becd9a7ed9f777ac21aac4c55d3c3ae667db33","author":{"email":"8f186edd08c143316ac066949c2e7b18d322cddb@codeaurora.org","name":"Karthik Parsha"},"message":"msm: lpm-stats: Support cpu and cluster lpm stats\n\nOn current architectures the number of hardware levels that support low\npower modes is limited to cpus and l2. These cpus and l2 in-turn support\na fixed set of low power modes.\nNewer architectures can have a hierarchy of clusters. Different clusters\nin this hierarchy can support different low power modes.\nCPU's, in different clusters, may support different low power modes.\nThe low power modes supported by each of these levels is defined in the\ndevice tree for each target.\nAdd new apis to receive information about each level's low power modes and\nto collect and print stats for each the levels low power modes as listed\nin the device tree.\n\ncluster 0\n|\t|_ _ lpm 0\n|\t|_ _ lpm 1\n|\t|\n|\t*\n|\n|_ _ _ _cluster 0\n|\t|\t|_ _ lpm 0\n|\t|\t|_ _ lpm 1\n|\t|\t|\n|\t|\t*\n|\t|_ _ _ _ _ _cpu 0\n|\t|\t\t|_ _ lpm 0\n|\t|\t\t|_ _ lpm 1\n|\t|\t\t|\n|\t|\t\t*\n|\t|\n|\t|_ _ _ _ _ _cpu 1\n|\t|\t\t|_ _ lpm 0\n|\t|\t\t|_ _ lpm 1\n|\t|\t\t|\n|\t|\t\t*\n|\t*\n|\n|_ _ _ _cluster 1\n|\t|\t|_ _ lpm 0\n|\t|\t|_ _ lpm 1\n|\t|\t|\n*\t|\t*\n\t|_ _ _ _ _ _cpu 100\n\t|\t\t|_ _ lpm 0\n\t|\t\t|_ _ lpm 1\n\t|\t\t|\n\t|\t\t*\n\t|\n\t|_ _ _ _ _ _cpu 101\n\t|\t\t|_ _ lpm 0\n\t|\t\t|_ _ lpm 1\n\t|\t\t|\n\t|\t\t*\n\t*\n\nSigned-off-by: Karthik Parsha <kparsha@codeaurora.org>\nSigned-off-by: Pranav Vashi <neobuddy89@gmail.com>","distinct":true,"url":"https://api.github.com/repos/BrateloSlava/kernel_apq8064/commits/87becd9a7ed9f777ac21aac4c55d3c3ae667db33"},{"sha":"24b912f133226dd641e47c9a39565d2b38f7f91e","author":{"email":"6550883a1a6727083a7f532b897352c430bfbacf@codeaurora.org","name":"Murali Nalajala"},"message":"msm: lpm_levels: move lpm_level driver to cpuidle directory\n\nPart of power driver code reorganisation move lpm_level\ndriver to a generic/appropriate place in the kernel directory.\n\nSigned-off-by: Murali Nalajala <mnalajal@codeaurora.org>\nSigned-off-by: Pranav Vashi <neobuddy89@gmail.com>","distinct":true,"url":"https://api.github.com/repos/BrateloSlava/kernel_apq8064/commits/24b912f133226dd641e47c9a39565d2b38f7f91e"},{"sha":"00ae827ad0d2145a68930af251cf1edc8898d701","author":{"email":"98996d53ce579fa37f08d0061abc5355e223c79e@codeaurora.org","name":"Abhijeet Dharmapurikar"},"message":"msm: krait-regulator: prepare for soft start workaround\n\nThe krait-regulator-pmic.h will expose an api to be called just\nbefore the L2 is power collapsed. Move krait-regulator-pmic.h to\nan appropriate location under include/soc/qcom/krait-regulator-pmic.h\n\nSigned-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>\nSigned-off-by: Pranav Vashi <neobuddy89@gmail.com>","distinct":true,"url":"https://api.github.com/repos/BrateloSlava/kernel_apq8064/commits/00ae827ad0d2145a68930af251cf1edc8898d701"}]}