{"push_id":681622929,"size":3,"distinct_size":3,"ref":"refs/heads/master","head":"e734e0f3ca6f9544dc7b0901d5e7419f5db59a60","before":"e2ca5f68449daf4974328a1c49f913c51258e561","commits":[{"sha":"64fa47acb50c14e81446abb9b87bbe5b5bc3be45","author":{"email":"865b3d86a2e971da767d6f3d333fc309b62400d5@virginia.edu","name":"tyx3gu"},"message":"Made DFF code less general by removing set, reset parameters since they are currently causing runtime errors. Added and and gate component to make the STE code more readable.","distinct":true,"url":"https://api.github.com/repos/tyx3gu/AP_FPGA/commits/64fa47acb50c14e81446abb9b87bbe5b5bc3be45"},{"sha":"70320b79f7cca3d0de0d24af4ccfb2c1c3b27c78","author":{"email":"865b3d86a2e971da767d6f3d333fc309b62400d5@virginia.edu","name":"tyx3gu"},"message":"STE block works, but Acceptance Class generator does not. Some minor binary logic gone astray, perhaps.","distinct":true,"url":"https://api.github.com/repos/tyx3gu/AP_FPGA/commits/70320b79f7cca3d0de0d24af4ccfb2c1c3b27c78"},{"sha":"e734e0f3ca6f9544dc7b0901d5e7419f5db59a60","author":{"email":"865b3d86a2e971da767d6f3d333fc309b62400d5@virginia.edu","name":"tyx3gu"},"message":"Updated Acceptance Class generator code; hex mode still does not work. Verified STE behavior and it works 100%.","distinct":true,"url":"https://api.github.com/repos/tyx3gu/AP_FPGA/commits/e734e0f3ca6f9544dc7b0901d5e7419f5db59a60"}]}