{"push_id":693007224,"size":3,"distinct_size":3,"ref":"refs/heads/master","head":"4b9c2b707b1383b4e3b3c50e445afd0af8922788","before":"78ad175b3060aae058ed5d05ced2bc58714901cd","commits":[{"sha":"1477b3830740b272e36187e85a7207a09833012b","author":{"email":"a228da394793d2e6e5b1b6a5525945d856f25556@redhat.com","name":"Florian Weimer"},"message":"pthread_key_create: Fix typo in comment","distinct":true,"url":"https://api.github.com/repos/bminor/glibc/commits/1477b3830740b272e36187e85a7207a09833012b"},{"sha":"0724d898bb1c15872b1b59c01a9e9d9d74bb4f56","author":{"email":"4203343c2c7276da67fb8253a5090c81e87d5324@intel.com","name":"Andrew Senkevich"},"message":"More strict check of AVX512 support in assembler.\n\nBinutils 2.24 doesn't support some AVX512 instructions with ZMM\nregisters, so we need add more strict check.\n\n    * configure.ac: Added more strict check.\n    * configure: Regenerated.","distinct":true,"url":"https://api.github.com/repos/bminor/glibc/commits/0724d898bb1c15872b1b59c01a9e9d9d74bb4f56"},{"sha":"4b9c2b707b1383b4e3b3c50e445afd0af8922788","author":{"email":"4203343c2c7276da67fb8253a5090c81e87d5324@intel.com","name":"Andrew Senkevich"},"message":"Vector sin for x86_64 and tests.\n\nHere is implementation of vectorized sin containing SSE, AVX,\nAVX2 and AVX512 versions according to Vector ABI\n<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.\n\n    * bits/libm-simd-decl-stubs.h: Added stubs for sin.\n    * math/bits/mathcalls.h: Added sin declaration with __MATHCALL_VEC.\n    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New versions added.\n    * sysdeps/x86/fpu/bits/math-vector.h: SIMD declaration for sin.\n    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.\n    * sysdeps/x86_64/fpu/Versions: New versions added.\n    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.\n    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added\n    build of SSE, AVX2 and AVX512 IFUNC versions.\n    * sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S: New file.\n    * sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core_sse4.S: New file.\n    * sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S: New file.\n    * sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core_avx2.S: New file.\n    * sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S: New file.\n    * sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core_avx512.S: New file.\n    * sysdeps/x86_64/fpu/svml_d_sin2_core.S: New file.\n    * sysdeps/x86_64/fpu/svml_d_sin4_core.S: New file.\n    * sysdeps/x86_64/fpu/svml_d_sin4_core_avx.S: New file.\n    * sysdeps/x86_64/fpu/svml_d_sin8_core.S: New file.\n    * sysdeps/x86_64/fpu/svml_d_sin_data.S: New file.\n    * sysdeps/x86_64/fpu/svml_d_sin_data.h: New file.\n    * sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Added vector sin test.\n    * sysdeps/x86_64/fpu/test-double-vlen2.c: Likewise.\n    * sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise.\n    * sysdeps/x86_64/fpu/test-double-vlen4-avx2.c: Likewise.\n    * sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise.\n    * sysdeps/x86_64/fpu/test-double-vlen4.c: Likewise.\n    * sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise.\n    * sysdeps/x86_64/fpu/test-double-vlen8.c: Likewise.\n    * NEWS: Mention addition of x86_64 vector sin.","distinct":true,"url":"https://api.github.com/repos/bminor/glibc/commits/4b9c2b707b1383b4e3b3c50e445afd0af8922788"}]}