{"push_id":537480763,"size":1,"distinct_size":1,"ref":"refs/heads/master","head":"fa4da5baa4617ca4f20f1d861a73cbc5acd0b40e","before":"f9c4aba3be8f239980c4c48399540fc5ab4ea4f2","commits":[{"sha":"fa4da5baa4617ca4f20f1d861a73cbc5acd0b40e","author":{"email":"76a8e82c3bdc78a1f9490a34857cdee8b1b06a45@anl.gov","name":"Hal Finkel"},"message":"[PowerPC] Add support for the CMPB instruction\n\nNewer POWER cores, and the A2, support the cmpb instruction. This instruction\ncompares its operands, treating each of the 8 bytes in the GPRs separately,\nreturning a 'mask' result of 0 (for false) or -1 (for true) in each byte.\n\nCode generation support is added, in the form of a PPCISelDAGToDAG\nDAG-preprocessing routine, that recognizes patterns close to what the\ninstruction computes (either exactly, or related by a constant masking\noperation), and generates the cmpb instruction (along with any necessary\nconstant masking operation). This can be expanded if use cases arise.","distinct":true,"url":"https://api.github.com/repos/chapuni/llvm-project/commits/fa4da5baa4617ca4f20f1d861a73cbc5acd0b40e"}]}