{"push_id":711195757,"size":22,"distinct_size":0,"ref":"refs/heads/ci20-v3.18","head":"e3d08718b8a276a0670536384507f60be9b8d456","before":"58aab7326ee6e1e637bd25a10b177990c16753bc","commits":[{"sha":"81065c3d1b004b89398ba24e6d52306f1609895c","author":{"email":"90b1f1e0d9d1df29083c0b820499620b8628880b@imgtec.com","name":"Alex Smith"},"message":"mmc: jz47xx: Fix race condition in IRQ mask update\n\nA spinlock is held while updating the internal copy of the IRQ mask,\nbut not while writing it to the actual IMASK register. After the lock\nis released, an IRQ can occur before the IMASK register is written.\nIf handling this IRQ causes the mask to be changed, when the handler\nreturns back to the middle of the first mask update, a stale value\nwill be written to the mask register.\n\nIf this causes an IRQ to become unmasked that cannot have its status\ncleared by writing a 1 to it in the IFLG register, e.g. the SDIO IRQ,\nthen we can end up stuck with the same IRQ repeatedly being fired but\nnot handled. Normally the MMC IRQ handler attempts to clear any\nunexpected IRQs by writing IFLG, but for those that cannot be cleared\nin this way then the IRQ will just repeatedly fire.\n\nThis was resulting in lockups after a while of using Wi-Fi on the\nCI20 (GitHub issue #19).\n\nResolve by holding the spinlock until after the IMASK register has\nbeen updated.\n\nSigned-off-by: Alex Smith <alex.smith@imgtec.com>","distinct":false,"url":"https://api.github.com/repos/HarveyHunt/CI20_linux/commits/81065c3d1b004b89398ba24e6d52306f1609895c"},{"sha":"7324be771d0da657b6cd6d258500e1cb2a88a92e","author":{"email":"8ffebdaa68e4f687613bdd10e0c2ee36398f5dd7@users.noreply.github.com","name":"ZubairLK"},"message":"Merge pull request #31 from aejsmith/ci20-v3.18-mmc\n\nResolve Wi-Fi stall issues","distinct":false,"url":"https://api.github.com/repos/HarveyHunt/CI20_linux/commits/7324be771d0da657b6cd6d258500e1cb2a88a92e"},{"sha":"9d01c5855b0dfb2ad15346e334625c37a75117be","author":{"email":"ad5f48d7adcc76c7bd25c44a65841f2a4476216d@imgtec.com","name":"Matt Redfearn"},"message":"dt: regulator: Add dt binding documentation for Ingenic JZ4780 LCR\n\nThe patch adds a simple binding document for the Ingenic JZ4780\nLow power Control Register\n\nThe Ingenic jz4780 SoC contains a Low power Control Register\nwhich may be used to turn off power to various parts of the SoC.\n\nThe modules which may be powered down are the Secondary CPU, the VPU, GPU and\nGPS modules.\n\nSigned-off-by: Matt Redfearn <matt.redfearn@imgtec.com>","distinct":false,"url":"https://api.github.com/repos/HarveyHunt/CI20_linux/commits/9d01c5855b0dfb2ad15346e334625c37a75117be"},{"sha":"6d11bb93c2745055e20c99f260b062748a1ab721","author":{"email":"ad5f48d7adcc76c7bd25c44a65841f2a4476216d@imgtec.com","name":"Matt Redfearn"},"message":"regulator: jz4780-lcr: jz4780 Low power Control Register driver\n\nThis patch adds a driver providing regulator API access to the Ingenic jz4780\nLow power Control Register. Through this register various devices\nin the SoC may be powered down.\n\nThe driver provides regulators for powering up/down the GPS module,\nGPU, VPU and secondary CPU.\n\nSigned-off-by: Matt Redfearn <matt.redfearn@imgtec.com>","distinct":false,"url":"https://api.github.com/repos/HarveyHunt/CI20_linux/commits/6d11bb93c2745055e20c99f260b062748a1ab721"},{"sha":"e2acc2db98525841d07036dcfcf0e3f22976dc2c","author":{"email":"ad5f48d7adcc76c7bd25c44a65841f2a4476216d@imgtec.com","name":"Matt Redfearn"},"message":"mips: jz4780: Add LCR regulator to device tree\n\nAdding the LCR regulator to the SoC tree allows\nother devices to get a handle to the regulators\n\nSigned-off-by: Matt Redfearn <matt.redfearn@imgtec.com>","distinct":false,"url":"https://api.github.com/repos/HarveyHunt/CI20_linux/commits/e2acc2db98525841d07036dcfcf0e3f22976dc2c"},{"sha":"60fa5282b759e07dc1f60034fff13bd2a9d6a5ba","author":{"email":"a75c80ff61fffb177417669aa1c10b164b40a225@imgtec.com","name":"Harvey Hunt"},"message":"usb: otg: jz4780_platform: Switch off OTG PHY overcurrent warnings\n\nPreviously, the kernel log would be spammed with messages about an\novercurrent change being detected on the OTG port. Ingenic worked\naround this in their 3.0.8 kernel by setting a bit in one of the\nOTG controller's registers that would disable the warning. This\ncommit implements the same workaround, but for the 3.18 kernel.","distinct":false,"url":"https://api.github.com/repos/HarveyHunt/CI20_linux/commits/60fa5282b759e07dc1f60034fff13bd2a9d6a5ba"},{"sha":"c9d61e95984c9803696b51f83f196835d462113d","author":{"email":"8ffebdaa68e4f687613bdd10e0c2ee36398f5dd7@users.noreply.github.com","name":"ZubairLK"},"message":"Merge pull request #30 from HarveyHunt/ci20-v3.18-otg-fix\n\nusb: otg: jz4780_platform: Switch off OTG PHY overcurrent warnings","distinct":false,"url":"https://api.github.com/repos/HarveyHunt/CI20_linux/commits/c9d61e95984c9803696b51f83f196835d462113d"},{"sha":"cb435881865adc450a4de25767029879d43d0b63","author":{"email":"8ffebdaa68e4f687613bdd10e0c2ee36398f5dd7@users.noreply.github.com","name":"ZubairLK"},"message":"Merge pull request #33 from mpredfearn/wip-ci20-v3.18-lcr\n\n\r\njz4780 LCR driver added\r\n\r\nThis isn't the 'perfect'/upstreamable way to handle LCR driver because the \r\nregister overlaps with the cgu one. And there are other bits in the register \r\nthat might be used by the cgu driver.\r\n\r\nSomething like sharing via mfd/syscon might be needed while upstreaming.\r\n\r\nShould be ok for simple gpu/vpu/scpu enable/disable in  3.18","distinct":false,"url":"https://api.github.com/repos/HarveyHunt/CI20_linux/commits/cb435881865adc450a4de25767029879d43d0b63"},{"sha":"028674bca5aa4abab66fc5f544c413645a0bc02e","author":{"email":"90b1f1e0d9d1df29083c0b820499620b8628880b@imgtec.com","name":"Alex Smith"},"message":"Revert \"serial/8250: add support for Ingenic jz4780 UARTs\"\n\nThis reverts commit 6b0f5078e3b6de687b3045985d86598d8dd2aecc.","distinct":false,"url":"https://api.github.com/repos/HarveyHunt/CI20_linux/commits/028674bca5aa4abab66fc5f544c413645a0bc02e"},{"sha":"d7b9aca859a56f4d05a63da43a33bd3c2c841728","author":{"email":"90b1f1e0d9d1df29083c0b820499620b8628880b@imgtec.com","name":"Alex Smith"},"message":"Revert \"tty: 8250: jz4780: Add MCR register bits for flow control.\"\n\nThis reverts commit f2c4b226e02602f934d203d28c88f8fb3dbcf453.","distinct":false,"url":"https://api.github.com/repos/HarveyHunt/CI20_linux/commits/d7b9aca859a56f4d05a63da43a33bd3c2c841728"},{"sha":"60aed32650796586e82acb16e1c5f50f1b81b233","author":{"email":"85f1bffadddedccfafc0ae065a06aa636075387f@imgtec.com","name":"Paul Burton"},"message":"devicetree: document Ingenic SoC UART binding\n\nAdd binding documentation for the UARTs found in Ingenic SoCs.\n\nSigned-off-by: Paul Burton <paul.burton@imgtec.com>\nAcked-by: Rob Herring <robh@kernel.org>\nCc: Ian Campbell <ijc+devicetree@hellion.org.uk>\nCc: Kumar Gala <galak@codeaurora.org>\nCc: Lars-Peter Clausen <lars@metafoo.de>\nCc: Mark Rutland <mark.rutland@arm.com>\nCc: Pawel Moll <pawel.moll@arm.com>\nCc: devicetree@vger.kernel.org\nCc: linux-mips@linux-mips.org\nCc: linux-kernel@vger.kernel.org\nPatchwork: https://patchwork.linux-mips.org/patch/10161/\nSigned-off-by: Ralf Baechle <ralf@linux-mips.org>","distinct":false,"url":"https://api.github.com/repos/HarveyHunt/CI20_linux/commits/60aed32650796586e82acb16e1c5f50f1b81b233"},{"sha":"65681f588c9c9dd53816226e204204fffb9a1a4a","author":{"email":"85f1bffadddedccfafc0ae065a06aa636075387f@imgtec.com","name":"Paul Burton"},"message":"serial: 8250_ingenic: support for Ingenic SoC UARTs\n\nIntroduce a driver suitable for use with the UARTs present in\nIngenic SoCs such as the JZ4740 & JZ4780. These are described as being\nns16550 compatible but aren't quite - they require the setting of an\nextra bit in the FCR register to enable the UART module. The serial_out\nimplementation is the same as that in arch/mips/jz4740/serial.c - which\nwill shortly be removed.\n\nSigned-off-by: Paul Burton <paul.burton@imgtec.com>\nCc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>\nCc: Jiri Slaby <jslaby@suse.cz>\nCc: Lars-Peter Clausen <lars@metafoo.de>\nCc: linux-serial@vger.kernel.org\nCc: linux-mips@linux-mips.org\nCc: Sebastian Andrzej Siewior <bigeasy@linutronix.de>\nCc: Peter Hurley <peter@hurleysoftware.com>\nCc: Alan Cox <alan@linux.intel.com>\nCc: linux-kernel@vger.kernel.org\nCc: Matthias Brugger <matthias.bgg@gmail.com>\nCc: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>\nCc: Tony Lindgren <tony@atomide.com>\nCc: John Crispin <blogic@openwrt.org>\nPatchwork: https://patchwork.linux-mips.org/patch/10159/\nSigned-off-by: Ralf Baechle <ralf@linux-mips.org>","distinct":false,"url":"https://api.github.com/repos/HarveyHunt/CI20_linux/commits/65681f588c9c9dd53816226e204204fffb9a1a4a"},{"sha":"e7184b6b8f52d44bb5c50507c9d1aef1ec784795","author":{"email":"90b1f1e0d9d1df29083c0b820499620b8628880b@imgtec.com","name":"Alex Smith"},"message":"serial: 8250_ingenic: Add MCR register bits for flow control\n\nThese bits are not standard 550 uart.\nFor the serial module in the JZ4780, they need to be enabled\nfor flow control to work.\n\nFound using old ingenic history to get BT to work on 3.16\n\nBased on original patch by Zubair, changed to keep changes local to\nthe Ingenic UART driver by hooking in to serial_out and doing the\nright thing when modem status interrupts are enabled/disabled.\n\nSigned-off-by: Alex Smith <alex.smith@imgtec.com>","distinct":false,"url":"https://api.github.com/repos/HarveyHunt/CI20_linux/commits/e7184b6b8f52d44bb5c50507c9d1aef1ec784795"},{"sha":"635f9f8e76a1d62b8c675eeaf853b594092980a7","author":{"email":"85f1bffadddedccfafc0ae065a06aa636075387f@imgtec.com","name":"Paul Burton"},"message":"MIPS: JZ4740: use Ingenic SoC UART driver\n\nRemove the serial support from arch/mips/jz4740 & make use of the new\nIngenic SoC UART driver. This is done for both regular & early console\noutput.\n\nSigned-off-by: Paul Burton <paul.burton@imgtec.com>\nCc: Ian Campbell <ijc+devicetree@hellion.org.uk>\nCc: Kumar Gala <galak@codeaurora.org>\nCc: Lars-Peter Clausen <lars@metafoo.de>\nCc: Mark Rutland <mark.rutland@arm.com>\nCc: Pawel Moll <pawel.moll@arm.com>\nCc: Rob Herring <robh+dt@kernel.org>\nCc: devicetree@vger.kernel.org\nCc: linux-mips@linux-mips.org\nCc: Linus Walleij <linus.walleij@linaro.org>\nCc: Stephen Warren <swarren@wwwdotorg.org>\nCc: linux-kernel@vger.kernel.org\nCc: Brian Norris <computersforpeace@gmail.com>\nCc: Apelete Seketeli <apelete@seketeli.net>\nCc: Alexandre Courbot <gnurou@gmail.com>\nPatchwork: https://patchwork.linux-mips.org/patch/10160/\nSigned-off-by: Ralf Baechle <ralf@linux-mips.org>","distinct":false,"url":"https://api.github.com/repos/HarveyHunt/CI20_linux/commits/635f9f8e76a1d62b8c675eeaf853b594092980a7"},{"sha":"2923395125192a54f00748f54b79c5c458700b09","author":{"email":"90b1f1e0d9d1df29083c0b820499620b8628880b@imgtec.com","name":"Alex Smith"},"message":"MIPS: JZ4780: Update DT for new UART driver\n\nSigned-off-by: Alex Smith <alex.smith@imgtec.com>","distinct":false,"url":"https://api.github.com/repos/HarveyHunt/CI20_linux/commits/2923395125192a54f00748f54b79c5c458700b09"},{"sha":"afde1a0418387dcf2031eae731a43391b96c53ce","author":{"email":"90b1f1e0d9d1df29083c0b820499620b8628880b@imgtec.com","name":"Alex Smith"},"message":"MIPS: CI20: Define stdout-path property\n\nDefine the default console to UART4 via the stdout-path property in the\ndevice tree.\n\nSigned-off-by: Alex Smith <alex.smith@imgtec.com>","distinct":false,"url":"https://api.github.com/repos/HarveyHunt/CI20_linux/commits/afde1a0418387dcf2031eae731a43391b96c53ce"},{"sha":"42388076d95b498ab52baed96e847a12e2233d91","author":{"email":"90b1f1e0d9d1df29083c0b820499620b8628880b@imgtec.com","name":"Alex Smith"},"message":"MIPS: CI20: Update defconfig\n\nUpdate defconfig for the new UART driver. All console output should now\nbe on UART4.\n\nSigned-off-by: Alex Smith <alex.smith@imgtec.com>","distinct":false,"url":"https://api.github.com/repos/HarveyHunt/CI20_linux/commits/42388076d95b498ab52baed96e847a12e2233d91"},{"sha":"7ac6b4ae20dbe0e0875a9949f419788004593968","author":{"email":"8ffebdaa68e4f687613bdd10e0c2ee36398f5dd7@users.noreply.github.com","name":"ZubairLK"},"message":"Merge pull request #36 from aejsmith/ci20-v3.18-serial\n\n\r\nSwitch to new UART driver from upstream\r\n\r\nThis switches to the new UART driver that is now heading upstream\r\n(in Ralf's upstream-sfr tree).\r\n\r\nThe reason this is done is because there still remain a few things that output to\r\nUART0 rather than UART4 (the dedicated UART header), like the early console. \r\n\r\nThe current code has UART0 harcoded for this.\r\n\r\nThe upstream driver allows the early console UART to be configured by DT,\r\nso take advantage of this by switching to that driver and setting stdout-path\r\nto UART4 in DT.\r\n\r\nAll serial output from the kernel should now go to UART4 by default.","distinct":false,"url":"https://api.github.com/repos/HarveyHunt/CI20_linux/commits/7ac6b4ae20dbe0e0875a9949f419788004593968"},{"sha":"d1955e1f2a9f0b9ca8c86c58acb3549e625c1266","author":{"email":"a75c80ff61fffb177417669aa1c10b164b40a225@imgtec.com","name":"Harvey Hunt"},"message":"net: ethernet: dm9000: Accept a MAC address as a bootarg for CI20.\n\nThe MAC address for the CI20's DM9000 is stored in EEPROM on a different\npart of the board. Previously, the DM9000 would make up a random MAC\nafter failing to read its own EEPROM. This commit makes it possible for\nU-BOOT to pass the MAC address to the DM9000 driver. Such as:\n\nbootargs=\"dm9000.mac_addr=${ethaddr}\"\n\nNote: This isn't the \"correct\" way to do this, but will do for now. The correct\nmethod would be to recompile U-BOOT with CONFIG_OF_LIBFDT and CONFIG_FIT\nenabled. Then the kernel should be compiled as a FIT image and U-BOOT can then\nadd an entry to the DM9000's DT node to set the MAC address (local-mac-address\n= [xx xx xx xx xx xx];).\n\nSigned-off-by: Harvey Hunt <harvey.hunt@imgtec.com>","distinct":false,"url":"https://api.github.com/repos/HarveyHunt/CI20_linux/commits/d1955e1f2a9f0b9ca8c86c58acb3549e625c1266"},{"sha":"e60b99d8f35a51597619e2c4efd655fe83c9c8ff","author":{"email":"90b1f1e0d9d1df29083c0b820499620b8628880b@imgtec.com","name":"Alex Smith"},"message":"dmaengine: jz4780: Fix jz4780_dma_prep_dma_cyclic prototype\n\nThe DMA engine prep_dma_cyclic function no longer takes a context\nargument, remove it. This fixes a build warning.\n\nSigned-off-by: Alex Smith <alex.smith@imgtec.com>","distinct":false,"url":"https://api.github.com/repos/HarveyHunt/CI20_linux/commits/e60b99d8f35a51597619e2c4efd655fe83c9c8ff"}]}