{"push_id":830936594,"size":35,"distinct_size":35,"ref":"refs/heads/EZ-arc-upstream-reviewd-DO-NOT-COMMENT","head":"b1f91bba9b35f9820993c63a481021f5c5c4ced9","before":"0988ac1e77a04a258567a728d259b2165c6444dc","commits":[{"sha":"7a8078e822f71f9022f47f76104b11acdd1b1232","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"clocksource: Add NPS400 timers driver\n\nAdd internal tick generator which is shared by all cores.\nEach cluster of cores view it through dedicated address.\nThis is used for SMP system where all CPUs synced upon same\nclock source.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>\nCc: Daniel Lezcano <daniel.lezcano@linaro.org>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/7a8078e822f71f9022f47f76104b11acdd1b1232"},{"sha":"2acdaae16fef0a238dec7afafe7945d43d7af5f5","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: Adjust cpuinfo for non-continuous cpu ids\n\nAvoid using num_possible_cpus() since its amount\nand not highest index of a possible cpu.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/2acdaae16fef0a238dec7afafe7945d43d7af5f5"},{"sha":"de5430d0c8b3cbacd341e2c07cbb79ddd0d84f5e","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: Set vmalloc size from configuration\n\nUser space use lower 2G of the virtual address space.\nHowever kernel steals upper 512M of this space.\nThis stolen space is used partially for vmalloc and the rest\nserves as gutter between kernel and user space.\nThe vmalloc size is depend on NR_CPUS since \"per cpu\" mechanism\nuse vmalloc to allocate chunks for its use.\n\nHistorically vmalloc size was 256M however it is not enough in\ncase of many CPUs e.g. 4K CPUs. For such case an extra 192M is\nallocated.\nWe are setting default vmalloc size to be 256M, any addtional\nspace will be taken from kernel/user gutter.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>\nAcked-by: Vineet Gupta vgupta@synopsys.com","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/de5430d0c8b3cbacd341e2c07cbb79ddd0d84f5e"},{"sha":"9b65ba0718988cf153c288d3d5fcd28a5581686a","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: disable interrupts before read/write spinlock\n\nIf we hold rw->lock_mutex and interrupt occures we may\nend up spinning on it for ever during softirq.\n\nBelow you may see an example for interrupt we get while\nnl_table_lock is holding its rw->lock_mutex and we spinned\non it for good.\n\nThe concept for the fix was taken from SPARC.\n\n[2015-05-12 19:16:12] Stack Trace:\n[2015-05-12 19:16:12]   arc_unwind_core+0xb8/0x11c\n[2015-05-12 19:16:12]   dump_stack+0x68/0xac\n[2015-05-12 19:16:12]   _raw_read_lock+0xa8/0xac\n[2015-05-12 19:16:12]   netlink_broadcast_filtered+0x56/0x35c\n[2015-05-12 19:16:12]   nlmsg_notify+0x42/0xa4\n[2015-05-12 19:16:13]   neigh_update+0x1fe/0x44c\n[2015-05-12 19:16:13]   neigh_event_ns+0x40/0xa4\n[2015-05-12 19:16:13]   arp_process+0x46e/0x5a8\n[2015-05-12 19:16:13]   __netif_receive_skb_core+0x358/0x500\n[2015-05-12 19:16:13]   process_backlog+0x92/0x154\n[2015-05-12 19:16:13]   net_rx_action+0xb8/0x188\n[2015-05-12 19:16:13]   __do_softirq+0xda/0x1d8\n[2015-05-12 19:16:14]   irq_exit+0x8a/0x8c\n[2015-05-12 19:16:14]   arch_do_IRQ+0x6c/0xa8\n[2015-05-12 19:16:14]   handle_interrupt_level1+0xe4/0xf0\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>\nCc: Peter Zijlstra <peterz@infradead.org>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/9b65ba0718988cf153c288d3d5fcd28a5581686a"},{"sha":"c17e3dd895b5c009c72e1918cdf42434e42bc3c1","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: [SMP] turn smp_init_cpus() smp_prepare_cpus() to be weak symbol\n\nPlatform can set its own set of possible/present cpus at run time.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/c17e3dd895b5c009c72e1918cdf42434e42bc3c1"},{"sha":"c8c0a9b5e01acf23c2914101297a02f76034841d","author":{"email":"68bcf2e31c6d30ede2ee225536656df5156ec4c4@ezchip.com","name":"Gil Fruchter"},"message":"ARC: [actionpoints] Add kernel actionpoints support\n\nAdd support for CONFIG_HAVE_HW_BREAKPOINT.\nSupport both watchpoints and breakpoints.\nSupport big and little endians.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/c8c0a9b5e01acf23c2914101297a02f76034841d"},{"sha":"efd4baddd7fa94c1a38a1d3a4715c5d644006f0b","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: Support arch_irq_work_raise() via self IPIs\n\nThis will allow the scheduler tick to be restarted.\nIt is used if CONFIG_NO_HZ_FULL.\n\nSigned-off-by: Gil Fruchter <gilf@ezchip.com>\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/efd4baddd7fa94c1a38a1d3a4715c5d644006f0b"},{"sha":"54b03c80e6203ff03c06f2cc2a380786bd248b3b","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: Check TIF_SYSCALL_TRACE before calling tracehook report routine\n\nWe need to see the reason we got to syscall trace.\nOnly if TIF_SYSCALL_TRACE is set we will call\ntracehook_report_syscall_entry() / tracehook_report_syscall_exit().\n\nLater we will add TIF_NOHZ as reason to call syscall trace\nbut not to call tracehook report methods.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>\nSigned-off-by: Gil Fruchter <gilf@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/54b03c80e6203ff03c06f2cc2a380786bd248b3b"},{"sha":"00265dacdffb18c49793211a0c5386b59a548b36","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: Schedule hooks for context tracking subsystem\n\nInform context tracking subsystem that we exiting usermode.\nIf !CONFIG_CONTEXT_TRACKING just call schedule\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>\nSigned-off-by: Gil Fruchter <gilf@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/00265dacdffb18c49793211a0c5386b59a548b36"},{"sha":"3ece6ca31b5aa0f1a3f230b9e4d73a5c6f8ece80","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: TIF_NOHZ for context tracking subsystem\n\nThis is the syscall slow path hooks for context tracking subsystem.\nThis bit (in addition to TIF_SYSCALL_TRACE) is used to jump to\ntracesys/tracesys_exit.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>\nSigned-off-by: Gil Fruchter <gilf@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/3ece6ca31b5aa0f1a3f230b9e4d73a5c6f8ece80"},{"sha":"c49297ae3bc6aa293d37ab4923fc96790cea0f56","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: Exception hooks for context tracking subsystem\n\nWe basically inform the context tracking that the CPU is going to\nenter/exit userspace mode.\nThis information will be used by scheduler to decide if tick can be\nswitched off in dynamic tick mode.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>\nSigned-off-by: Gil Fruchter <gilf@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/c49297ae3bc6aa293d37ab4923fc96790cea0f56"},{"sha":"83a1212dfdca504a62f157d3dbfdba6a1e2770fa","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: add cmpxchg64 for CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN\n\nThis is to ovecome build failure due to commit:\nsched, time: Fix build error with 64 bit cputime_t on 32 bit systems\n347abad981c1ef815ea5ba861adba6a8c6aa1580\n\nThis commit introduce the use of cmpxchg_cputime().\nWhich in our case defined in asm-generic/cputime_nsecs.h to be:\n\nHowever ARC as 32 bit system lake to have cmpxchg64.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/83a1212dfdca504a62f157d3dbfdba6a1e2770fa"},{"sha":"aaa688793566725d65236596d9b9a2789ca8f159","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: Mark cpu online only after it has executed the per cpu init hook.\n\nIn SMP setup, master loops for each_present_cpu calling cpu_up() which\nfor ARC returns as soon as new cpu's status becomes online,\nbut it could still be initializing (see start_kernel_secondary())\nThus master can start cpu up for 2nd core,\nwhile prev is still not fully up.\nThis can be issue for SMT system,\nwhere first h/w thread of a core needs to be fully up before\nmoving on to next threads.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>\nAcked-by: Vineet Gupta <vgupta@synopsys.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/aaa688793566725d65236596d9b9a2789ca8f159"},{"sha":"d59685d55e622d73c4c868d5810c65646784c782","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: Allow irq threading\n\nAll interrupts which must be non threaded\nshould be marked IRQF_NO_THREAD\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/d59685d55e622d73c4c868d5810c65646784c782"},{"sha":"a961954830b69b47cbff1fe80b27518a19b918a9","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: [plat-eznps] Add eznps board defconfig and dts\n\nAdding default configuration file and DTS file\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/a961954830b69b47cbff1fe80b27518a19b918a9"},{"sha":"620a9cc286bf9450341818e2e79f3f488f89bb87","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: [plat-eznps] Add eznps platform\n\nThis platform include boards:\n\tHardware Emulator (HE)\n\tSimulator based upon nSIM.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/620a9cc286bf9450341818e2e79f3f488f89bb87"},{"sha":"67e7c60202584fab20dd5ce26ee20028c761a6e9","author":{"email":"9eb5903f3e94f804514a44d30418315f7a8c2f7d@ezchip.com","name":"Tal Zilcer"},"message":"ARC: arch_spinlock use cpu_relax() for optimization\n\nIn SMT machine with multiple HW threads if one HW thread is\ncontending on spinlock we wish to switch to another thread\nthat may hold this spinlock.\n\nThis may achieved by using cpu_relax() that should be defined\nproperly for such platform with SMT.\n\nRunning hackbench on NPS400 we got more than 10% improvement in time.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/67e7c60202584fab20dd5ce26ee20028c761a6e9"},{"sha":"f3b8f1b3844d5c910fddeed50ebbbada2ce7d397","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: add CONFIG_CLKSRC_OF support to time_init()\n\nclock source with higher rate can be used if included at one of\nDTS file of chosen platform.\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/f3b8f1b3844d5c910fddeed50ebbbada2ce7d397"},{"sha":"6268777d1032847cbb2d8c6104f778d33d943ad1","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: [plat-eznps] Use dedicated user stack top\n\nNPS use special mapping right below TASK_SIZE.\nHence we need to lower STACK_TOP so that user stack won't\noverlap NPS special mapping.\n\nSigned-off-by: Noam Camus <noamc@ezchip.com>\nAcked-by: Vineet Gupta vgupta@synopsys.com","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/6268777d1032847cbb2d8c6104f778d33d943ad1"},{"sha":"f47b30cc4040f4eb6f0cb6a5f47fd6621692aad2","author":{"email":"5aa4b9705348d1692ae3b503c5c840c9fdcd7054@ezchip.com","name":"Noam Camus"},"message":"ARC: [plat-eznps] Use dedicated bitops/atomic/cmpxchg\n\nWe need our own implementaions since we lack of LLSC.\nOur extended ISA provided with optimized solution for all 32bit\noperations we see in those three headers.\nSigned-off-by: Noam Camus <noamc@ezchip.com>","distinct":true,"url":"https://api.github.com/repos/EZchip/linux/commits/f47b30cc4040f4eb6f0cb6a5f47fd6621692aad2"}]}