{"push_id":914224412,"size":2,"distinct_size":2,"ref":"refs/heads/master","head":"7f1fba1154060b21f6c2b13be3a730d04951ff16","before":"760c079f38ca83ef18d4cef550918dc730e818a6","commits":[{"sha":"a56b695591d54aeb8a2bfff084697f6e9493855c","author":{"email":"3bae1b7d571c203acfb4d62748e2c04607e018fd@FreeBSD.org","name":"jhibbits"},"message":"Extend Book-E to support >4GB RAM\n\nSummary:\nWith some additional changes for AIM, that could also support much\nlarger physmem sizes.  Given that 32-bit AIM is more or less obsolete, though,\nit's not worth it at this time.\n\nDifferential Revision: https://reviews.freebsd.org/D4345","distinct":true,"url":"https://api.github.com/repos/freebsd/freebsd/commits/a56b695591d54aeb8a2bfff084697f6e9493855c"},{"sha":"7f1fba1154060b21f6c2b13be3a730d04951ff16","author":{"email":"a1b909ec1cc11cce40c28d3640eab600e582f833@FreeBSD.org","name":"adrian"},"message":"Add missing \\n.\n\nOtherwise you end up with:\n\nCache info:\n  picache_stride    = 4096\n  picache_loopcount = 16\n  pdcache_stride    = 4096\n  pdcache_loopcount = 8\ncpu0: MIPS Technologies processor v80.150\n  MMU: Standard TLB, 32 entries (4K 16K 64K 256K 1M 16M 64M 256M pg sizes)\n  L1 i-cache: 4 ways of 512 sets, 32 bytes per line\n  L1 d-cache: 4 ways of 256 sets, 32 bytes per line\n  L2 cache: disabled  Config1=0xbee3519e<PerfCount,WatchRegs,MIPS16,EJTAG>\n  Config2=0x80000000\n  Config3=0x2420\n\nTested:\n\n* MT7620 SoC","distinct":true,"url":"https://api.github.com/repos/freebsd/freebsd/commits/7f1fba1154060b21f6c2b13be3a730d04951ff16"}]}