{"push_id":639789249,"size":1,"distinct_size":1,"ref":"refs/heads/master","head":"4c6c1a23063ed7143361cde0f0af01371d93320e","before":"331ab413904e6dbaa67423a60228b313bc725daf","commits":[{"sha":"4c6c1a23063ed7143361cde0f0af01371d93320e","author":{"email":"4d5b87db536b0fdcf99bbc489362ee83ff8bf6c6@braunis.de","name":"Matthias Braun"},"message":"X86: Match for X86ISD nodes in LowerBUILD_VECTOR instead of BUILD_VECTORCombine\n\nThere doesn't seem to be a reason to perform this target ISD node matching\nin an DAGCombine, moving it to lowering fixes PR23296.\n\nDifferential Revision: http://reviews.llvm.org/D9137","distinct":true,"url":"https://api.github.com/repos/llvm-project/llvm-project-submodule/commits/4c6c1a23063ed7143361cde0f0af01371d93320e"}]}