{"push_id":587474890,"size":91,"distinct_size":26,"ref":"refs/heads/master","head":"16caded3d5c2be18c9f4ee0f1d957d23d2b6bbcc","before":"f4f25ff73b5694208a922387b5a53867400fa2c5","commits":[{"sha":"208a776333ce6e6a0050095e54bfa9bc79683577","author":{"email":"c1ef41834a9fde814d74180f707866d24e883999@8f6e269a-dfd6-0310-a8e1-e2731360e62c","name":"sewardj"},"message":"Implement SIMD (de)interleaving loads/stores:\n  LD1/ST1 (multiple 1-elem structs to/from 1 reg\n  LD2/ST2 (multiple 2-elem structs to/from 2 regs\n  LD3/ST3 (multiple 3-elem structs to/from 3 regs\n  LD4/ST4 (multiple 4-elem structs to/from 4 regs\nAlso:\n  LDNP, STNP  (load/store vector pair, non-temporal)\n\n\n\ngit-svn-id: svn://svn.valgrind.org/vex/trunk@2976 8f6e269a-dfd6-0310-a8e1-e2731360e62c","distinct":false,"url":"https://api.github.com/repos/liquid-mirror/VEX/commits/208a776333ce6e6a0050095e54bfa9bc79683577"},{"sha":"74e5e6b4eef555792f10f3784d99f360461f4f66","author":{"email":"73262ad0334ab37227b2f7a0205f51db1e606681@8f6e269a-dfd6-0310-a8e1-e2731360e62c","name":"florian"},"message":"Memove unused macro. Should have been part of r2955.\n\n\ngit-svn-id: svn://svn.valgrind.org/vex/trunk@2977 8f6e269a-dfd6-0310-a8e1-e2731360e62c","distinct":false,"url":"https://api.github.com/repos/liquid-mirror/VEX/commits/74e5e6b4eef555792f10f3784d99f360461f4f66"},{"sha":"75d774c08397be8076934c514e12fa36811eb880","author":{"email":"73262ad0334ab37227b2f7a0205f51db1e606681@8f6e269a-dfd6-0310-a8e1-e2731360e62c","name":"florian"},"message":"Companion patch of valgrind r14664.\n\n\ngit-svn-id: svn://svn.valgrind.org/vex/trunk@2978 8f6e269a-dfd6-0310-a8e1-e2731360e62c","distinct":false,"url":"https://api.github.com/repos/liquid-mirror/VEX/commits/75d774c08397be8076934c514e12fa36811eb880"},{"sha":"bed9f68f6bea9f28a0afcd2f02db281fdb9611ae","author":{"email":"c1ef41834a9fde814d74180f707866d24e883999@8f6e269a-dfd6-0310-a8e1-e2731360e62c","name":"sewardj"},"message":"* add a missing extra m-reg check for some LD/ST vector cases \n \n* implement \n  LD1/ST1 (multiple 1-elem structs to/from 2 regs \n  LD1/ST1 (multiple 1-elem structs to/from 3 regs \n  LD1/ST1 (multiple 1-elem structs to/from 4 regs  \n  LD1R (single structure, replicate)  \n  LD2R (single structure, replicate) \n  LD3R (single structure, replicate) \n  LD4R (single structure, replicate) \n  LD1/ST1 (single structure, to/from one lane) \n  LD2/ST2 (single structure, to/from one lane) \n  LD3/ST3 (single structure, to/from one lane) \n  LD4/ST4 (single structure, to/from one lane) \n\nI believe this completes the implementation of load and store\ninstructions for AArch64 ARMv8.\n\n\n\ngit-svn-id: svn://svn.valgrind.org/vex/trunk@2979 8f6e269a-dfd6-0310-a8e1-e2731360e62c","distinct":false,"url":"https://api.github.com/repos/liquid-mirror/VEX/commits/bed9f68f6bea9f28a0afcd2f02db281fdb9611ae"},{"sha":"23872f6f79214bcb0a826cb756d131fd8d9e9f3e","author":{"email":"73262ad0334ab37227b2f7a0205f51db1e606681@8f6e269a-dfd6-0310-a8e1-e2731360e62c","name":"florian"},"message":"Tweak to allow the use of this Makefile with the ICC compiler.\nPatch by Gregory Czajkowski <gregczajkowski@yahoo.com>.\nRelated to BZ #339542.\n\n\ngit-svn-id: svn://svn.valgrind.org/vex/trunk@2980 8f6e269a-dfd6-0310-a8e1-e2731360e62c","distinct":false,"url":"https://api.github.com/repos/liquid-mirror/VEX/commits/23872f6f79214bcb0a826cb756d131fd8d9e9f3e"},{"sha":"d8ad76a4b34e9bf53c72847628a1eedc068e2295","author":{"email":"c1ef41834a9fde814d74180f707866d24e883999@8f6e269a-dfd6-0310-a8e1-e2731360e62c","name":"sewardj"},"message":"Implement frintx d_d and s_s.  Fixes #339926.\n\n\ngit-svn-id: svn://svn.valgrind.org/vex/trunk@2981 8f6e269a-dfd6-0310-a8e1-e2731360e62c","distinct":false,"url":"https://api.github.com/repos/liquid-mirror/VEX/commits/d8ad76a4b34e9bf53c72847628a1eedc068e2295"},{"sha":"31b29af89c9f90025da79bbf03b0143ffa235469","author":{"email":"c1ef41834a9fde814d74180f707866d24e883999@8f6e269a-dfd6-0310-a8e1-e2731360e62c","name":"sewardj"},"message":"Implement fcvtmu x_d.  Fixes #339927.\n\n\ngit-svn-id: svn://svn.valgrind.org/vex/trunk@2982 8f6e269a-dfd6-0310-a8e1-e2731360e62c","distinct":false,"url":"https://api.github.com/repos/liquid-mirror/VEX/commits/31b29af89c9f90025da79bbf03b0143ffa235469"},{"sha":"d0e5e5336a129992ffe5323cbf47d99adad0f0bd","author":{"email":"c1ef41834a9fde814d74180f707866d24e883999@8f6e269a-dfd6-0310-a8e1-e2731360e62c","name":"sewardj"},"message":"Implement\nFMLA 2d_2d_d[], 4s_4s_s[], 2s_2s_s[]\nFMLS 2d_2d_d[], 4s_4s_s[], 2s_2s_s[]\nFixes #339938 and its dup, #339950.\n\n\ngit-svn-id: svn://svn.valgrind.org/vex/trunk@2983 8f6e269a-dfd6-0310-a8e1-e2731360e62c","distinct":false,"url":"https://api.github.com/repos/liquid-mirror/VEX/commits/d0e5e5336a129992ffe5323cbf47d99adad0f0bd"},{"sha":"f67fcb95dffa97198605ae99758999da8e39920d","author":{"email":"c1ef41834a9fde814d74180f707866d24e883999@8f6e269a-dfd6-0310-a8e1-e2731360e62c","name":"sewardj"},"message":"Implement FCVTAS W_S and FCVTAU W_S.  Fixes #340509.\n\n\ngit-svn-id: svn://svn.valgrind.org/vex/trunk@2984 8f6e269a-dfd6-0310-a8e1-e2731360e62c","distinct":false,"url":"https://api.github.com/repos/liquid-mirror/VEX/commits/f67fcb95dffa97198605ae99758999da8e39920d"},{"sha":"5b924c858af55ce454d7482e5e50075dce90f0bb","author":{"email":"c1ef41834a9fde814d74180f707866d24e883999@8f6e269a-dfd6-0310-a8e1-e2731360e62c","name":"sewardj"},"message":"Implement PRFM (immediate).  Fixes #335713.\n\n\ngit-svn-id: svn://svn.valgrind.org/vex/trunk@2985 8f6e269a-dfd6-0310-a8e1-e2731360e62c","distinct":false,"url":"https://api.github.com/repos/liquid-mirror/VEX/commits/5b924c858af55ce454d7482e5e50075dce90f0bb"},{"sha":"258425575c34a853bbf55d89059119d369db44c6","author":{"email":"c1ef41834a9fde814d74180f707866d24e883999@8f6e269a-dfd6-0310-a8e1-e2731360e62c","name":"sewardj"},"message":"Handle all DSB/DMB/ISB variants.  Fixes #340033.\n\n\ngit-svn-id: svn://svn.valgrind.org/vex/trunk@2986 8f6e269a-dfd6-0310-a8e1-e2731360e62c","distinct":false,"url":"https://api.github.com/repos/liquid-mirror/VEX/commits/258425575c34a853bbf55d89059119d369db44c6"},{"sha":"c87194067ad22a3e61455627b9cc2f8a7d95ff07","author":{"email":"442bd8eb7b6ea1a04e35059cba7a2e80eb32ed1d@8f6e269a-dfd6-0310-a8e1-e2731360e62c","name":"mjw"},"message":"Bug 340632 arm64: unhandled instruction fcvtas\n\ngit-svn-id: svn://svn.valgrind.org/vex/trunk@2987 8f6e269a-dfd6-0310-a8e1-e2731360e62c","distinct":false,"url":"https://api.github.com/repos/liquid-mirror/VEX/commits/c87194067ad22a3e61455627b9cc2f8a7d95ff07"},{"sha":"07ab40d37e397d0ce4e65b2138db1766c49d8700","author":{"email":"c1ef41834a9fde814d74180f707866d24e883999@8f6e269a-dfd6-0310-a8e1-e2731360e62c","name":"sewardj"},"message":"Fix incorrect decoding of AVX2 insns:\n  VPBROADCASTB xmm, xmm\n  VPBROADCASTB xmm, ymm\n  VPBROADCASTW xmm, xmm\n  VPBROADCASTW xmm, ymm \nFixes #340725.\n\n\n\ngit-svn-id: svn://svn.valgrind.org/vex/trunk@2988 8f6e269a-dfd6-0310-a8e1-e2731360e62c","distinct":false,"url":"https://api.github.com/repos/liquid-mirror/VEX/commits/07ab40d37e397d0ce4e65b2138db1766c49d8700"},{"sha":"e3a10d7df3606969593206c5daf58099d18e7719","author":{"email":"c1ef41834a9fde814d74180f707866d24e883999@8f6e269a-dfd6-0310-a8e1-e2731360e62c","name":"sewardj"},"message":"Add a nasty temporary kludge to CPUID that allows 64-bit MacOSX 10.10\n(Yosemite) to run, until such time as XSAVE and XRSTOR are implemented.\nDetailed in the comments.  All other targets should be unaffected.\n\n\ngit-svn-id: svn://svn.valgrind.org/vex/trunk@2989 8f6e269a-dfd6-0310-a8e1-e2731360e62c","distinct":false,"url":"https://api.github.com/repos/liquid-mirror/VEX/commits/e3a10d7df3606969593206c5daf58099d18e7719"},{"sha":"d2c19b4f340bd22b93538a25ca20e43a0d04dc09","author":{"email":"442bd8eb7b6ea1a04e35059cba7a2e80eb32ed1d@8f6e269a-dfd6-0310-a8e1-e2731360e62c","name":"mjw"},"message":"Add detection of old ppc32 magic instructions from bug 278808.\n\ngit-svn-id: svn://svn.valgrind.org/vex/trunk@2990 8f6e269a-dfd6-0310-a8e1-e2731360e62c","distinct":false,"url":"https://api.github.com/repos/liquid-mirror/VEX/commits/d2c19b4f340bd22b93538a25ca20e43a0d04dc09"},{"sha":"e23ec110f99e322a05c3505e1e89c8a22e0af283","author":{"email":"c1ef41834a9fde814d74180f707866d24e883999@8f6e269a-dfd6-0310-a8e1-e2731360e62c","name":"sewardj"},"message":"Implement fcsel d_d, s_s.  Fixes #340856.\n\n\ngit-svn-id: svn://svn.valgrind.org/vex/trunk@2991 8f6e269a-dfd6-0310-a8e1-e2731360e62c","distinct":false,"url":"https://api.github.com/repos/liquid-mirror/VEX/commits/e23ec110f99e322a05c3505e1e89c8a22e0af283"},{"sha":"0728a52806023ce4c8f74645995a7f3b0d0ba7b2","author":{"email":"c1ef41834a9fde814d74180f707866d24e883999@8f6e269a-dfd6-0310-a8e1-e2731360e62c","name":"sewardj"},"message":"Implement \"fcvtpu w, s\".  n-i-bz.\n\n\ngit-svn-id: svn://svn.valgrind.org/vex/trunk@2992 8f6e269a-dfd6-0310-a8e1-e2731360e62c","distinct":false,"url":"https://api.github.com/repos/liquid-mirror/VEX/commits/0728a52806023ce4c8f74645995a7f3b0d0ba7b2"},{"sha":"76927e6e81a18405ac41f667d1d598fe597a8465","author":{"email":"c1ef41834a9fde814d74180f707866d24e883999@8f6e269a-dfd6-0310-a8e1-e2731360e62c","name":"sewardj"},"message":"Implement arm64 insns:\nADDP s_2s, d_2d \nFADDP 2d_2d_2d, 4s_4s_4s, 2s_2s_2s \nFMAX d_d, s_s \nFMIN d_d, s_s \nFMAXNM d_d, s_s (not really correct) \nFMINNM d_d, s_s (not really correct) \nFCVT{A,N}S W,D \n\n\n\ngit-svn-id: svn://svn.valgrind.org/vex/trunk@2993 8f6e269a-dfd6-0310-a8e1-e2731360e62c","distinct":false,"url":"https://api.github.com/repos/liquid-mirror/VEX/commits/76927e6e81a18405ac41f667d1d598fe597a8465"},{"sha":"b963eef76b2c754c4717b120cdf1912ba4b926d0","author":{"email":"c1ef41834a9fde814d74180f707866d24e883999@8f6e269a-dfd6-0310-a8e1-e2731360e62c","name":"sewardj"},"message":"Fix stupid bug introduced in r2993, which causes many simple scalar\nfloating point instructions to ignore their operands and return zero.  Sigh.\n\n\ngit-svn-id: svn://svn.valgrind.org/vex/trunk@2994 8f6e269a-dfd6-0310-a8e1-e2731360e62c","distinct":false,"url":"https://api.github.com/repos/liquid-mirror/VEX/commits/b963eef76b2c754c4717b120cdf1912ba4b926d0"},{"sha":"d6d13b300fc637fd99909fa77ca0241c646dd0a8","author":{"email":"c1ef41834a9fde814d74180f707866d24e883999@8f6e269a-dfd6-0310-a8e1-e2731360e62c","name":"sewardj"},"message":"Implement VFPv4 VFNMA, VFNMS d_d and s_s variants (not that\nthere are any other variants).  Fixes #340807.\n\n\ngit-svn-id: svn://svn.valgrind.org/vex/trunk@2995 8f6e269a-dfd6-0310-a8e1-e2731360e62c","distinct":false,"url":"https://api.github.com/repos/liquid-mirror/VEX/commits/d6d13b300fc637fd99909fa77ca0241c646dd0a8"}]}