{"action":"created","issue":{"url":"https://api.github.com/repos/radare/radare2/issues/1868","labels_url":"https://api.github.com/repos/radare/radare2/issues/1868/labels{/name}","comments_url":"https://api.github.com/repos/radare/radare2/issues/1868/comments","events_url":"https://api.github.com/repos/radare/radare2/issues/1868/events","html_url":"https://github.com/radare/radare2/issues/1868","id":52478090,"number":1868,"title":"[TRACKER] radare2 is not as cool as IDApro (Architecture)","user":{"login":"Maijin","id":1408600,"avatar_url":"https://avatars.githubusercontent.com/u/1408600?v=3","gravatar_id":"","url":"https://api.github.com/users/Maijin","html_url":"https://github.com/Maijin","followers_url":"https://api.github.com/users/Maijin/followers","following_url":"https://api.github.com/users/Maijin/following{/other_user}","gists_url":"https://api.github.com/users/Maijin/gists{/gist_id}","starred_url":"https://api.github.com/users/Maijin/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/Maijin/subscriptions","organizations_url":"https://api.github.com/users/Maijin/orgs","repos_url":"https://api.github.com/users/Maijin/repos","events_url":"https://api.github.com/users/Maijin/events{/privacy}","received_events_url":"https://api.github.com/users/Maijin/received_events","type":"User","site_admin":false},"labels":[{"url":"https://api.github.com/repos/radare/radare2/labels/parity","name":"parity","color":"e11d21"}],"state":"open","locked":false,"assignee":null,"milestone":null,"comments":1,"created_at":"2014-12-19T12:28:11Z","updated_at":"2015-03-23T09:51:56Z","closed_at":null,"body":"# Architecture \r\n**(Need to be completed)**\r\n- [x]  AMD K6-2 3D-Now! extensions\r\n- [ ]  ARM Architecture versions from v3 to v8 including Thumb, Thumb-2, DSP instructions and NEON Advanced SIMD instructions.\r\n- [ ]  ARMv4/ARMv4T: ARM7 cores (ARM7TDMI/ARM710T/ARM720T/ARM740T), ARM9 cores (ARM9TDMI/ARM920T/ARM922T/ARM940T)\r\n- [ ]  ARMv5/ARMv5TE/ARMv5TEJ: ARM9 cores (ARM946E-S/ARM966E-S/ARM968E-S/ARM926EJ-S/ARM996HS), ARM10E (ARM1020E/ARM1022E/ARM1026EJ-S)\r\n- [ ]  ARMv6/ARMv6T2/ARMv6Z/ARMv6K: ARM11 cores (ARM1136J(F)-S/ARM1156T2(F)-S/ARM1176JZ(F)-S/ARM11 MPCore)\r\n- [ ]  ARMv6-M: Cortex-M0/Cortex-M0+/Cortex-M1 (e.g. NXP LPC800/LPC1xxx, Freescale Kinetis L and M series, STM32 F0 series etc.)\r\n- [ ]  ARMv7-M: Cortex-M3 (e.g. NXP LPC17xx/18xx/13xx, STM32 F1/F2/L1 series, TI Stellaris, Toshiba TX03/TMPM3xx etc.)\r\n- [ ]  ARMv7E-M: Cortex-M4 (e.g. NXP LPC43xx, STM32 F3/F4series, TI Stellaris LM4F, Freescale Kinetis K series and W series,Atmel AT91SAM4 etc.)\r\n- [ ]  ARMv7-R: Cortex-R4(F)/Cortex-R5/Cortex-R7 (e.g. TI TMS570LS etc.)\r\n- [x] Cortex-A5\r\n- [ ]  Cortex-A7\r\n- [x]  Cortex-A8\r\n- [x]  Cortex-A9\r\n- [ ]  Cortex-A12\r\n- [x]  Cortex-A15\r\n- [ ]  ARMv7 (custom): Apple A4/A5/A5X/A6/A6X (Swift microarchitecture, used in Apple's iPhone/iPod/iPad/AppleTV), Qualcomm Snapdragon Note: this list is incomplete; code for any ARM-compliant core can be disassembled \r\n- [x]  ATMEL AVR (comes with source code)\r\n- [ ]  DEC PDP-11(comes with source code)\r\n- [ ]  [Fujitsu FR (comes with source code)](https://github.com/radare/radare2/issues/671)\r\n- [x]  GameBoy\r\n- [x]  Hitachi/Renesas H8/300\r\n- [ ]  H8/300L, H8/300H, H8S/2000, H8S/2600, H8SX (comes with source code) \r\n- [ ]  Hitachi H8/500(comes with source code)\r\n- [ ]  Hitachi HD 6301, HD 6303, Hitachi HD 64180\r\n- [x]  INTEL 8080\r\n- [ ]  INTEL 8085\r\n- [ ]  INTEL 80196 (comes with source code)\r\n- [x]  INTEL 8051 (comes with source code)\r\n- [ ]  INTEL 860XR (comes with source code)\r\n- [ ]  INTEL 960 (comes with source code)\r\n- [x]  INTEL 80x86 and 80x87\r\n- [x]  INTEL Pentium family, including SSE, SSE2, SSE3, SSE4 \r\n- [x]  Java Virtual Machine (comes with source code)\r\n- [ ]  KR1878 (comes with source code)\r\n- [ ]  Microsoft .NET (Common Language Infrastructure bytecode)\r\n- [ ]  Mitsubishi MELPS740 or Renesas 740 (comes with source code)\r\n- [ ]  Hitachi/Renesas M16C\r\n- [ ]  MN102 (comes only with source code)\r\n- [x]  MOS Technologies 6502 (comes with source code) \r\n- [ ]  Motorola/Freescale MC680xx, CPU32 (68330), MC6301, MC6303, MC6800, MC6801, MC6803, MC6805, MC6808, HCS08, MC6809, MC6811, M68H12C, ColdFire \r\n- [ ]  Motorola MC6812/MC68HC12/CPU12\r\n- [ ]  Freescale HCS12, HCS12X (including XGATE coprocessor)\r\n- [ ]  NSC CR16 (comes only with source code)\r\n- [x]  NEC V850\r\n- [ ]  V850E1 (V850ES) (comes with source code)\r\n- [x]  EFI Byte Code (EBC) (comes with source code)\r\n- [ ]  SPU (Synergistic Processing Unit of the Cell BE) (comes with source code)\r\n- [x]  MSP430\r\n- [ ]  MSP430X (comes with source code)\r\n- [ ]  PIC 12XX, PIC 14XX, PIC 18XX, PIC 16XXX (comes with source code) \r\n- [ ]  Rockwell C39 (comes only with source code)\r\n- [ ]  SAM8 (comes with source code)\r\n- [ ]  SGS Thomson ST-7, and ST-20 (comes with source code) \r\n- [ ]  TLCS900 (comes only with source code)\r\n- [ ]  unSP from SunPlus\r\n- [ ]  Philips XA series (51XA G3)(comes with source code)\r\n- [ ]  Intel xScale\r\n- [x]  Z80\r\n- [ ]  Zilog Z8, Zilog Z180, Zilog Z380 (comes with source code)\r\n- [x]  x64 architecture (Intel x64 and AMD64)\r\n- [x]  ARM64 Architecture (aka AArch64)\r\n- [ ]  Cortex-A5\r\n- [x]  Cortex-A53\r\n- [x]  Cortex-A57\r\n- [x]  ARMv8 (custom): Apple A7 (Cyclonemicroarchitecture, used in iPhone 5s)\r\n- [ ]  Analog Devices AD218x series (ADSP-2181, ADSP-2183,ADSP-2184(L/N), ADSP-2185(L/M/N), ADSP-2186(L/M/N), ADSP-2187(L/N),ADSP-2188M/N, ADSP-2189M/N)\r\n- [x]  Dalvik (Android bytecode, DEX)\r\n- [ ]  DEC Alpha\r\n- [ ]  DSP563xx, DSP566xx, DSP561XX(comes with source code)\r\n- [ ]  TI TMS320C2X\r\n- [ ]  TMS320C5X\r\n- [ ]  [TMS320C6X](https://github.com/radare/radare2/issues/1602)\r\n- [ ]  TMS320C64X\r\n- [ ]  TMS 320C54xx\r\n- [ ]  TMS320C55xx\r\n- [ ]  TMS320C3\r\n- [ ]  TI TMS320C27x/TMS320C28x\r\n- [ ]  Hewlett-Packard HP-PA (comes with source code)\r\n- [x]  Hitachi SH4\r\n- [ ]  Hitachi/Renesas SuperH series: SH1, SH2, SH3, SH-4A, SH-2A, SH2A-FPU\r\n- [ ]  IBM/Motorola PowerPC/POWER architecture, including Power ISA extensions:\r\n- [ ]  Book E (Embedded Controller Instructions)\r\n- [ ]  Freescale ISA extentions (isel etc.)\r\n- [ ]  SPE (Signal Processing Engine) instructions\r\n- [ ]  AltiVec (SIMD) instructions\r\n- [ ]  Hypervisor and virtualization instructions\r\n- [ ]  All instructions from the Power ISA 2.06 specification (Vector, Decimal Floating Point, Integer Multiply-Accumulate, VSX etc.)\r\n- [ ]  Cell BE (Broadband Engine) instructions (used in PlayStation 3)\r\n- [ ]  VLE (Variable Length Encoding) compressed instruction set\r\n- [ ]  Xenon (Xbox 360) instructions, including VMX128 extension\r\n- [ ]  Paired Single SIMD instructions (PowerPC 750CL/Gekko/Broadway/Espresso, used in Nintendo Wii and WiiU)\r\n- [ ]  Motorola/Freescale PowerPC-based cores and processors, including (but not limited to): \r\n- [ ]  MPC5xx series: MPC533/MPC535/MPC555/MPC556/MPC561/MPC562/MPC563/MPC564/MPC566 Note: code compression features of MPC534/MPC564/MPC556/MPC566 (Burst Buffer Controller) are currently not supported\r\n- [ ]  MPC8xx series (PowerQUICC): MPC821/MPC850/MPC860\r\n- [ ]  MPC8xxx series (PowerQUICC II, PowerQUICC II Pro, PowerQUICC III): MPC82xx/MPC83xx/MPC85xx/MPC87xx\r\n- [ ]  MPC5xxx series (Qorivva): MPC55xx, MPC56xx, MPC57xx\r\n- [ ]  Power PC 4xx, 6xx, 74xx, e200 (including e200z0 withVLE), e500 (including e500v1, e500v2 and e500mc), e600, e700, e5500,e6500 cores\r\n- [ ]  QorIQ series: P1, P2, P3, P4, P5 and T1, T2, T4 families\r\n- [ ]  [Infineon Tricore architecture (up to architecture v1.6)](https://github.com/radare/radare2/issues/670)\r\n- [ ]  Intel IA-64 Architecture - Itanium.\r\n- [ ]  Motorola DSP 56K\r\n- [ ]  Motorola MC6816\r\n- [x]  MIPS \r\n- [ ]  MIPS Mark I (R2000)\r\n- [ ]  MIPS Mark II (R3000)\r\n- [ ]  MIPS Mark III: (R4000, R4200, R4300, R4400, and R4600)\r\n- [ ]  MIPS Mark IV: R8000, R10000, R5900 (Playstation 2)\r\n- [x]  MIPS32\r\n- [x]  MIPS32r2\r\n- [x]  MIPS32r3\r\n- [x]   MIPS64\r\n- [x]  MIPS64r2\r\n- [x]   MIPS64r3\r\n- [ ]  Allegrex CPU (Playstation Portable), including VFPU instructions\r\n- [ ]  Cavium Octeon ISA extensions\r\n- [ ]  MIPS16 (MIPS16e) Application Specific Extension\r\n- [ ]  MIPS-MT, MIPS-3D, smartMIPS Application Specific Extensions\r\n- [ ]  Tohiba TX19/TX19A Family Application Specific Extension (MIPS16e+ aka MIPS16e-TX)\r\n- [ ]  Mitsubishi M32R(comes with source code)\r\n- [ ]  Mitsubishi M7700 (comes with source code)\r\n- [ ]  Mitsubishi M7900 (comes with source code)\r\n- [ ]  Nec 78K0 and Nec 78K0S (comes with source code)\r\n- [ ]  STMicroelectronics ST9+, ST-10 (comes with source code)\r\n- [x]  SPARCII, ULTRASPARC\r\n- [ ]  Siemens C166 (flow) \r\n- [ ]  Fujitsu F2MC-16L, Fujitsu F2MC-LC(comes with source code)\r\n\r\n\r\n---------\r\n\r\n\r\n\r\n"},"comment":{"url":"https://api.github.com/repos/radare/radare2/issues/comments/84919141","html_url":"https://github.com/radare/radare2/issues/1868#issuecomment-84919141","issue_url":"https://api.github.com/repos/radare/radare2/issues/1868","id":84919141,"user":{"login":"radare","id":917142,"avatar_url":"https://avatars.githubusercontent.com/u/917142?v=3","gravatar_id":"","url":"https://api.github.com/users/radare","html_url":"https://github.com/radare","followers_url":"https://api.github.com/users/radare/followers","following_url":"https://api.github.com/users/radare/following{/other_user}","gists_url":"https://api.github.com/users/radare/gists{/gist_id}","starred_url":"https://api.github.com/users/radare/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/radare/subscriptions","organizations_url":"https://api.github.com/users/radare/orgs","repos_url":"https://api.github.com/users/radare/repos","events_url":"https://api.github.com/users/radare/events{/privacy}","received_events_url":"https://api.github.com/users/radare/received_events","type":"User","site_admin":false},"created_at":"2015-03-23T09:51:56Z","updated_at":"2015-03-23T09:51:56Z","body":"the sparc disassembler from capstone lacks lot of instructions, so use gnu until capstone gets updated"}}