{"push_id":648849376,"size":50,"distinct_size":22,"ref":"refs/heads/lsi-v2013.01.01","head":"df5609fc066629eabf94e949d9f908fff2b40cca","before":"672366ed0706c81a4b9a5265dbeb898ead304b6b","commits":[{"sha":"fa231c7882dddb91b733116c0f0ddf08a7cc1ba7","author":{"email":"b6a09b6587efac31fa4cf411e52d15f074149490@lsi.com","name":"John Jacques"},"message":"board/lsi: Redundant/Secure Boot Updates\n\n1) Don't boot a non-secure image if secure\n   boot is enabled.\n2) Use U-Boot image files when creating signed,\n   and possibly encrypted, images.\n\nSigned-off-by: John Jacques <john.jacques@lsi.com>","distinct":false,"url":"https://api.github.com/repos/hanxulsi/lsi_axxia_uboot_public/commits/fa231c7882dddb91b733116c0f0ddf08a7cc1ba7"},{"sha":"1a40ff4bbc5711d18c443657c260215a89407655","author":{"email":"3a9fc7460558c92fc843d55eb3fd125a0f616eb1@lsi.com","name":"Gary McGee"},"message":"board/lsi: fix single SMEM operation when DDR Retention enabled\n\nSigned-off-by: Gary McGee <gary.mcgee@lsi.com>","distinct":false,"url":"https://api.github.com/repos/hanxulsi/lsi_axxia_uboot_public/commits/1a40ff4bbc5711d18c443657c260215a89407655"},{"sha":"650f61c530b8baee9b4732afcc29dcc2508dc000","author":{"email":"e5f685e50bf6c7e14cabc0fff57c0d810ddf673f@lsi.com","name":"Jay Jayatheerthan"},"message":"Defect 48481: Power down HSS0-4 lanes after download of images using EIOA.\n\nSigned-off-by: Jay Jayatheerthan <jay.jayatheerthan@lsi.com>","distinct":false,"url":"https://api.github.com/repos/hanxulsi/lsi_axxia_uboot_public/commits/650f61c530b8baee9b4732afcc29dcc2508dc000"},{"sha":"89026d586bacced4e004bb8642329d5226ff4947","author":{"email":"e5f685e50bf6c7e14cabc0fff57c0d810ddf673f@lsi.com","name":"Jay Jayatheerthan"},"message":"Defect 48298/47311: Fix slot for gmac1/gmac17 and fix tagGenMSB for gmac19/gmac20. These fixes allow traffic on all gmac ports in native domain.\n\nSigned-off-by: Jay Jayatheerthan <jay.jayatheerthan@lsi.com>","distinct":false,"url":"https://api.github.com/repos/hanxulsi/lsi_axxia_uboot_public/commits/89026d586bacced4e004bb8642329d5226ff4947"},{"sha":"b20781d1403741c310c70826bf1b9500132c3ee8","author":{"email":"e5f685e50bf6c7e14cabc0fff57c0d810ddf673f@lsi.com","name":"Jay Jayatheerthan"},"message":"Support for copper PHYs and AN in EIOA.\n\nSigned-off-by: Jay Jayatheerthan <jay.jayatheerthan@lsi.com>","distinct":false,"url":"https://api.github.com/repos/hanxulsi/lsi_axxia_uboot_public/commits/b20781d1403741c310c70826bf1b9500132c3ee8"},{"sha":"3d0fca14d8d9914e6b3817837086c9f953e7c2f0","author":{"email":"5dec7bc3b402e3fe80687e3757a3a100903cbae1@lsi.com","name":"SangeethaRao"},"message":"Resetting Watchdog timer in spl_mtest()\n\nSigned-off-by: SangeethaRao <sangeetha.rao@lsi.com>","distinct":false,"url":"https://api.github.com/repos/hanxulsi/lsi_axxia_uboot_public/commits/3d0fca14d8d9914e6b3817837086c9f953e7c2f0"},{"sha":"196346a13250976056e9b08c50836b098caeb2e8","author":{"email":"b6a09b6587efac31fa4cf411e52d15f074149490@lsi.com","name":"John Jacques"},"message":"board/lsi: Fix Compile Error for Emulation Target\n\nSigned-off-by: John Jacques <john.jacques@lsi.com>","distinct":false,"url":"https://api.github.com/repos/hanxulsi/lsi_axxia_uboot_public/commits/196346a13250976056e9b08c50836b098caeb2e8"},{"sha":"c092e5332bcdccc598cb2837e7f8b71b77fe7fb9","author":{"email":"5dec7bc3b402e3fe80687e3757a3a100903cbae1@lsi.com","name":"SangeethaRao"},"message":"Added Hybrid MBIST support for sysmem range testing\n\nSigned-off-by: SangeethaRao <sangeetha.rao@lsi.com>","distinct":false,"url":"https://api.github.com/repos/hanxulsi/lsi_axxia_uboot_public/commits/c092e5332bcdccc598cb2837e7f8b71b77fe7fb9"},{"sha":"1dc629c7462234d9b79c4b0611cb0ba0367655b9","author":{"email":"3a9fc7460558c92fc843d55eb3fd125a0f616eb1@lsi.com","name":"Gary McGee"},"message":"board/lsi : clean warnings with  NCR_TRACER defined\n\nSigned-off-by: Gary McGee <gary.mcgee@lsi.com>","distinct":false,"url":"https://api.github.com/repos/hanxulsi/lsi_axxia_uboot_public/commits/1dc629c7462234d9b79c4b0611cb0ba0367655b9"},{"sha":"74fa484cf4b4a4ce88b3a419a2ca9492e9b9d304","author":{"email":"3a9fc7460558c92fc843d55eb3fd125a0f616eb1@lsi.com","name":"Gary McGee"},"message":"board/lsi : merge DDR init changes from AXM3500 branch\n\nSigned-off-by: Gary McGee <gary.mcgee@lsi.com>","distinct":false,"url":"https://api.github.com/repos/hanxulsi/lsi_axxia_uboot_public/commits/74fa484cf4b4a4ce88b3a419a2ca9492e9b9d304"},{"sha":"67219f57a19e3abda135d268679aa7b865346fb6","author":{"email":"3a9fc7460558c92fc843d55eb3fd125a0f616eb1@lsi.com","name":"Gary McGee"},"message":"Merge branch 'lsi-v2013.01.01' of github.com:lsigithub/lsi_axxia_uboot into lsi-v2013.01.01","distinct":false,"url":"https://api.github.com/repos/hanxulsi/lsi_axxia_uboot_public/commits/67219f57a19e3abda135d268679aa7b865346fb6"},{"sha":"cd1d7bce596aab1b943df10ca78b251ea3256299","author":{"email":"3a9fc7460558c92fc843d55eb3fd125a0f616eb1@lsi.com","name":"Gary McGee"},"message":"board/lsi : consolidate DDR init changes for AXM5500 and AXM3500\n\nSigned-off-by: Gary McGee <gary.mcgee@lsi.com>","distinct":false,"url":"https://api.github.com/repos/hanxulsi/lsi_axxia_uboot_public/commits/cd1d7bce596aab1b943df10ca78b251ea3256299"},{"sha":"1f634444153a1eb8247c0efb911d5f88d0e4c818","author":{"email":"3a9fc7460558c92fc843d55eb3fd125a0f616eb1@lsi.com","name":"Gary McGee"},"message":"board/lsi : set tref_enable during DDR controller init\n\nSigned-off-by: Gary McGee <gary.mcgee@lsi.com>","distinct":false,"url":"https://api.github.com/repos/hanxulsi/lsi_axxia_uboot_public/commits/1f634444153a1eb8247c0efb911d5f88d0e4c818"},{"sha":"15ef3192948bb53442bcfbafabace1af2f7eb3fa","author":{"email":"b6a09b6587efac31fa4cf411e52d15f074149490@lsi.com","name":"John Jacques"},"message":"board/lsi: Workaround for ARM Errata 8111981\n\nSigned-off-by: John Jacques <john.jacques@lsi.com>","distinct":false,"url":"https://api.github.com/repos/hanxulsi/lsi_axxia_uboot_public/commits/15ef3192948bb53442bcfbafabace1af2f7eb3fa"},{"sha":"53ce83ff6defe5ed454ea54596bffa9c7f56a464","author":{"email":"b6a09b6587efac31fa4cf411e52d15f074149490@lsi.com","name":"John Jacques"},"message":"board/lsi: Add Support for Spansion S25FL164K\n\nSigned-off-by: John Jacques <john.jacques@lsi.com>","distinct":false,"url":"https://api.github.com/repos/hanxulsi/lsi_axxia_uboot_public/commits/53ce83ff6defe5ed454ea54596bffa9c7f56a464"},{"sha":"ab815bdb40b13461214d7f5f38b6e2e9ffa657ea","author":{"email":"b6a09b6587efac31fa4cf411e52d15f074149490@lsi.com","name":"John Jacques"},"message":"board/lsi: Workaround for ARM Errata (no number yet)\n\nFor now, this is described in Avago BZ 49133 as follows.\n\nPlease read the attached errata from ARM.  Based on review\nwith ARM- here are the ramifications of this defect. There\nis no guarantee the error will occur.\n\nThe following steps suggest how to AVOID creating a\nsituation where the system_counter will be corrupted.\n\n1. This error can occur in the X7, but may not be observed at all.\n2. In X7, the error can occur immediately after: reset_system,\n   reset_chip, reset_fabric, or when the non-CPU locic (L2) is\n   repowered on after being powered off.\n3. The error will \"self correct\". The upper bound on the time for\n   the error to self-correct is the number of ticks on the\n   system_counter when the error event occurs.\n\nTo avoid the error:\n\nA. MUST not power off the non-CPU logic in a cluster. A cluster's\n   bit in pwr_PWRUPL2LGCSTG1 @0x156.0x0.0x1420 and\n   pwr_PWRUPL2LGCSTG2 @0x156.0x0.0x1424 must **NOT** be set to 0 if\n   there will be a need in the future to bring the cluster back into\n   the system. The bit may be cleared if the cluster is being powered\n   off permanently. NOTE: CPU logic, CPU RAMS, and L2 RAMS may be\n   powered off.\n\nB. During the boot sequence, to reduce the magnitude of the system\n   counter (and thus the magnitude of the possible error): reset the\n   system counter immediately prior to starting the reset_fabric\n   process: set Reset Module Register (@0x156.0x0.0x1038) bit 16 to\n   a 1, then set it back to 0, then start the reset_fabric process.\n   NOTE: this will blow away any special uboot setup for the\n   system_counter.\n\nThis patch implements \"B.\".\n\nSigned-off-by: John Jacques <john.jacques@lsi.com>","distinct":false,"url":"https://api.github.com/repos/hanxulsi/lsi_axxia_uboot_public/commits/ab815bdb40b13461214d7f5f38b6e2e9ffa657ea"},{"sha":"2f59a843e8048d1e718488d093736a4377c3ea15","author":{"email":"534ff624e2ef44554e8cd9fda40534927eded760@avagotech.com","name":"Anders Berg"},"message":"Alignment for reset_cpu_fabric()\n\nThe synchronizing instructions in reset_cpu_fabric should fit within one cache\nline, according to the description of the reset sequence found in the reference\nmanual.\n\nThis patch also fixes so the read-back of the reset control register isn't\noptmized away by the compiler.\n\nSigned-off-by: Anders Berg <anders.berg@avagotech.com>","distinct":false,"url":"https://api.github.com/repos/hanxulsi/lsi_axxia_uboot_public/commits/2f59a843e8048d1e718488d093736a4377c3ea15"},{"sha":"6c706be1e4643cdaca6bb2b987552a2ef002b560","author":{"email":"3a9fc7460558c92fc843d55eb3fd125a0f616eb1@lsi.com","name":"Gary McGee"},"message":"Merge branch 'lsi-v2013.01.01' of github.com:lsigithub/lsi_axxia_uboot into lsi-v2013.01.01","distinct":false,"url":"https://api.github.com/repos/hanxulsi/lsi_axxia_uboot_public/commits/6c706be1e4643cdaca6bb2b987552a2ef002b560"},{"sha":"7f7a8ca8985d67c8e85107ad0ea774d03b16a148","author":{"email":"5dec7bc3b402e3fe80687e3757a3a100903cbae1@lsi.com","name":"SangeethaRao"},"message":"Fixed U-boot command line ULPI read\n\nSigned-off-by: SangeethaRao <sangeetha.rao@lsi.com>","distinct":false,"url":"https://api.github.com/repos/hanxulsi/lsi_axxia_uboot_public/commits/7f7a8ca8985d67c8e85107ad0ea774d03b16a148"},{"sha":"5664e4d265021759850b7002a7647393a7db0eea","author":{"email":"3a9fc7460558c92fc843d55eb3fd125a0f616eb1@lsi.com","name":"Gary McGee"},"message":"Merge branch 'lsi-v2013.01.01' of github.com:lsigithub/lsi_axxia_uboot into lsi-v2013.01.01","distinct":false,"url":"https://api.github.com/repos/hanxulsi/lsi_axxia_uboot_public/commits/5664e4d265021759850b7002a7647393a7db0eea"}]}