{"push_id":819964551,"size":74,"distinct_size":74,"ref":"refs/heads/master","head":"00dd1455655fe2a715ae8b0f90d38fbb3680f48a","before":"85530e90b239634fde7e618a3d1f4284093945e9","commits":[{"sha":"628e66d41c306c9105ee22e5786652025ddaf5ca","author":{"email":"0676eb08ae2017304e724e2d2f740c7c246f696b@juniper.jf.intel.com","name":"greg.henry"},"message":"This the modification of the vec_move instructions to do encoding","distinct":true,"url":"https://api.github.com/repos/maxhutch/libxsmm/commits/628e66d41c306c9105ee22e5786652025ddaf5ca"},{"sha":"2031768fa8e9a5ea68de1874f21efeda8c666178","author":{"email":"0676eb08ae2017304e724e2d2f740c7c246f696b@juniper.jf.intel.com","name":"greg.henry"},"message":"Changing the variable names to conform with rest of code","distinct":true,"url":"https://api.github.com/repos/maxhutch/libxsmm/commits/2031768fa8e9a5ea68de1874f21efeda8c666178"},{"sha":"86dd05c06af21a853edf07c97e6913abc5b63880","author":{"email":"0676eb08ae2017304e724e2d2f740c7c246f696b@juniper.jf.intel.com","name":"greg.henry"},"message":"Adding jit code to libxsmm_instruction_vec_compute_reg","distinct":true,"url":"https://api.github.com/repos/maxhutch/libxsmm/commits/86dd05c06af21a853edf07c97e6913abc5b63880"},{"sha":"a2b4295a67729e376408b50b0c663bd988fb51aa","author":{"email":"0676eb08ae2017304e724e2d2f740c7c246f696b@juniper.jf.intel.com","name":"greg.henry"},"message":"This the modification of the vec_move instructions to do encoding","distinct":true,"url":"https://api.github.com/repos/maxhutch/libxsmm/commits/a2b4295a67729e376408b50b0c663bd988fb51aa"},{"sha":"7652783b8d374218e301aa6e55403acc088c3549","author":{"email":"0676eb08ae2017304e724e2d2f740c7c246f696b@juniper.jf.intel.com","name":"greg.henry"},"message":"Changing the variable names to conform with rest of code","distinct":true,"url":"https://api.github.com/repos/maxhutch/libxsmm/commits/7652783b8d374218e301aa6e55403acc088c3549"},{"sha":"d087706050a28cc2ebd42590b6500e960e4f8fcc","author":{"email":"0676eb08ae2017304e724e2d2f740c7c246f696b@juniper.jf.intel.com","name":"greg.henry"},"message":"Adding jit code to libxsmm_instruction_vec_compute_reg","distinct":true,"url":"https://api.github.com/repos/maxhutch/libxsmm/commits/d087706050a28cc2ebd42590b6500e960e4f8fcc"},{"sha":"a035baebee72db0e88f103dbc99e18c7156df464","author":{"email":"119b2ea00dae38ab9c5d407ec10b6f94083a7e87@intel.com","name":"Alexander Heinecke"},"message":"Merge branch 'jit_backend' of ssh://git-ger-6.devtools.intel.com:29418/il_ssg_libxsmm-libxsmm into jit_backend","distinct":true,"url":"https://api.github.com/repos/maxhutch/libxsmm/commits/a035baebee72db0e88f103dbc99e18c7156df464"},{"sha":"7fa08dfa1f76cdea53ab09228a8d7b943154cdd1","author":{"email":"0676eb08ae2017304e724e2d2f740c7c246f696b@juniper.jf.intel.com","name":"greg.henry"},"message":"Adding VPXORD to vec_compute encoding routine","distinct":true,"url":"https://api.github.com/repos/maxhutch/libxsmm/commits/7fa08dfa1f76cdea53ab09228a8d7b943154cdd1"},{"sha":"3991d8967280f85806a056fd009cee66f72c2865","author":{"email":"119b2ea00dae38ab9c5d407ec10b6f94083a7e87@intel.com","name":"Alexander Heinecke"},"message":"Merge branch 'master' into jit_backend","distinct":true,"url":"https://api.github.com/repos/maxhutch/libxsmm/commits/3991d8967280f85806a056fd009cee66f72c2865"},{"sha":"bd986d7a48446126f336f20e836e93d35e0b5cf8","author":{"email":"119b2ea00dae38ab9c5d407ec10b6f94083a7e87@intel.com","name":"Alexander Heinecke"},"message":"Merge branch 'master' into jit_backend\n\nConflicts:\n\tsrc/generator_dense_instructions.c","distinct":true,"url":"https://api.github.com/repos/maxhutch/libxsmm/commits/bd986d7a48446126f336f20e836e93d35e0b5cf8"},{"sha":"4760d8153e8a651a01eaeee9b1f5c80dd272293b","author":{"email":"119b2ea00dae38ab9c5d407ec10b6f94083a7e87@intel.com","name":"Alexander Heinecke"},"message":"Merge branch 'master' into jit_backend","distinct":true,"url":"https://api.github.com/repos/maxhutch/libxsmm/commits/4760d8153e8a651a01eaeee9b1f5c80dd272293b"},{"sha":"762542d5a780d8d7f693ef81a9e51d4b35e0f8e5","author":{"email":"0676eb08ae2017304e724e2d2f740c7c246f696b@juniper.jf.intel.com","name":"greg.henry"},"message":"Updated the encoding for the latest list (it keeps expanding!)","distinct":true,"url":"https://api.github.com/repos/maxhutch/libxsmm/commits/762542d5a780d8d7f693ef81a9e51d4b35e0f8e5"},{"sha":"a3329a4a713cc3e2de8083f9bed44440981198ab","author":{"email":"0676eb08ae2017304e724e2d2f740c7c246f696b@mugwort.jf.intel.com","name":"greg.henry"},"message":"Adding the encoding for the membcast routine","distinct":true,"url":"https://api.github.com/repos/maxhutch/libxsmm/commits/a3329a4a713cc3e2de8083f9bed44440981198ab"},{"sha":"435c629ba6438cdc81bee03fed63580a541a92e7","author":{"email":"119b2ea00dae38ab9c5d407ec10b6f94083a7e87@intel.com","name":"Alexander Heinecke"},"message":"Merge branch 'master' of https://github.com/hfp/libxsmm into jit_backend","distinct":true,"url":"https://api.github.com/repos/maxhutch/libxsmm/commits/435c629ba6438cdc81bee03fed63580a541a92e7"},{"sha":"3dfbc610bfd4cc347c7abe616d3c0a50e3e334bf","author":{"email":"119b2ea00dae38ab9c5d407ec10b6f94083a7e87@intel.com","name":"Alexander Heinecke"},"message":"Merge branch 'jit_backend' of ssh://git-ger-6.devtools.intel.com:29418/il_ssg_libxsmm-libxsmm into jit_backend","distinct":true,"url":"https://api.github.com/repos/maxhutch/libxsmm/commits/3dfbc610bfd4cc347c7abe616d3c0a50e3e334bf"},{"sha":"8ce8e5b4d7ce5c098646c81e62e3d9200769bc47","author":{"email":"119b2ea00dae38ab9c5d407ec10b6f94083a7e87@intel.com","name":"Alexander Heinecke"},"message":"Merge branch 'master' into jit_backend","distinct":true,"url":"https://api.github.com/repos/maxhutch/libxsmm/commits/8ce8e5b4d7ce5c098646c81e62e3d9200769bc47"},{"sha":"b4864aef51c50957cb321aeed2ac20e45cfe8599","author":{"email":"119b2ea00dae38ab9c5d407ec10b6f94083a7e87@intel.com","name":"Alexander Heinecke"},"message":"fixed compile bugs due to gpr base register renaming","distinct":true,"url":"https://api.github.com/repos/maxhutch/libxsmm/commits/b4864aef51c50957cb321aeed2ac20e45cfe8599"},{"sha":"92225b4f3ad52b4c5418f9a682a34aca1ccf015a","author":{"email":"0676eb08ae2017304e724e2d2f740c7c246f696b@mugwort.jf.intel.com","name":"greg.henry"},"message":"\tAdding JIT to prefetch instructions","distinct":true,"url":"https://api.github.com/repos/maxhutch/libxsmm/commits/92225b4f3ad52b4c5418f9a682a34aca1ccf015a"},{"sha":"884db14a4ac65de6481da6d548de20ee9742cb24","author":{"email":"119b2ea00dae38ab9c5d407ec10b6f94083a7e87@intel.com","name":"Alexander Heinecke"},"message":"added first frame for jit test (correctness and performance) benchmark","distinct":true,"url":"https://api.github.com/repos/maxhutch/libxsmm/commits/884db14a4ac65de6481da6d548de20ee9742cb24"},{"sha":"bd46caf0cb66d318553dada668bc61813fa07f27","author":{"email":"119b2ea00dae38ab9c5d407ec10b6f94083a7e87@intel.com","name":"Alexander Heinecke"},"message":"added a very simple git example (8 element vector)\nadded system V 64bit ABI to run jitted code","distinct":true,"url":"https://api.github.com/repos/maxhutch/libxsmm/commits/bd46caf0cb66d318553dada668bc61813fa07f27"}]}