{"push_id":629695052,"size":1,"distinct_size":1,"ref":"refs/heads/master","head":"12fef766db11d3a0261e946886dadb2069d06e3c","before":"f5bf12cf08f17c5392879f8cedd0336e21d112a4","commits":[{"sha":"12fef766db11d3a0261e946886dadb2069d06e3c","author":{"email":"73262ad0334ab37227b2f7a0205f51db1e606681@3ad0048d-3df7-0310-abae-a5850022a9f2","name":"florian"},"message":"o several avr fixes\n  * handle function result of FPC_MUL_WORD correctly\n  * use mov ...,r1 to load a register with zero instead of clr ..., this might enable the register allocator to \n    coalesce these moves in the feature\n  * use tst/dec instead of cpi/sub in the shifting loops, this reduces register pressure on r16 and higher\n\ngit-svn-id: http://svn.freepascal.org/svn/fpc/trunk@30540 3ad0048d-3df7-0310-abae-a5850022a9f2","distinct":true,"url":"https://api.github.com/repos/fpc-svn/fpc/commits/12fef766db11d3a0261e946886dadb2069d06e3c"}]}