{"push_id":725802355,"size":1,"distinct_size":1,"ref":"refs/heads/master","head":"f46c6d1771eef2b46ca46a6638ca0d346055804f","before":"fa49304b360aede4b3a66f72e5474c76c58cf09d","commits":[{"sha":"f46c6d1771eef2b46ca46a6638ca0d346055804f","author":{"email":"76a8e82c3bdc78a1f9490a34857cdee8b1b06a45@anl.gov","name":"Hal Finkel"},"message":"[PowerPC] Fix the PPCInstrInfo::getInstrLatency implementation\n\nPowerPC uses itineraries to describe processor pipelines (and dispatch-group\nrestrictions for P7/P8 cores). Unfortunately, the target-independent\nimplementation of TII.getInstrLatency calls ItinData->getStageLatency, and that\nlooks for the largest cycle count in the pipeline for any given instruction.\nThis, however, yields the wrong answer for the PPC itineraries, because we\ndon't encode the full pipeline. Because the functional units are fully\npipelined, we only model the initial stages (there are no relevant hazards in\nthe later stages to model), and so the technique employed by getStageLatency\ndoes not really work. Instead, we should take the maximum output operand\nlatency, and that's what PPCInstrInfo::getInstrLatency now does.\n\nThis caused some test-case churn, including two unfortunate side effects.\nFirst, the new arrangement of copies we get from function parameters now\nsometimes blocks VSX FMA mutation (a FIXME has been added to the code and the\ntest cases), and we have one significant test-suite regression:\n\nSingleSource/Benchmarks/BenchmarkGame/spectral-norm\n\t56.4185% +/- 18.9398%\n\nIn this benchmark we have a loop with a vectorized FP divide, and it with the\nnew scheduling both divides end up in the same dispatch group (which in this\ncase seems to cause a problem, although why is not exactly clear). The grouping\nstructure is hard to predict from the bottom of the loop, and there may not be\nmuch we can do to fix this.\n\nVery few other test-suite performance effects were really significant, but\nalmost all weakly favor this change. However, in light of the issues\nhighlighted above, I've left the old behavior available via a\ncommand-line flag.","distinct":true,"url":"https://api.github.com/repos/llvm-project/llvm-project-submodule/commits/f46c6d1771eef2b46ca46a6638ca0d346055804f"}]}