{"push_id":723021220,"size":828,"distinct_size":2,"ref":"refs/heads/caf/linux-next/master","head":"af2807434a5bdfe6eecea7d8e8c40e9a796ff418","before":"878d23f7e000b1b74bd28409c881e06b934b21fe","commits":[{"sha":"b1b38278e12b04cf9a227f6af2c24651cf6e8a85","author":{"email":"ba454e1b57338247e699b839e0a1d33825bf88b9@linux.intel.com","name":"David Weinehall"},"message":"drm/i915: add a context parameter to {en, dis}able zero address mapping\n\nExport a new context parameter that can be set/queried through the\ncontext_{get,set}param ioctls.  This parameter is passed as a context\nflag and decides whether or not a GPU address mapping is allowed to\nbe made at address zero.  The default is to allow such mappings.\n\nSigned-off-by: David Weinehall <david.weinehall@intel.com>\nAcked-by: \"Zou, Nanhai\" <nanhai.zou@intel.com>\nSigned-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>","distinct":false,"url":"https://api.github.com/repos/Rashed97/caf-kernel-msm/commits/b1b38278e12b04cf9a227f6af2c24651cf6e8a85"},{"sha":"0d2e42970cfa8814ce5f73e329f61c94b7ec2dab","author":{"email":"ba783f3beccaedfda693f41a15407d612a629408@intel.com","name":"Jani Nikula"},"message":"drm/i915: reduce indent in i9xx_hpd_irq_handler\n\nBail out early if nothing to do. No functional changes.\n\nSigned-off-by: Jani Nikula <jani.nikula@intel.com>\nSigned-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>","distinct":false,"url":"https://api.github.com/repos/Rashed97/caf-kernel-msm/commits/0d2e42970cfa8814ce5f73e329f61c94b7ec2dab"},{"sha":"369712e89404089fa559235bb1ee8fc40d976e6b","author":{"email":"ba783f3beccaedfda693f41a15407d612a629408@intel.com","name":"Jani Nikula"},"message":"drm/i915: reduce duplicate conditions in i9xx_hpd_irq_handler\n\nMove dp aux irq handling within the same branch instead of duplicating\nthe conditions. No functional changes.\n\nSigned-off-by: Jani Nikula <jani.nikula@intel.com>\nSigned-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>","distinct":false,"url":"https://api.github.com/repos/Rashed97/caf-kernel-msm/commits/369712e89404089fa559235bb1ee8fc40d976e6b"},{"sha":"b0c29a33fc80bec3ae0f5862d7733e3782878d6d","author":{"email":"ba783f3beccaedfda693f41a15407d612a629408@intel.com","name":"Jani Nikula"},"message":"drm/i915: reduce indent in intel_hpd_irq_handler\n\nContinue to loop early if there's nothing to do. No functional changes.\n\nSigned-off-by: Jani Nikula <jani.nikula@intel.com>\nSigned-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>","distinct":false,"url":"https://api.github.com/repos/Rashed97/caf-kernel-msm/commits/b0c29a33fc80bec3ae0f5862d7733e3782878d6d"},{"sha":"5fcece80ecdac932a0acb71e3a239c39dd4af20f","author":{"email":"ba783f3beccaedfda693f41a15407d612a629408@intel.com","name":"Jani Nikula"},"message":"drm/i915: group all hotplug related fields into a new struct in dev_priv\n\nThere are plenty of hotplug related fields in struct drm_i915_private\nscattered all around. Group them under one hotplug struct. Clean up\nnaming while at it. No functional changes.\n\nSigned-off-by: Jani Nikula <jani.nikula@intel.com>\nSigned-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>","distinct":false,"url":"https://api.github.com/repos/Rashed97/caf-kernel-msm/commits/5fcece80ecdac932a0acb71e3a239c39dd4af20f"},{"sha":"d66716200a8e8362599ce939df40821bb960e866","author":{"email":"ba783f3beccaedfda693f41a15407d612a629408@intel.com","name":"Jani Nikula"},"message":"drm/i915: remove useless DP and DDI encoder ->hot_plug hooks\n\nThe hotplug callbacks for DP and DDI effectively did nothing. Remove\nthem.\n\nSigned-off-by: Jani Nikula <jani.nikula@intel.com>\nSigned-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>","distinct":false,"url":"https://api.github.com/repos/Rashed97/caf-kernel-msm/commits/d66716200a8e8362599ce939df40821bb960e866"},{"sha":"ea875496360cf8f89ea009239bf7ef12cdd4febc","author":{"email":"ba783f3beccaedfda693f41a15407d612a629408@intel.com","name":"Jani Nikula"},"message":"drm/i915/dsi: remove non-op hot plug callback\n\nNot needed or used.\n\nSigned-off-by: Jani Nikula <jani.nikula@intel.com>\nSigned-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>","distinct":false,"url":"https://api.github.com/repos/Rashed97/caf-kernel-msm/commits/ea875496360cf8f89ea009239bf7ef12cdd4febc"},{"sha":"6cf75178deacd87af12a657d914e6bbca806b5ba","author":{"email":"64bd3cb94f359c1a3ce68dae5e26b40578526277@intel.com","name":"Damien Lespiau"},"message":"drm/i915/skl: Make sure to break when not finding suitable PLL dividers\n\nRight now, when finishing the cycle with odd dividers without finding a\nsuitable candidate, we end up in an infinite loop. Make sure to break in\nthat case.\n\nSigned-off-by: Damien Lespiau <damien.lespiau@intel.com>\nReviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>\nSigned-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>","distinct":false,"url":"https://api.github.com/repos/Rashed97/caf-kernel-msm/commits/6cf75178deacd87af12a657d914e6bbca806b5ba"},{"sha":"19cdc0e6cdfc29e3ddee1fe56c3bcdfe25f6a916","author":{"email":"64bd3cb94f359c1a3ce68dae5e26b40578526277@intel.com","name":"Damien Lespiau"},"message":"drm/i915/skl: Display the WRPLL frequency we couldn't accomodate when failing\n\nThis helps debugging.\n\nSigned-off-by: Damien Lespiau <damien.lespiau@intel.com>\nReviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>\nSigned-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>","distinct":false,"url":"https://api.github.com/repos/Rashed97/caf-kernel-msm/commits/19cdc0e6cdfc29e3ddee1fe56c3bcdfe25f6a916"},{"sha":"318bd821d65d37fb12c5673607e2b013f7a86a01","author":{"email":"64bd3cb94f359c1a3ce68dae5e26b40578526277@intel.com","name":"Damien Lespiau"},"message":"drm/i915/skl: Propagate the error if we fail to find a suitable DPLL divider\n\nAt the moment, even if we fail to find a suitable divider, we'll still\ntry to set the mode with bogus parameters.\n\nJust fail the modeset if we can't generate the frequency.\n\nSigned-off-by: Damien Lespiau <damien.lespiau@intel.com>\nReviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>\nSigned-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>","distinct":false,"url":"https://api.github.com/repos/Rashed97/caf-kernel-msm/commits/318bd821d65d37fb12c5673607e2b013f7a86a01"},{"sha":"9c2367538de381435503425c22c4f192c72e282e","author":{"email":"64bd3cb94f359c1a3ce68dae5e26b40578526277@intel.com","name":"Damien Lespiau"},"message":"drm/i915/skl: Use a more idomatic early return\n\nWe can coalesce the WARN() condition with the WARN() itself and, as we\nare returning early, we can de-intent the rest of the function.\n\nSigned-off-by: Damien Lespiau <damien.lespiau@intel.com>\nReviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>\nSigned-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>","distinct":false,"url":"https://api.github.com/repos/Rashed97/caf-kernel-msm/commits/9c2367538de381435503425c22c4f192c72e282e"},{"sha":"76516fbc294d60481f2427d6a42125364a629386","author":{"email":"64bd3cb94f359c1a3ce68dae5e26b40578526277@intel.com","name":"Damien Lespiau"},"message":"drm/i915/skl: Factor out computing the DPLL paramaters from the dividers\n\nThis part doesn't depend on how we compute the DPLL dividers (p and\np0/p1/p2) and can be reused even if we change the algorithm to do so.\n(something that is planned for a followup patch)\n\nSigned-off-by: Damien Lespiau <damien.lespiau@intel.com>\nReviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>\nSigned-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>","distinct":false,"url":"https://api.github.com/repos/Rashed97/caf-kernel-msm/commits/76516fbc294d60481f2427d6a42125364a629386"},{"sha":"30a7862de84e69abc3018c57184f485048eed9d8","author":{"email":"64bd3cb94f359c1a3ce68dae5e26b40578526277@intel.com","name":"Damien Lespiau"},"message":"drm/i915/skl: Remove unnecessary () used with div_u64()\n\ndiv_u64() can be either a inline function or a define, but in either\ncase it's safe to provide expressions as parameters without outer ()\naround them.\n\nSigned-off-by: Damien Lespiau <damien.lespiau@intel.com>\nReviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>\nSigned-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>","distinct":false,"url":"https://api.github.com/repos/Rashed97/caf-kernel-msm/commits/30a7862de84e69abc3018c57184f485048eed9d8"},{"sha":"64311571a91fdd6d2ddc9055e9ba477f118067ad","author":{"email":"64bd3cb94f359c1a3ce68dae5e26b40578526277@intel.com","name":"Damien Lespiau"},"message":"drm/i915/skl: Remove unnecessary () used with abs_diff()\n\nabs_diff() properly protects its parameters, so no need for the outer ()\nhere.\n\nSigned-off-by: Damien Lespiau <damien.lespiau@intel.com>\nReviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>\nSigned-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>","distinct":false,"url":"https://api.github.com/repos/Rashed97/caf-kernel-msm/commits/64311571a91fdd6d2ddc9055e9ba477f118067ad"},{"sha":"6358298337abfabcf1e2b211c433f2093e5e9b28","author":{"email":"64bd3cb94f359c1a3ce68dae5e26b40578526277@intel.com","name":"Damien Lespiau"},"message":"drm/i915: Correctly prefix HSW/BDW HDMI clock functions\n\nThose functions were the only one in existence when they were\nintroduced. We now know they are only valid for HSW/BDW.\n\nSigned-off-by: Damien Lespiau <damien.lespiau@intel.com>\nReviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>\nSigned-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>","distinct":false,"url":"https://api.github.com/repos/Rashed97/caf-kernel-msm/commits/6358298337abfabcf1e2b211c433f2093e5e9b28"},{"sha":"877f61d947b6666205fee4ea7a04faf187a4ede5","author":{"email":"64bd3cb94f359c1a3ce68dae5e26b40578526277@intel.com","name":"Damien Lespiau"},"message":"drm/i915/skl: Don't try to store the wrong central frequency\n\nThe orignal code started by storing the actual central frequency (in Hz,\nusing a uint64_t) in a uint32_t which codes for the register value. That\ncan't be right.\n\nSigned-off-by: Damien Lespiau <damien.lespiau@intel.com>\nReviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>\nSigned-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>","distinct":false,"url":"https://api.github.com/repos/Rashed97/caf-kernel-msm/commits/877f61d947b6666205fee4ea7a04faf187a4ede5"},{"sha":"8d2fdc3f26d150633004a04b53a4398cc2eed343","author":{"email":"82325a91373a06cdf12f953d4611ffb7756aa8d4@intel.com","name":"Tvrtko Ursulin"},"message":"drm/i915: Only show view type for GGTT VMAs\n\nPrinting it for PPGTT VMAs only adds noise since we have defined\nview types are only applicable for GGTT.\n\nSigned-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>\nCc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>\nReviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>\nSigned-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>","distinct":false,"url":"https://api.github.com/repos/Rashed97/caf-kernel-msm/commits/8d2fdc3f26d150633004a04b53a4398cc2eed343"},{"sha":"1b1d27160dad5478f614f95ae5a87bd8382c5612","author":{"email":"cd6e8d405ca90be3a03d5427c5b24fbd2d68dcc4@linux.intel.com","name":"Ville Syrjälä"},"message":"drm/i915: Fix i855 get_display_clock_speed\n\nActually read the HPLLCC register insted of assuming it's 0. Fix the\nHPLLCC bit definitions and all the missing ones from the 852GME spec.\n\n852GME, 854 and 855 all seem to match the same HPLLC encoding even\nthough only some of the values are valid is some of the platforms.\n\nv2: Rebased to the latest\nv3: Rebased to the latest\n\nSigned-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v1)\nSigned-off-by: Mika Kahola <mika.kahola@intel.com>\nAcked-by: Damien Lespiau <damien.lespiau@intel.com>\nSigned-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>","distinct":false,"url":"https://api.github.com/repos/Rashed97/caf-kernel-msm/commits/1b1d27160dad5478f614f95ae5a87bd8382c5612"},{"sha":"65cd2b3fa521d1abec13dd36bf1bfc8f2469d8bc","author":{"email":"cd6e8d405ca90be3a03d5427c5b24fbd2d68dcc4@linux.intel.com","name":"Ville Syrjälä"},"message":"drm/i915: Fix 852GM/GMV cdclk\n\nIt seems 852GM/GMV uses a different HPLLCC encoding than the other\n85x platforms. For 852GM/GMV cdclk is always 133MHz. Try to detect that\nusing the PCI revision (sinc the device ID seems useless for that). I'm\nnot at all sure this is a good idea, but according to the specs it\nshould work.\n\nv2: Rebased to the latest\nv3: Rebased to the latest\n\nSigned-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v1)\nSigned-off-by: Mika Kahola <mika.kahola@intel.com>\nAcked-by: Damien Lespiau <damien.lespiau@intel.com>\nSigned-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>","distinct":false,"url":"https://api.github.com/repos/Rashed97/caf-kernel-msm/commits/65cd2b3fa521d1abec13dd36bf1bfc8f2469d8bc"},{"sha":"34edce2fea6960ce5855d6e09902f82822c374c5","author":{"email":"cd6e8d405ca90be3a03d5427c5b24fbd2d68dcc4@linux.intel.com","name":"Ville Syrjälä"},"message":"drm/i915: Add cdclk extraction for g33, g965gm and g4x\n\nImplement cdclk extraction for g33, 965gm and g4x platforms. The details\ncame from configdb. Sadly there isn't anything there for other gen3/gen4\nchipsets.\n\nSo far I've tested this on one ELK where it gave me a HPLL VCO of 5333\nMHz and cdclk of 444 MHz which seems perfectly sane for this machine.\n\nv2: Rebased to the latest\nv3: Rebased to the latest\n\nSigned-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>\nSigned-off-by: Mika Kahola <mika.kahola@intel.com>\nAcked-by: Damien Lespiau <damien.lespiau@intel.com>\nSigned-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>","distinct":false,"url":"https://api.github.com/repos/Rashed97/caf-kernel-msm/commits/34edce2fea6960ce5855d6e09902f82822c374c5"}]}