{"push_id":859168633,"size":1,"distinct_size":1,"ref":"refs/heads/master","head":"76916424bef4b5043d90e2f2dd15fb3dda9c029e","before":"bcd8e0aae7dc4eea0ff0a425ba164db10c4dcb71","commits":[{"sha":"76916424bef4b5043d90e2f2dd15fb3dda9c029e","author":{"email":"788c14eeffa2067e120409a238fa186a04f20a10@amd.com","name":"Matt Arsenault"},"message":"Remove unnecessary call to getAllocatableRegClass\n\nI'm not sure what the point of this was. I'm not sure why\nyou would ever define an instruction that produces an unallocatable\nregister class. No tests fail with this removed, and it seems like\nit should be a verifier error to define such an instruction.\n\nThis was problematic for AMDGPU because it would make bad decisions\nby arbitrarily changing the register class when unsetting isAllocatable\nfor VS_32/VS_64, which is currently set as a workaround to this problem.\n\nAMDGPU uses the VS_32/VS_64 register classes to represent operands which\ncan use either VGPRs or SGPRs. When  isAllocatable is unset for these,\nthis would need to pick  either the SGPR or VGPR class and insert either\na copy we don't want, or an illegal copy we would need to deal with\nlater. A semi-arbitrary register class ordering decision is made in tablegen,\nwhich resulted in always picking a VGPR class because it happens to have\nmore registers than the SGPR register class. We really just want to\nuse whatever register class the original register had.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252565 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/llvm-project/llvm/commits/76916424bef4b5043d90e2f2dd15fb3dda9c029e"}]}