{"push_id":546568026,"size":7,"distinct_size":7,"ref":"refs/heads/master","head":"33f5127540aa151e2611b82c7590276ab8a48cb8","before":"9e4a11f46c4611662d28cec1f2c008ad0ed24023","commits":[{"sha":"4ade012dd08c80ef14e899de4455d16df5fa732d","author":{"email":"05f726f834638679f776bde9b9fcd7e9d7242de5@gmail.com","name":"David Blaikie"},"message":"Add comment about a gotcha I ran across while touching this code.\n\nI haven't looked closely at exactly why the side effect is required, but\nthis seems better than not mentioning it at all.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226030 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/llvm-mirror/llvm/commits/4ade012dd08c80ef14e899de4455d16df5fa732d"},{"sha":"0a2caa143f0233bcf1ba04a358f3e21a095035e0","author":{"email":"6b31706989f3cf9466bfddbf48eab0c43e646ba8@gmail.com","name":"Rafael Espindola"},"message":"Fix linking of shared libraries.\n\nIn shared libraries the plugin can see non-weak declarations that are still\nundefined.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226031 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/llvm-mirror/llvm/commits/0a2caa143f0233bcf1ba04a358f3e21a095035e0"},{"sha":"11abe69e9857390a035470c20534b8e5ac4d479e","author":{"email":"226409dbd0f8f7302b911c342b723f8b80eeb87d@linux.vnet.ibm.com","name":"Bill Schmidt"},"message":"[PPC64] Add support for the ICBT instruction on POWER8.\n\nPatch by Kit Barton.\n\nSupport for the ICBT instruction is currently present, but limited to\nembedded processors. This change adds a new FeatureICBT that can be used\nto identify whether the ICBT instruction is available on a specific processor.\n\nTwo new tests are added:\n * Positive test to ensure the icbt instruction is present when using\n-mcpu=pwr8\n * Negative test to ensure the icbt instruction is not generated when\nusing -mcpu=pwr7\n\nBoth test cases use the Prefetch opcode in LLVM. They are based on the\nppc64-prefetch.ll test case.\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226033 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/llvm-mirror/llvm/commits/11abe69e9857390a035470c20534b8e5ac4d479e"},{"sha":"8af8091ef5a6cd3f79ab73d47ee07d91c9a5437f","author":{"email":"420c9fb3407b8e11ac322a0e7703f7b1f526df04@gmail.com","name":"Chandler Carruth"},"message":"[MBP] Add flags to disable the BadCFGConflict check in MachineBlockPlacement.\n\nSome benchmarks have shown that this could lead to a potential\nperformance benefit, and so adding some flags to try to help measure the\ndifference.\n\nA possible explanation. In diamond-shaped CFGs (A followed by either\nB or C both followed by D), putting B and C both in between A and\nD leads to the code being less dense than it could be. Always either\nB or C have to be skipped increasing the chance of cache misses etc.\nMoving either B or C to after D might be beneficial on average.\n\nIn the long run, but we should probably do a better job of analyzing the\nbasic block and branch probabilities to move the correct one of B or\nC to after D. But even if we don't use this in the long run, it is\na good baseline for benchmarking.\n\nOriginal patch authored by Daniel Jasper with test tweaks and a second\nflag added by me.\n\nDifferential Revision: http://reviews.llvm.org/D6969\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226034 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/llvm-mirror/llvm/commits/8af8091ef5a6cd3f79ab73d47ee07d91c9a5437f"},{"sha":"a6b0d5a62e4cc14e4cb41e14709539c9fe8ebc61","author":{"email":"6b31706989f3cf9466bfddbf48eab0c43e646ba8@gmail.com","name":"Rafael Espindola"},"message":"Add a test that would have found the issue with r225644.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226035 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/llvm-mirror/llvm/commits/a6b0d5a62e4cc14e4cb41e14709539c9fe8ebc61"},{"sha":"f7db2526adfbfd42622c970ca01c5131f2168b7c","author":{"email":"a30d5417db2a59efc67ebffe542ab1a89e3ed3a7@codeaurora.org","name":"Colin LeMahieu"},"message":"[Hexagon] Removing old, unused !tstbit instructions.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226036 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/llvm-mirror/llvm/commits/f7db2526adfbfd42622c970ca01c5131f2168b7c"},{"sha":"33f5127540aa151e2611b82c7590276ab8a48cb8","author":{"email":"6b31706989f3cf9466bfddbf48eab0c43e646ba8@gmail.com","name":"Rafael Espindola"},"message":"Don't create new comdats in CodeGen.\n\nThis patch stops the implicit creation of comdats during codegen.\n\nClang now sets the comdat explicitly when it is required. With this patch clang and gcc\nnow produce the same result in pr19848.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226038 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/llvm-mirror/llvm/commits/33f5127540aa151e2611b82c7590276ab8a48cb8"}]}