{"push_id":722738325,"size":27,"distinct_size":1,"ref":"refs/heads/topics/drivers/picoxcell-soc","head":"b7ab3cb17947b12c0109a8026858c26b2f76a826","before":"802706729aed3fa5b3240be486e86901a58a7b2e","commits":[{"sha":"d8ea782b56d9d2c46a47b3231cfd16ecfb538c60","author":{"email":"c012decff9dffda4c10860ab2ba9eb53320d90bc@linux.vnet.ibm.com","name":"Vaidyanathan Srinivasan"},"message":"powerpc/powernv: Fix vma page prot flags in opal-prd driver\n\nopal-prd driver will mmap() firmware code/data area as private\nmapping to prd user space daemon.  Write to this page will\ntrigger COW faults.  The new COW pages are normal kernel RAM\npages accounted by the kernel and are not special.\n\nvma->vm_page_prot value will be used at page fault time\nfor the new COW pages, while pgprot_t value passed in\nremap_pfn_range() is used for the initial page table entry.\n\nHence:\n* Do not add _PAGE_SPECIAL in vma, but only for remap_pfn_range()\n* Also remap_pfn_range() will add the _PAGE_SPECIAL flag using\n  pte_mkspecial() call, hence no need to specify in the driver\n\nThis fix resolves the page accounting warning shown below:\nBUG: Bad rss-counter state mm:c0000007d34ac600 idx:1 val:19\n\nThe above warning is triggered since _PAGE_SPECIAL was incorrectly\nbeing set for the normal kernel COW pages.\n\nSigned-off-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>\nAcked-by: Jeremy Kerr <jk@ozlabs.org>\nSigned-off-by: Michael Ellerman <mpe@ellerman.id.au>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/d8ea782b56d9d2c46a47b3231cfd16ecfb538c60"},{"sha":"14f21189df33bc972455d6a0ed875aa68718d7fc","author":{"email":"e4d6a675ffd00e654bdb5954d1e8457eb138a1df@samsung.com","name":"Maninder Singh"},"message":"cxl/vphb.c: Use phb pointer after NULL check\n\nstatic Anlaysis detected below error:-\n(error) Possible null pointer dereference: phb\n\nSo, Use phb after NULL check.\n\nSigned-off-by: Maninder Singh <maninder1.s@samsung.com>\nAcked-by: Ian Munsie <imunsie@au1.ibm.com>\nSigned-off-by: Michael Ellerman <mpe@ellerman.id.au>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/14f21189df33bc972455d6a0ed875aa68718d7fc"},{"sha":"27ea2c420cad57386c25668cb9a9f0f082635586","author":{"email":"cf1af486034ab0119a20f38a060e40da25f4cea3@axtens.net","name":"Daniel Axtens"},"message":"powerpc: Set the correct kernel taint on machine check errors.\n\nThis means the 'M' flag will work properly when the kernel prints a backtrace.\n\nSigned-off-by: Daniel Axtens <dja@axtens.net>\nSigned-off-by: Michael Ellerman <mpe@ellerman.id.au>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/27ea2c420cad57386c25668cb9a9f0f082635586"},{"sha":"8c00d5c9d3e7452658dda55024485d52919ebfdd","author":{"email":"cf1af486034ab0119a20f38a060e40da25f4cea3@axtens.net","name":"Daniel Axtens"},"message":"cxl: Test the correct mmio space before unmapping\n\nBefore freeing p2n, test p2n, not p1n.\n\nSigned-off-by: Daniel Axtens <dja@axtens.net>\nAcked-by: Ian Munsie <imunsie@au1.ibm.com>\nSigned-off-by: Michael Ellerman <mpe@ellerman.id.au>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/8c00d5c9d3e7452658dda55024485d52919ebfdd"},{"sha":"eab861a7a52208868637f47a92caa926ddadd9c7","author":{"email":"14deb5e5e417133e888bf47bb6a3555c9bb7d81c@samba.org","name":"Anton Blanchard"},"message":"powerpc: Add plain English description for alignment exception oopses\n\nIf we take an alignment exception which we cannot fix, the oops\ncurrently prints:\n\nUnable to handle kernel paging request for unknown fault\n\nLets print something more useful:\n\nUnable to handle kernel paging request for unaligned access at address 0xc0000000f77bba8f\n\nSigned-off-by: Anton Blanchard <anton@samba.org>\nSigned-off-by: Michael Ellerman <mpe@ellerman.id.au>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/eab861a7a52208868637f47a92caa926ddadd9c7"},{"sha":"aaf6fd5c75eb4aa734ec2062deab371633c3655f","author":{"email":"cf1af486034ab0119a20f38a060e40da25f4cea3@axtens.net","name":"Daniel Axtens"},"message":"powerpc/ppc4xx_hsta_msi: Include ppc-pci.h to fix reference to hose_list\n\nAn earlier commit referenced 'hose_list' in sysdev/ppc4xx_hsta_msi.c.\nhose_list is defined in ppc-pci.h, which was not included in that\nfile. Include it, fixing the build for the akebono defconfig used\nby the kbuild test robot.\n\nFixes: f2c800aaceb6 (\"powerpc/ppc4xx_hsta_msi: Move MSI-related ops to pci_controller_ops\")\nReported-by: kbuild test robot <fengguang.wu@intel.com>\nSigned-off-by: Daniel Axtens <dja@axtens.net>\nSigned-off-by: Michael Ellerman <mpe@ellerman.id.au>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/aaf6fd5c75eb4aa734ec2062deab371633c3655f"},{"sha":"a8956a7b7232da5f4ce4a305c72a54cc5e4a8307","author":{"email":"e9adbcf81c8a36ccc628e09bc92d0e25e1c8e501@popple.id.au","name":"Alistair Popple"},"message":"powerpc/powernv: Fix opal-elog interrupt handler\n\nThe conversion of opal events to a proper irqchip means that handlers\nare called until the relevant opal event has been cleared by\nprocessing it. Events that queue work should therefore use a threaded\nhandler to mask the event until processing is complete.\n\nSigned-off-by: Alistair Popple <alistair@popple.id.au>\nTested-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>\nSigned-off-by: Michael Ellerman <mpe@ellerman.id.au>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/a8956a7b7232da5f4ce4a305c72a54cc5e4a8307"},{"sha":"4b59246d9aeaac71f5f7a29459cd2abe32c527e6","author":{"email":"66d3c5fdaeea7ff1f996ad04f2c45e08ab38e2f5@linaro.org","name":"Ard Biesheuvel"},"message":"arm64: remove another unnecessary libfdt include path\n\nPatch 63a4aea55670 (\"of: clean-up unnecessary libfdt include paths\")\nremoved all explicit libfdt include paths, since those are no longer\nnecessary after the latest dtc upgrade. However, this one snuck in\nduring the same merge window. Remove it.\n\nSigned-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>\nSigned-off-by: Catalin Marinas <catalin.marinas@arm.com>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/4b59246d9aeaac71f5f7a29459cd2abe32c527e6"},{"sha":"3446af31b721d839c69f8fc70b8a434df6176a64","author":{"email":"7b3f462eae097bd3493e4fb13e7f25607e8f5cfb@xilinx.com","name":"Suneel Garapati"},"message":"arm64: defconfig: Add Ceva ahci to the defconfig\n\nThe Ceva ahci controller is available on the Xilinx Zynq UltraScale+\nMPSoC.\n\nSigned-off-by: Suneel Garapati <suneel.garapati@xilinx.com>\nSigned-off-by: Michal Simek <michal.simek@xilinx.com>\n[catalin.marinas@arm.com: removed unnecessary defconfig changes]\nSigned-off-by: Catalin Marinas <catalin.marinas@arm.com>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/3446af31b721d839c69f8fc70b8a434df6176a64"},{"sha":"b32aadc1a8ed84afbe924cd2ced31cd6a2e67074","author":{"email":"fac76aafe57fc9acb24e05f5dba9b58a43a0a645@linux.vnet.ibm.com","name":"Shreyas B. Prabhu"},"message":"powerpc/powernv: Fix race in updating core_idle_state\n\ncore_idle_state is maintained for each core. It uses 0-7 bits to track\nwhether a thread in the core has entered fastsleep or winkle. 8th bit is\nused as a lock bit.\nThe lock bit is set in these 2 scenarios-\n - The thread is first in subcore to wakeup from sleep/winkle.\n - If its the last thread in the core about to enter sleep/winkle\n\nWhile the lock bit is set, if any other thread in the core wakes up, it\nloops until the lock bit is cleared before proceeding in the wakeup\npath. This helps prevent race conditions w.r.t fastsleep workaround and\nprevents threads from switching to process context before core/subcore\nresources are restored.\n\nBut, in the path to sleep/winkle entry, we currently don't check for\nlock-bit. This exposes us to following race when running with subcore\non-\n\nFirst thread in the subcorea\t\tAnother thread in the same\nwaking up\t\t   \t\tcore entering sleep/winkle\n\nlwarx   r15,0,r14\nori     r15,r15,PNV_CORE_IDLE_LOCK_BIT\nstwcx.  r15,0,r14\n[Code to restore subcore state]\n\n\t\t\t\t\t\tlwarx   r15,0,r14\n\t\t\t\t\t\t[clear thread bit]\n\t\t\t\t\t\tstwcx.  r15,0,r14\n\nandi.   r15,r15,PNV_CORE_IDLE_THREAD_BITS\nstw     r15,0(r14)\n\nHere, after the thread entering sleep clears its thread bit in\ncore_idle_state, the value is overwritten by the thread waking up.\nIn such cases when the core enters fastsleep, code mistakes an idle\nthread as running. Because of this, the first thread waking up from\nfastsleep which is supposed to resync timebase skips it. So we can\nend up having a core with stale timebase value.\n\nThis patch fixes the above race by looping on the lock bit even while\nentering the idle states.\n\nSigned-off-by: Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com>\nFixes: 7b54e9f213f76 'powernv/powerpc: Add winkle support for offline cpus'\nCc: stable@vger.kernel.org # 3.19+\nSigned-off-by: Michael Ellerman <mpe@ellerman.id.au>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/b32aadc1a8ed84afbe924cd2ced31cd6a2e67074"},{"sha":"3f8dc44d88d3e86178eb9322c779c599f3745b21","author":{"email":"7b0ab45a730e48a69239010b5b8fe5fa4e8eaac6@neuling.org","name":"Michael Neuling"},"message":"cxl: Fix refcounting in kernel API\n\nCurrently the kernel API AFU dev refcounting is done on context start and stop.\nThis patch moves this refcounting to context init and release, bringing it\ninline with how the userspace API does it.\n\nWithout this we've seen the refcounting on the AFU get out of whack between the\nuser and kernel API usage.  This causes the AFU structures to be freed when\nthey are actually still in use.\n\nThis fixes some kref warnings we've been seeing and spurious ErrIVTE IRQs.\n\nSigned-off-by: Michael Neuling <mikey@neuling.org>\nAcked-by: Ian Munsie <imunsie@au1.ibm.com>\nSigned-off-by: Michael Ellerman <mpe@ellerman.id.au>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/3f8dc44d88d3e86178eb9322c779c599f3745b21"},{"sha":"b6cfb277378ef831c0fa84bcff5049307294adc6","author":{"email":"ea56e52dba8693f1d9418ca2e0284afc905636c4@.linaro.org","name":"Al Stone"},"message":"ACPI / ARM64: add BAD_MADT_GICC_ENTRY() macro\n\nThe BAD_MADT_ENTRY() macro is designed to work for all of the subtables\nof the MADT.  In the ACPI 5.1 version of the spec, the struct for the\nGICC subtable (struct acpi_madt_generic_interrupt) is 76 bytes long; in\nACPI 6.0, the struct is 80 bytes long.  But, there is only one definition\nin ACPICA for this struct -- and that is the 6.0 version.  Hence, when\nBAD_MADT_ENTRY() compares the struct size to the length in the GICC\nsubtable, it fails if 5.1 structs are in use, and there are systems in\nthe wild that have them.\n\nThis patch adds the BAD_MADT_GICC_ENTRY() that checks the GICC subtable\nonly, accounting for the difference in specification versions that are\npossible.  The BAD_MADT_ENTRY() will continue to work as is for all other\nMADT subtables.\n\nThis code is being added to an arm64 header file since that is currently\nthe only architecture using the GICC subtable of the MADT.  As a GIC is\nspecific to ARM, it is also unlikely the subtable will be used elsewhere.\n\nFixes: aeb823bbacc2 (\"ACPICA: ACPI 6.0: Add changes for FADT table.\")\nSigned-off-by: Al Stone <al.stone@linaro.org>\nAcked-by: Will Deacon <will.deacon@arm.com>\nAcked-by: \"Rafael J. Wysocki\" <rjw@rjwysocki.net>\n[catalin.marinas@arm.com: extra brackets around macro arguments]\nSigned-off-by: Catalin Marinas <catalin.marinas@arm.com>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/b6cfb277378ef831c0fa84bcff5049307294adc6"},{"sha":"99e3e3ae332b6ca91d5c444ea7849f367f5e5a76","author":{"email":"ea56e52dba8693f1d9418ca2e0284afc905636c4@linaro.org","name":"Al Stone"},"message":"ACPI / ARM64 : use the new BAD_MADT_GICC_ENTRY macro\n\nFor those parts of the arm64 ACPI code that need to check GICC subtables\nin the MADT, use the new BAD_MADT_GICC_ENTRY macro instead of the previous\nBAD_MADT_ENTRY.  The new macro takes into account differences in the size\nof the GICC subtable that the old macro did not; this caused failures even\nthough the subtable entries are valid.\n\nFixes: aeb823bbacc2 (\"ACPICA: ACPI 6.0: Add changes for FADT table.\")\nSigned-off-by: Al Stone <al.stone@linaro.org>\nReviewed-by: Hanjun Guo <hanjun.guo@linaro.org>\nAcked-by: Will Deacon <will.deacon@arm.com>\nAcked-by: \"Rafael J. Wysocki\" <rjw@rjwysocki.net>\nSigned-off-by: Catalin Marinas <catalin.marinas@arm.com>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/99e3e3ae332b6ca91d5c444ea7849f367f5e5a76"},{"sha":"ef37566cf8d607844cee5a01597d828c8fd1a501","author":{"email":"15ce75b290ebaf27c3f9fd73ab848685ed3d8261@arm.com","name":"Catalin Marinas"},"message":"arm64: Keep the ARM64 Kconfig selects sorted\n\nMove EDAC_SUPPORT to the right place.\n\nSigned-off-by: Catalin Marinas <catalin.marinas@arm.com>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/ef37566cf8d607844cee5a01597d828c8fd1a501"},{"sha":"5caaf5346892d1e7f0b8b7223062644f8538483f","author":{"email":"2796b2a6f60f1cdadaf10e577f7c9240e2ad3d38@au1.ibm.com","name":"Ian Munsie"},"message":"cxl: Fail mmap if requested mapping is larger than assigned problem state area\n\nThis patch makes the mmap call fail outright if the requested region is\nlarger than the problem state area assigned to the context so the error\nis reported immediately rather than waiting for an attempt to access an\naddress out of bounds.\n\nAlthough we never expect users to map more than the assigned problem\nstate area and are not aware of anyone doing this (other than for\ntesting), this does have the potential to break users if someone has\nused a larger range regardless. I'm submitting it for consideration, but\nif this change is not considered acceptable the previous patch is\nsufficient to prevent access out of bounds without breaking anyone.\n\nSigned-off-by: Ian Munsie <imunsie@au1.ibm.com>\nSigned-off-by: Michael Ellerman <mpe@ellerman.id.au>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/5caaf5346892d1e7f0b8b7223062644f8538483f"},{"sha":"10a5894f2dedd8a26b3132497445b314c0d952c4","author":{"email":"2796b2a6f60f1cdadaf10e577f7c9240e2ad3d38@au1.ibm.com","name":"Ian Munsie"},"message":"cxl: Fix off by one error allowing subsequent mmap page to be accessed\n\nIt was discovered that if a process mmaped their problem state area they\nwere able to access one page more than expected, potentially allowing\nthem to access the problem state area of an unrelated process.\n\nThis was due to a simple off by one error in the mmap fault handler\nintroduced in 0712dc7e73e59d79bcead5d5520acf4e9e917e87 (\"cxl: Fix issues\nwhen unmapping contexts\"), which is fixed in this patch.\n\nCc: stable@vger.kernel.org\nFixes: 0712dc7e73e5 (\"cxl: Fix issues when unmapping contexts\")\nSigned-off-by: Ian Munsie <imunsie@au1.ibm.com>\nSigned-off-by: Michael Ellerman <mpe@ellerman.id.au>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/10a5894f2dedd8a26b3132497445b314c0d952c4"},{"sha":"442053e57a4fc58b719b6ceab60f29ef9cf4404c","author":{"email":"2ac48ee9b8f6042694a5d86ef56b8e10fe5327d1@linux.vnet.ibm.com","name":"Sukadev Bhattiprolu"},"message":"powerpc/perf/24x7: Fix lockdep warning\n\nThe sysfs attributes for the 24x7 counters are dynamically allocated.\nInitialize the attributes using sysfs_attr_init() to fix following\nwarning which occurs when CONFIG_DEBUG_LOCK_VMALLOC=y.\n\n[    0.346249] audit: initializing netlink subsys (disabled)\n[    0.346284] audit: type=2000 audit(1436295254.340:1): initialized\n[    0.346489] BUG: key c0000000efe90198 not in .data!\n[    0.346491] DEBUG_LOCKS_WARN_ON(1)\n[    0.346502] ------------[ cut here ]------------\n[    0.346504] WARNING: at ../kernel/locking/lockdep.c:3002\n[    0.346506] Modules linked in:\n\nReported-by: Gustavo Luiz Duarte <gustavold@linux.vnet.ibm.com>\nSigned-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>\nTested-by: Gustavo Luiz Duarte <gustavold@linux.vnet.ibm.com>\nSigned-off-by: Michael Ellerman <mpe@ellerman.id.au>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/442053e57a4fc58b719b6ceab60f29ef9cf4404c"},{"sha":"9958084a5275ca2e8f55c5b18729307f2f0cb53b","author":{"email":"864f124608374e06e4da1fa5d2e47ed839b95411@ellerman.id.au","name":"Michael Ellerman"},"message":"powerpc: Update MAINTAINERS to point at shared tree\n\nNow that we have a shared powerpc tree on kernel.org, point folks at that\nas the primary place to look for powerpc stuff.\n\nSigned-off-by: Michael Ellerman <mpe@ellerman.id.au>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/9958084a5275ca2e8f55c5b18729307f2f0cb53b"},{"sha":"1b42804d27b1c2623309950e9b203b11f4c67f4f","author":{"email":"1db9dd262beaa64f35756dd39531d9747b7778bb@arm.com","name":"Mark Rutland"},"message":"arm64: entry: handle debug exceptions in el*_inv\n\nCurrently we enable debug exceptions before reading ESR_EL1 in both\nel0_inv and el1_inv. If a debug exception is taken before we read\nESR_EL1, the value will have been corrupted.\n\nAs el*_inv is typically fatal, an intervening debug exception results in\nmisleading debug information being logged to the console, but is not\notherwise harmful.\n\nAs with the other entry paths, we can use the ESR_EL1 value stashed\nearlier in the exception entry (in x25 for el0_sync{,_compat}, and x1\nfor el1_sync), giving us better error reporting in this case.\n\nSigned-off-by: Mark Rutland <mark.rutland@arm.com>\nAcked-by: Will Deacon <will.deacon@arm.com>\nSigned-off-by: Catalin Marinas <catalin.marinas@arm.com>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/1b42804d27b1c2623309950e9b203b11f4c67f4f"},{"sha":"2c069a118fe1d80c47dca84e1561045fc7f3cc9e","author":{"email":"cf1af486034ab0119a20f38a060e40da25f4cea3@axtens.net","name":"Daniel Axtens"},"message":"cxl: Check if afu is not null in cxl_slbia\n\nThe pointer to an AFU in the adapter's list of AFUs can be null\nif we're in the process of removing AFUs. The afu_list_lock\ndoesn't guard against this.\n\nSay we have 2 slices, and we're in the process of removing cxl.\n - We remove the AFUs in order (see cxl_remove). In cxl_remove_afu\n   for AFU 0, we take the lock, set adapter->afu[0] = NULL, and\n   release the lock.\n - Then we get an slbia. In cxl_slbia we take the lock, and set\n   afu = adapter->afu[0], which is NULL.\n - Therefore our attempt to check afu->enabled will blow up.\n\nTherefore, check if afu is a null pointer before dereferencing it.\n\nCc: stable@vger.kernel.org\nSigned-off-by: Daniel Axtens <dja@axtens.net>\nAcked-by: Michael Neuling <mikey@neuling.org>\nAcked-by: Ian Munsie <imunsie@au1.ibm.com>\nSigned-off-by: Michael Ellerman <mpe@ellerman.id.au>","distinct":false,"url":"https://api.github.com/repos/r1mikey/linux-picoxcell/commits/2c069a118fe1d80c47dca84e1561045fc7f3cc9e"}]}