{"push_id":760803828,"size":42,"distinct_size":42,"ref":"refs/heads/hikey-mainline-rebase","head":"c8a160cb9564535f90a2258e61239edc1d53c43f","before":"13b2999dc390c6d0f68a9d3a598db6f1cf3cc7b1","commits":[{"sha":"934e91d14d093bf0b3f931e0964fc0842ba06657","author":{"email":"a38ad1fbd0b3373e0c012f4d28e16dbce652d487@linaro.org","name":"Leo Yan"},"message":"dt-bindings: mailbox: Document Hisilicon mailbox driver\n\nDocument the new compatible for Hisilicon mailbox driver.\n\nSigned-off-by: Leo Yan <leo.yan@linaro.org>","distinct":true,"url":"https://api.github.com/repos/96boards/linux/commits/934e91d14d093bf0b3f931e0964fc0842ba06657"},{"sha":"264d6093a87a96a36cd66240469ec6db561e449f","author":{"email":"a38ad1fbd0b3373e0c012f4d28e16dbce652d487@linaro.org","name":"Leo Yan"},"message":"mailbox: Hisilicon: add mailbox driver\n\nAdd Hisilicon mailbox's common driver, it registers mailbox channels\ninto framework; it also invokes low level callback functions for\nregister's related operations. Enhance rx channel's message queue,\nwhich is based on the code in drivers/mailbox/omap-mailbox.c.\n\nEnable Hi6220 mailbox driver as the first platform to use this\nframework. Hi6220's mailbox communicates with MCU; for sending data,\nit can support two methods for low level implementation: one is to\nuse interrupt as acknowledge, another is automatic mode which without\nany acknowledge. These two methods have been supported in the driver;\nfor receiving data, it will depend on the interrupt to notify the\nchannel has incoming message.\n\nNow mailbox driver is used to send message to MCU to control dynamic\nvoltage and frequency scaling for CPU, GPU and DDR.\n\nSigned-off-by: Leo Yan <leo.yan@linaro.org>","distinct":true,"url":"https://api.github.com/repos/96boards/linux/commits/264d6093a87a96a36cd66240469ec6db561e449f"},{"sha":"719f114ebd0eb62a1e23c06f2642c6423d2cd6b5","author":{"email":"a38ad1fbd0b3373e0c012f4d28e16dbce652d487@linaro.org","name":"Leo Yan"},"message":"arm64: dts: add Hi6220 mailbox node\n\nOn Hi6220, below memory regions in DDR have specific purpose:\n\n- 0x05e0,0000 - 0x05ef,ffff: For MCU firmware using at runtime;\n- 0x0740,f000 - 0x0740,ffff: For MCU firmware's section;\n- 0x06df,f000 - 0x06df,ffff: For mailbox message data.\n\nThis patch reserves these memory regions and add device node for\nmailbox in dts.\n\nSigned-off-by: Leo Yan <leo.yan@linaro.org>","distinct":true,"url":"https://api.github.com/repos/96boards/linux/commits/719f114ebd0eb62a1e23c06f2642c6423d2cd6b5"},{"sha":"421c9b2c5c081d4d448da98838dec788fa5e1631","author":{"email":"a38ad1fbd0b3373e0c012f4d28e16dbce652d487@linaro.org","name":"Leo Yan"},"message":"Revert \"clk: hi6220: enable stub clock on the platform\"\n\nThis reverts commit 6d9fac1b34f431feb21d2f066a736729a79af86e.","distinct":true,"url":"https://api.github.com/repos/96boards/linux/commits/421c9b2c5c081d4d448da98838dec788fa5e1631"},{"sha":"a99670362f21a5285d9c08252b2e52cdb3773f87","author":{"email":"a38ad1fbd0b3373e0c012f4d28e16dbce652d487@linaro.org","name":"Leo Yan"},"message":"Revert \"clk: hisi: add stub clock register function\"\n\nThis reverts commit f50c04e578b4f90bf544de63ec209422883b8cd2.","distinct":true,"url":"https://api.github.com/repos/96boards/linux/commits/a99670362f21a5285d9c08252b2e52cdb3773f87"},{"sha":"0b4d019abb9569b9c1a591a6e5825e191e42342c","author":{"email":"a38ad1fbd0b3373e0c012f4d28e16dbce652d487@linaro.org","name":"Leo Yan"},"message":"Revert \"clk: hisi: add stub clk driver\"\n\nThis reverts commit 4a70aa68c956940618cc0c4eb63cddc188e84fbd.","distinct":true,"url":"https://api.github.com/repos/96boards/linux/commits/0b4d019abb9569b9c1a591a6e5825e191e42342c"},{"sha":"ec4f1a8c969bdc5f3d8ba46f9d9985c9f32d60b2","author":{"email":"a38ad1fbd0b3373e0c012f4d28e16dbce652d487@linaro.org","name":"Leo Yan"},"message":"clk: hisi: refine parameter checking for init\n\n*of_iomap()* will check the device node pointer, and if the pointer is\nNULL it will return error code. So refine clock's init flow by checking\nthe device node with this simple way; and polish a little for the print\nout message.\n\nSigned-off-by: Leo Yan <leo.yan@linaro.org>","distinct":true,"url":"https://api.github.com/repos/96boards/linux/commits/ec4f1a8c969bdc5f3d8ba46f9d9985c9f32d60b2"},{"sha":"ce6c0db1b5391284044cf62d7b04e96afd08f0df","author":{"email":"a38ad1fbd0b3373e0c012f4d28e16dbce652d487@linaro.org","name":"Leo Yan"},"message":"clk: Hi6220: add stub clock driver\n\nOn Hi6220, there have some clocks which can use mailbox channel to send\nmessages to power controller to change frequency; this includes CPU, GPU\nand DDR clocks.\n\nFor dynamic frequency scaling, firstly need write the frequency value to\nSRAM region, and then send message to mailbox to trigger power controller\nto handle this requirement. This driver will use syscon APIs to pass SRAM\nmemory region and use common mailbox APIs for channels accessing.\n\nThis init driver will support cpu frequency change firstly.\n\nSigned-off-by: Leo Yan <leo.yan@linaro.org>","distinct":true,"url":"https://api.github.com/repos/96boards/linux/commits/ce6c0db1b5391284044cf62d7b04e96afd08f0df"},{"sha":"c7f10e40521e06359adff4c29dbaac388bbd65b3","author":{"email":"a38ad1fbd0b3373e0c012f4d28e16dbce652d487@linaro.org","name":"Leo Yan"},"message":"arm64: dts: add Hi6220's stub clock node\n\nEnable SRAM node and stub clock node for Hi6220; furthermore\nadd the CPU's clock so it will be used by cpufreq-dt driver.\n\nSigned-off-by: Leo Yan <leo.yan@linaro.org>","distinct":true,"url":"https://api.github.com/repos/96boards/linux/commits/c7f10e40521e06359adff4c29dbaac388bbd65b3"},{"sha":"c54678d40f64f0b42907f9e1ccd37f30eeef6def","author":{"email":"a38ad1fbd0b3373e0c012f4d28e16dbce652d487@linaro.org","name":"Leo Yan"},"message":"arm64: defconfig: enable config for hi6220 mailbox\n\nSigned-off-by: Leo Yan <leo.yan@linaro.org>","distinct":true,"url":"https://api.github.com/repos/96boards/linux/commits/c54678d40f64f0b42907f9e1ccd37f30eeef6def"},{"sha":"793d8c4929ca4474782a218683e4c111221ddb75","author":{"email":"2f8b50d4d9838571c9f6955972f29e9e41079295@arm.com","name":"Sudeep Holla"},"message":"ARM: introduce sp804_timer_disable and remove arm_timer.h inclusion\n\nThe header asm/hardware/arm_timer.h is included in various machine\nspecific files to access TIMER_CTRL and initialise to a known state.\n\nThis patch introduces a new function sp804_timer_disable to disable\nthe SP804 timers and uses the same for initialising the timers to\nknown(off) state, thereby removing the dependency on the header\nasm/hardware/arm_timer.h\n\nThis change is in prepartion to move sp804 timer support out of arch/arm\nso that it can be used on ARM64 platforms.\n\nSigned-off-by: Sudeep Holla <sudeep.holla@arm.com>\nCc: Russell King <linux@arm.linux.org.uk>\nCc: Daniel Lezcano <daniel.lezcano@linaro.org>\nCc: Arnd Bergmann <arnd@arndb.de>\nCc: Olof Johansson <olof@lixom.net>","distinct":true,"url":"https://api.github.com/repos/96boards/linux/commits/793d8c4929ca4474782a218683e4c111221ddb75"},{"sha":"e78e0a36b0af91b63b14f0b12cc693329419066c","author":{"email":"2f8b50d4d9838571c9f6955972f29e9e41079295@arm.com","name":"Sudeep Holla"},"message":"ARM: move Dual-Timer SP804 driver to drivers/clocksource\n\nThe ARM Dual-Timer SP804 module is peripheral found not only on ARM32\nplatforms but also on ARM64 platforms.\n\nThis patch moves the driver out of arch/arm to driver/clocksource\nso that it can be used on ARM64 platforms also.\n\nSigned-off-by: Sudeep Holla <sudeep.holla@arm.com>\nCc: Russell King <linux@arm.linux.org.uk>\nCc: Daniel Lezcano <daniel.lezcano@linaro.org>\nCc: Thomas Gleixner <tglx@linutronix.de>\nCc: Rob Herring <robh@kernel.org>\nCc: Arnd Bergmann <arnd@arndb.de>\nCc: Catalin Marinas <catalin.marinas@arm.com>\nCc: Olof Johansson <olof@lixom.net>","distinct":true,"url":"https://api.github.com/repos/96boards/linux/commits/e78e0a36b0af91b63b14f0b12cc693329419066c"},{"sha":"618219dbe62f5cd551a3b932e0810b8df1df769d","author":{"email":"a38ad1fbd0b3373e0c012f4d28e16dbce652d487@linaro.org","name":"Leo Yan"},"message":"arm64: Kconfig: select sp804 timer for ARCH_HISI\n\nSelect sp804 timer for ARCH_HISI, which is used as broadcast timer.\n\nSigned-off-by: Leo Yan <leo.yan@linaro.org>","distinct":true,"url":"https://api.github.com/repos/96boards/linux/commits/618219dbe62f5cd551a3b932e0810b8df1df769d"},{"sha":"72c941ebbefd270222e4cc345aee876f3d8ee4e5","author":{"email":"a38ad1fbd0b3373e0c012f4d28e16dbce652d487@linaro.org","name":"Leo Yan"},"message":"arm64: dts: add cpuidle states\n\nAdd cpu and cluster level's low power state for cpuidle.\n\nSigned-off-by: Leo Yan <leo.yan@linaro.org>","distinct":true,"url":"https://api.github.com/repos/96boards/linux/commits/72c941ebbefd270222e4cc345aee876f3d8ee4e5"},{"sha":"383167d76b0f58b8b7983c8a062a1e23ca7924b4","author":{"email":"a38ad1fbd0b3373e0c012f4d28e16dbce652d487@linaro.org","name":"Leo Yan"},"message":"arm64: dts: add sp804 timer node for hi6220\n\nAdd sp804 timer as broadcast timer for hi6220, so can be used by\ncpuidle.\n\nSigned-off-by: Leo Yan <leo.yan@linaro.org>","distinct":true,"url":"https://api.github.com/repos/96boards/linux/commits/383167d76b0f58b8b7983c8a062a1e23ca7924b4"},{"sha":"5f00bd7b554909847ba6b90a581d5d513f394b35","author":{"email":"bfa0a1520768723a1c60e18250fb841c342eb8d8@ti.com","name":"Grygorii Strashko"},"message":"ARM: psci: boot_secondary: replace __pa with virt_to_idmap\n\nOn some PAE systems (e.g. TI Keystone), memory is above the 32-bit\naddressable limit, and the interconnect provides an aliased view of\nparts of physical memory in the 32-bit addressable space. This alias\nis strictly for boot time usage, and is not otherwise usable because\nof coherency limitations.\n\nIn this case, virt_to_phys(secondary_startup) would return the\nphysical address of the secondary CPU boot entry point, but on such\nsystems, this would be above the 4GB limit.\n\nA separate function, virt_to_idmap(), has been provided to return a\nusable physical address for functions in the identity mapping, and\nthis must be used in preference to virt_to_phys() or __pa() to find\nthe physical entry point for functions in the identity mapping range.\n\nFor other systems, virt_to_idmap() and virt_to_phys() return identical\nphysical addresses.\n\nCc: Russell King <linux@arm.linux.org.uk>\nAcked-by: Santosh Shilimkar <ssantosh@kernel.org>\nAcked-by: Nicolas Pitre <nico@linaro.org>\nTested-by Vitaly Andrianov <vitalya@ti.com>\nSigned-off-by: Grygorii Strashko <grygorii.strashko@ti.com>\n[Mark: apply rmk's suggested rewording]\nSigned-off-by: Mark Rutland <mark.rutland@arm.com>","distinct":true,"url":"https://api.github.com/repos/96boards/linux/commits/5f00bd7b554909847ba6b90a581d5d513f394b35"},{"sha":"30093d914f552fe0e9ac95ebf544cfd0741a1c1e","author":{"email":"b07d7e22a002c36e256b78f51f1f0db608e62a13@arm.com","name":"Lorenzo Pieralisi"},"message":"ARM64: kernel: make cpu_ops hooks DT agnostic\n\nARM64 CPU operations such as cpu_init and cpu_init_idle take\na struct device_node pointer as a parameter, which corresponds to\nthe device tree node of the logical cpu on which the operation\nhas to be applied.\n\nWith the advent of ACPI on arm64, where MADT static table entries\nare used to initialize cpus, the device tree node parameter\nin cpu_ops hooks become useless when booting with ACPI, since\nin that case cpu device tree nodes are not present and can not be\nused for cpu initialization.\n\nThe current cpu_init hook requires a struct device_node pointer\nparameter because it is called while parsing the device tree to\ninitialize CPUs, when the cpu_logical_map (that is used to match\na cpu node reg property to a device tree node) for a given logical\ncpu id is not set up yet. This means that the cpu_init hook cannot\nrely on the of_get_cpu_node function to retrieve the device tree\nnode corresponding to the logical cpu id passed in as parameter,\nso the cpu device tree node must be passed in as a parameter to fix\nthis catch-22 dependency cycle.\n\nThis patch reshuffles the cpu_logical_map initialization code so\nthat the cpu_init cpu_ops hook can safely use the of_get_cpu_node\nfunction to retrieve the cpu device tree node, removing the need for\nthe device tree node pointer parameter.\n\nIn the process, the patch removes device tree node parameters\nfrom all cpu_ops hooks, in preparation for SMP DT/ACPI cpus\ninitialization consolidation.\n\nSigned-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>\nAcked-by: Hanjun Guo <hanjun.guo@linaro.org>\nAcked-by: Sudeep Holla <sudeep.holla@arm.com>\nAcked-by: Mark Rutland <mark.rutland@arm.com>\nTested-by: Hanjun Guo <hanjun.guo@linaro.org>\nTested-by: Mark Rutland <mark.rutland@arm.com> [DT]\nCc: Will Deacon <will.deacon@arm.com>\nCc: Catalin Marinas <catalin.marinas@arm.com>","distinct":true,"url":"https://api.github.com/repos/96boards/linux/commits/30093d914f552fe0e9ac95ebf544cfd0741a1c1e"},{"sha":"2ad0a21f93ebb081b0cc24bc623ecba027693738","author":{"email":"b07d7e22a002c36e256b78f51f1f0db608e62a13@arm.com","name":"Lorenzo Pieralisi"},"message":"ARM64: kernel: unify ACPI and DT cpus initialization\n\nThe code that initializes cpus on arm64 is currently split in two\ndifferent code paths that carry out DT and ACPI cpus initialization.\n\nMost of the code executing SMP initialization is common and should\nbe merged to reduce discrepancies between ACPI and DT initialization\nand to have code initializing cpus in a single common place in the\nkernel.\n\nThis patch refactors arm64 SMP cpus initialization code to merge\nACPI and DT boot paths in a common file and to create sanity\nchecks that can be reused by both boot methods.\n\nCurrent code assumes PSCI is the only available boot method\nwhen arm64 boots with ACPI; this can be easily extended if/when\nthe ACPI parking protocol is merged into the kernel.\n\nSigned-off-by: Sudeep Holla <sudeep.holla@arm.com>\nSigned-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>\nAcked-by: Hanjun Guo <hanjun.guo@linaro.org>\nAcked-by: Mark Rutland <mark.rutland@arm.com>\nTested-by: Hanjun Guo <hanjun.guo@linaro.org>\nTested-by: Mark Rutland <mark.rutland@arm.com> [DT]\nCc: Will Deacon <will.deacon@arm.com>\nCc: Catalin Marinas <catalin.marinas@arm.com>","distinct":true,"url":"https://api.github.com/repos/96boards/linux/commits/2ad0a21f93ebb081b0cc24bc623ecba027693738"},{"sha":"b465f2aa8af581e38e582b81c88e8b1a8fe18c9e","author":{"email":"1db9dd262beaa64f35756dd39531d9747b7778bb@arm.com","name":"Mark Rutland"},"message":"arm/arm64: kvm: add missing PSCI include\n\nWe make use of the PSCI function IDs, but don't explicitly include the\nheader which defines them. Relying on transitive header includes is\nfragile and will be broken as headers are refactored.\n\nThis patch includes the relevant header file directly so as to avoid\nfuture breakage.\n\nSigned-off-by: Mark Rutland <mark.rutland@arm.com>\nAcked-by: Christoffer Dall <christoffer.dall@linaro.org>\nReviewed-by: Hanjun Guo <hanjun.guo@linaro.org>\nTested-by: Hanjun Guo <hanjun.guo@linaro.org>\nCc: Marc Zyngier <marc.zyngier@arm.com>","distinct":true,"url":"https://api.github.com/repos/96boards/linux/commits/b465f2aa8af581e38e582b81c88e8b1a8fe18c9e"},{"sha":"d739be82c2a7b72e75279a34fc2ca38b9065d3e2","author":{"email":"1db9dd262beaa64f35756dd39531d9747b7778bb@arm.com","name":"Mark Rutland"},"message":"arm64: smp_plat: add get_logical_index\n\nThe PSCI MIGRATE_INFO_UP_CPU call returns a physical ID, which we will\nneed to map back to a Linux logical ID.\n\nImplement a reusable get_logical_index to map from a physical ID to a\nlogical ID.\n\nSigned-off-by: Mark Rutland <mark.rutland@arm.com>\nAcked-by: Catalin Marinas <catalin.marinas@arm.com>\nAcked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>\nReviewed-by: Hanjun Guo <hanjun.guo@linaro.org>\nTested-by: Hanjun Guo <hanjun.guo@linaro.org>\nCc: Will Deacon <will.deacon@arm.com>","distinct":true,"url":"https://api.github.com/repos/96boards/linux/commits/d739be82c2a7b72e75279a34fc2ca38b9065d3e2"}]}