This is Hardware Blackmagic, building devices with FPGAs. My name is Rodney McGee. I'm just the first speaker. Everybody up here should be at least some point interacting with you. This is a three-hour talk, kind of a long talk for DEF CON, but we try to have enough demos and stuff to keep it interesting. So our research group is called SEVORG. We're from the University of Delaware. It's in Newark, not Newark. That's New Jersey. So our interests actually are in custom hardware, high speed interconnects, basically designing custom chips. We do a little reverse engineering, a little hardware red teaming security, and a couple members of a group that works with us do network security. Actually at SEVORG we try to learn things outside of our discipline. We find that it gives us a lot of inspiration that really puts you ahead of other people who are just learning by the book. Believe me, we have a lot of books, but you have to kind of put things together in a way that really give you insight into doing something novel. We're all about hardware. Even if it's about software, we still always come back to hardware. Traditionally, a lot of DEF CON has been focused on hardware, but if you've been at DEF CON the last couple of years, you notice there's been more hardware and a lot of emphasis on learning hardware every year. One of the things we like to say is fundamentally, no matter how good your software is, you cannot do a secure implementation on fundamentally unknown or insecure hardware. You can't make any assumptions, no matter how many levels of distraction you have. If your hardware is flawed, there will be some vulnerability introduced there. The reason why I said here fight to understand how your hardware works is because a lot of you are probably big open source guys and you understand the dangers and the pitfalls of closed source software, but a lot of us easily accept almost as a cost of doing business closed source hardware. Using hardware that you basically understand nothing about, have no data sheets for, maybe you don't even know its function. That's something that is not completely unavoidable like closed source software, but I think we can make it the kind of strives in hardware that we've made in the open source community over the last years and really introduce a whole new level of understanding for hardware for the masses. So what we're going to be talking about today specifically to kind of get there is FPGAs. I'm sure a lot of you have put firmware on things, maybe edited firmware, done something custom, make something do something that it wasn't meant to do. HDL, hardware descriptor language, basically lets you design the hardware that you want, not the hardware that you have. FPGAs are flexible in that way. So we're actually going to be covering a lot of different things. I'll be covering basic FPGA and digital technology. We're actually going to be having contests throughout the thing for like giveaways. We got some FPGA demo boards, we got some Intel swag, we got some, and actually have a net book that we got from Intel to give away and then actually be the last talk there. We're going to go through the Xilinx software for designing FPGAs. We're going to show demos for that. We're going to show GHDL, which is actually an open source way that you can learn how to code hardware descriptor language. Then we're going to talk about the EDK, which is the next level up and far off it's a little bit more extract. You can actually write C code that runs on an FPGA. And then we're going to talk about Furcon, we're going to talk about running Linux on an FPGA, and we're also going to talk about hardware from Altera, or actually software from Altera, and some hardware demo board that they sent us. At the very end, we'll announce who won the net book. So let's start out with what is an FPGA? So an FPGA is a, obviously it's a semiconductor, it's a chip, but specifically it's a field programmable gate array that contains logic blocks that can be reconfigured. This basically allows an FPGA to be any kind of device you can imagine, obviously within the constraints of the actual FPGA itself. There is speed limits, there's complexity limits, and the more you spend on an FPGA, the more you basically get out of it. FPGA design covers modern FPGA design. This is kind of new, it actually covers hardware and software design. So that's why I started talking about the EDK. You can actually write CCO that runs on a microprocessor that you actually instantiated on the chip. And so if you're not familiar with FPGAs, you might not know that there are a lot of different things. If you have Verizon Fios, every one of your set top boxes has an Altera FPGA, even in the HD boxes. Lots of networking equipment uses FPGAs, and the reason why they do that is for flexibility. A lot of times you'll have a card that'll plug into the front, and on the back plane they'll actually have FPGAs that basically allow it to be a totally different networking standard. Also, boring things, even like printers have FPGAs. Another talk going on right now is the new radio talk. Pretty much every software-defined radio, or most really good ones, have a FPGA on them, and lots of analog digital converters. Digital analog, actually.  They don't have to use field-grammar chips, but actually the flexibility that FPGAs give you, even use them on projects that you have a large budget for. So you can find them there. And one of the other uses for FPGAs is hardware accelerator cards. Schmucon is actually a hacker conference out in D.C. And a couple years ago, a guy gave a talk on cracking web and WPA keys with FPGAs. And you can see the speed up there between, this is just running on a PC. There's two different processors. There's a PS3, which has actually like 6, what they call SPUs for doing parallel processing. And there's actually a fairly middle-of-the-road, kind of low-end FPGA. And that's how many keys it's able to get through. And the same story with WPA. There's actually the different, two different models of complexity of FPGAs. They're just basically about the same size, but they have more parallel units in them that you can take advantage of. So FPGAs can basically help you a lot in that kind of sense. So what are your choices for digital system development? Well, you can get a high-end processor. They're really easy to write code for. I mean, there's endless languages and endless environments that you can code for processors. The newest and the best ones are expensive. The performance, when I say okay, what I mean is normally on a processor, you're not utilizing the whole thing. Even if you're utilizing all the cores in your modern process, there's a lot of units that are sitting there unused. And they can be fairly power-hungry when you're actually using them. Of course, they've come a long way with sleeping for laptops, being able to get a lot more hours out of your usage. And then there's something kind of new, actually, that's come out in the next couple of years, is specialized parallel hardware. Of course, OpenGL has been around forever, and OpenGL is very specific usage that allowed you to do massively parallel video systems.  But something new kind of is... Nvidia came out with CUDA, and it got standardized around OpenCL. And what that allows you to do is basically bring the power of the parallel processor of a video card into the desktop world so that you can basically take advantage of the hundreds of different parallel processing units on a video card to basically do operations that are not very single-threaded. And if you know that next to the processor, these things can be like pretty hefty power-hungry monsters, too, actually. But what you're somewhat restricted is the structure. They're still fundamentally designed for doing video card stuff. So if your parallel problem can be fit into that kind of problem, then they're great. But if not, then you're going to run into some flexibility problems. So that's actually kind of exciting. And for a lot of people, that's going to bring a lot of parallel performance to computers over the next couple of years. And actually, the next option here is an ASIC, which that's basically a custom chip. So big companies who do high volume, they design their own chips that do exactly what they want them to do. They're very high performance. They're basically the best performance you get. The entire chip is optimized for doing one specific thing or a few specific things very well. They're expensive to manufacture unless you're making millions of them. So in that sense, they're kind of out of the reach for the individual. And then there's FPGAs. So once you buy them, you program them. They're obviously easier to design. They're high performance if your problem can be parallelized, that is. And for doing the same job, they're lower power than a processor. So in embedded design, an FPGA pretty much can do all of this area. And you can even do it within the FPGA design tools. You can substitute out parts that you want there. But fundamentally, the only layer you're not messing with is basically making the PCB board that you actually put them on. You can do that too, but that's up to you. And so FPGAs is kind of very vertical in that sense where you can do a lot all the way from bottom to the top. So when you design FPGAs, you start out with what you want to do. You can either actually enter a schematic. You can actually have the series of digital logic gates that you actually want to make. You take them and you can actually put them in a schematic or you can write HDL source code. And then you have a series of tools, basically. These tools are kind of like they have analogs in the real world. That's basically like logic analyzers and things like that that basically make you to be able to debug your very complicated designs. And the way you test them is you use test benches. And this is a lot like... This is actually a lot of you who've learned coding in the last couple years. This is like a big thing they do now, test-oriented programming. And there's basically two big languages in HDL. There's VHDL and Verilog. So let's start out with something fairly simple. If you've never seen VHDL before, I'm going to try to walk you through it. This is basically kind of in C, kind of the libraries you're using. There's only a couple of standard libraries that come with HDL. They basically do some simple things like you can do adding and handle certain data types. This here you can think of as like the .h file. This kind of says like what basically inputs and outputs you have out of a digital entity. And you can see here that we have a A, B, C, D that are both inputs. They are a single bit, which is why they're standard logic. You have S there, which is actually a vector. You can think of that as like an array, pretty much the same thing. It's actually only two bits, which you can see those two bits right there. And this is the output. This is a 4 to 1 MUX.  And this is actually the code for the HDL. So this is what they call architecture in VHDL. So basically you can see the cases here. If it's 0, 0 on the select bits, you'll get A. If it's 0, 1, you'll get B. You could either say 1, 1 or others here. It's kind of like whether you have an else or just a series of ifs. And the most important thing here is this code is not... If there was more code here, it would be more clear, but this code is not executed sequentially. This is not like C. This actually happens in parallel on all of them at the same time. So this line up here, process, is actually pretty important. Even if you don't have it here, it's kind of implied. Process actually says when any of these things change, this code, so to speak, should re-execute. Or in other words, the output should change. So this is actually how you control a... When a new value comes in. You could also have a clock. This is actually asynchronous logic, which means it has no clock. This is the other language called Verlog. Very similar idea. Same implementation. Here's the basically structure of what's inputs, what's outputs, what's the variable. Over here, you have the same implementation. This might be a little confusing, but what this actually says is, is a base two, what this is and that, and whether those match and whether you get A, B, C, D. Same idea though. And look, there's actually the equivalent line to process. You have that in Verlog right there.  And what that actually means is when it takes it and it actually puts it into a series of gates that actually implement what you are trying to design. And then you take those pieces, those logical blocks that you've developed and then you connect them together into pieces that function together. And so that's actually called the net list. The next thing you do is implement your design. So now that you've actually kind of compiled it, if you will, you actually have to say, well, this is going on a specific FPGA. This FPGA has this resources available to you and how do I map that design onto these resources? For example, some FPGAs have digital adders on them. Some of them have a limited number of them, but an adder can also be made up of a series of more basic gates. So this is going to take your design and actually put it onto a real FPGA. This is actually compiling it, you know, for a specific architecture would kind of be the same idea if you're taking these C analysts of things. And the place and route is pretty important. That actually is how you connect the different logical pieces on your board to other pieces. And one more important thing is eventually you're going to be outside of the FPGA and then you need to know your I.O. standards of what you're interfacing with. Actually, that's something you need to consider before you even select an FPGA is, does this have the number of I.O. pins I need to be able to do what I want to do? And most of the time, you can only, you cannot mix different I.O. standards on what they call bank, which is a grouping of I.O. pins. And so you need to kind of plan out before you select an FPGA which one that you're actually going to go with and make sure it does and has the number of output pins you need. And actually what I wanted to say here is that each step where it actually is getting closer to the real implementation, you're actually getting more real world numbers in here. For example, you're actually, after mapping, you'll have what they call a clock to state propagation delay of 1.2 nanoseconds. Well, what does that mean? Well, that means after you change the inputs, when do the outputs come out to the place where you expect them to be? And then as you get farther to the actual real design, this is actually going to increase. So this thing has so many gates in it. And how long does it take to get from the input side to the output side? Well, then how long does it take to get from where it's outputted to the next component that it's going to go to, maybe to the other side of the FPGA? And of course, you're talking nanoseconds here, so you are talking about numbers that matter for high speed. Then once you get your design ready, you're actually going to have to program the FPGA. There's a lot of ways to program an FPGA. There's JTAG, USB. You can program it with Flash. You can have other kinds of programmable memory. You can have an FPGA program on boot. At some FPGAs, you can actually reprogram parts of them while they're running in some FPGAs, if you look for those features. So that you can dynamically adjust what actual digital circuit you're actually implementing to kind of have modes, you know, basically. Without actually affecting the other side of the FPGA. And the rest of the talk is actually going to be we're going to go through different softwares, hands-on demos. It's basically the same idea, but it's going to be on different implementations or different, you know, different companies to do things, call things, different things. We're going to go through writing some simple VHDL, writing some C code for... Well, not so much writing a C code, but showing how you would use the EDK. And as a part of that, you actually see how to do high-speed interconnects between functional units. And I also want to say that you can get one of these demo boards for, like, less than $100. And you can spend a lot more on them also, just pretty much like anything. And we actually have a demo board over there that actually has a touch interface and a five megapixel camera, which is actually pretty cool. And like I said, we have some stuff that we'll be giving away, too. So I think that's it for me. Now we're actually going to go to the Xilinx ISE. Contest, okay. So we're going to switch here. There'll be a lot of switching. Make sure you start the presentation. Okay. Hello, everyone. I am Corey Lange. I'm an undergraduate at the University of Delaware. And I'm going to be the one who's giving away stuff today. So when you see me, that's right. Yay, me. Okay. When we get this thing up here, see it maybe something. Did anyone read that really quick? Okay. So how the contest is going to work. We're going to put a question up on the screen. You're going to have about five minutes to write down your name, a claim password that you're going to have to come up so we don't have, you know, five people named Spartacus coming up trying to claim the same thing. And your answer on a contest form. People are my lovely cohorts, all wearing Seavorg t-shirts. We'll be handing out slips and collecting them when you're done. And we will draw the winning slip from the correct answers. So it's kind of a lottery, but you have to get the question right to be entered. The winner will be announced and you'll get your prize at the start of the next contest session. And disclaimer, we reserve right to be judge, jury, executioners, and all contest matters and decisions. Also, you can take this time. We'll be having four of these throughout the talk, since it's throughout talk. Stretch your legs, get up, move around, but don't go anywhere because there's a lot of cool stuff. So up for grabs on this first contest, we have a Spartan3 FPGA demo board, and some intel swags and travel mugs and t-shirts. So we'll, some of the Seavorg people will be around handing out entry slips. And the question for the first contest is, what is the approximate visible bandwidth of the human eye? So you guys have about, you know, five, ten minutes to answer questions and when we'll let you know when the contest is closed. Okay, just raise your hand if you want to contest slip. We'll be walking all around. And we'll have a lot of people walking around, so. Actually, do you have any questions about the first contest? Yeah, if anyone has any questions, you know, stand up and... Stand up, because we already have hands up. Yeah, so we're, unless you want to raise both hands for a question, I don't know, so. For this... Units, give it in Hertz. Give it in some kind of frequency. Preferably Hertz. Or some, you know, scientific prefix with Hertz. Nanometers is not okay, that's a wavelength. Do all of you have the question memorized? Can we change the picture? All right. It is. There are some people over there. It is. There are people on the, Josh. Josh. When this gets to six. If you've got an answer, keep your hands up, but we'll get to you. I think we're going to start the next one now. All right. Hi, everybody. My name is Tyrell, and Ryan's going to be giving a demo. So we're going to be talking about the Xilinx IC a little bit. So a basic overview of the IC is it's the program that takes your VHDL, your Verilog, your schematics, and it will turn it into... It'll give you the tools needed to turn it into something that your FPGA will understand or turn it into a bit file. So the web pack is completely free. You can download it at this link. I believe our slides are going to be up on our website. Yep. So here's some basic information on the Spartan III board. We're going to be demoing. It's got the XC3S500E Spartan FPGA. 2032 user IO pins. There's all kinds of memory with the PROM, DDR-SDRAM, Nord Flash and Zero Flash. And then some other key things. It has a VGA, DisplayPort, Ethernet, RS232, and then some LEDs, which is push buttons. Here's a quick picture showing you where these things are. So when we give the demo, we're actually going to be showing the board up on the screen so you can kind of see what's actually up on there. So here's the design flow for designing software. Basically, to begin with, you plan and budget out your resources. Make sure you have enough of lookup tables, flip flops, serial ports, Ethernet. Make sure you have everything you need to actually implement what you're trying to do. And then I'm sure a lot of you guys are programmers, so it's just basically writing the code. Then you'll synthesize it to create the net list, which Ronnie talked about a little bit and I'll talk about it a little bit more. And then you do the functional simulation and implement timing simulation, make the bit file, and configure FBGA. So here's what the IEC looks like. It has all the tools you need to perform all the steps I just showed in the design flow, which we'll talk about more in the next couple of slides. So it's pretty compact and everything's right there for you. It makes it simple. So to begin with, you just take your source type, which can be a schematic, state diagram, VHDL, verilog. You got tons of options which you can read on the side over there. And then you have to have a test bench. The test bench is just basically, a lot of people will test their code, just putting random inputs in, making sure it comes back out the way they want it. So that's pretty much what the test bench is for all of this. So like I said, you have to make a netlist file, which Xilinx has their own tool. They also have support for a lot of third-party tools, which can be nice at times. And so this is the netlist file. Basically what this is, is over here, where you see SW0 through 3 and LED7 through 0. These are the logical names, so kind of like the variable names that you use in your code. And these locations here are the actual spots on the board, or the traces where it will hook up to. So when you see the board later, we'll show you L13 is right under one of the switches. So this netlist file, when you process it, it allows the FPGA to know, whenever we talk about SW0, that signal will go to L13. And Ronnie talked about the IO standards. You have to list those for all the ones that we're using, we'll be using LVTTL. And then these are some other options which are specific to whatever piece of hardware you're using. So for the implementation, you are going to be most likely using a lot of different pieces of hardware, which means there could be multiple netlist files. So to begin with, to translate it, you'll take all these netlists and put them together. This is because they're all going to be using the same board, hardware sets, so it makes sense to put them all together so you can see how they interact. Then the mapping is you'll take those logical, from the previous slide, you'll take the logical, the SW0 or the LED7, and you'll actually map them to the trace on the board. And then you'll actually place them around, you'll make sure the connections are good on the chip and you'll get some timing data and some reports from that. So for the configuration, you can make a file that the FPGA understands, which in this case is a bit file. So you'll put it, you'll make a bit file, you'll download it to the board, which you can download it right to the P-ROM, and it'll boot off that. It'll boot off that, and you can leave it there and turn it on and off, and everything, the program will be there to run right off that for you. So this is a little about the simulation. The added test bench is basically you add a test bench with your input and you make sure your output's coming out like I said before. The behavioral simulation is where you will test just the logic. You'll make sure your units or your logical units are actually making sense. So if you say if switch one is high, then LED1 should be on. If switch one and switch two are high, LED3 should be on. You just make sure that works out how you expected it. The timing simulation is a little more tricky because you're working with hardware, not software. As we already mentioned before, hardware is kind of working in parallel. When your signal gets sent there, it's going to work. Then it's not going to wait until the previous step, like in software, you do this, then you do A, then you do B, then you do C. So the timing simulation is you may think you have everything working great, but then as soon as you put it through the timing, everything breaks up. So you have to make sure you get all the timing right as it's going when you expect it to be going. This is just a little bit about the design data. The nice thing is it'll give you reports in here. So over here is a list of all the reports, some options. And up here it gives you a general overview of the project, the name, the target device, and that kind of things. Here is device utilization, which I'll talk about in the next slide. Down here are just some constraints you can set and some more reports. So the design utilization, our device utilization can be nice because it'll show you what you've already used in design. So here you're using four flip-flops of the available 27,000. 27,000, so you only use 1%. So it's nice when you're making a design to make sure you're not using up all your resources. And if you need to go back and change your design and you see you're using up 99% of a resource, you can take that into consideration when you redesign to try to either redesign it and optimize it or redesign it another way so you can add stuff without using all your resources. So now Ryan's going to give a demo of all this with some switches and LEDs and then a nice VGA to show you that the VGA actually works. I also wanted to add that if you guys have any questions at all during this, it's kind of a long talk, so feel free to ask them even if during the demo sessions if you have. Just a quick question about something we said that you want to know something more. Okay, so I'm actually going to walk you guys through a very simple hardware design with Xilinx ISE. So I'm going to go ahead and start that out now. So we're going to basically create a design that just has some simple gates and uses switches and LEDs. And one of the most important things when you're designing this is to take into consideration what pins are connected where. Like he was talking about the net list. So in our case we're using a demo kit board not a custom design board. So they have all that stuff already mapped out for you which is kind of nice. So we can just go here and say okay, I want to use the switches, the slide switches and say UCF location constraints and actually we'll give you right the nets that you need and you can just select those and copy and paste them into your files. So we'll be going back to that later. We're going to start a new project and we'll just call it SimpleDeafCon. And it looks like this is all set okay. Spartan 3E, that is all actually written on the board. Whatever demo board you have you can just kind of take a look at it. Take a look at the FPGA in the center and it has all this timing information and stuff like that. And we're going to create a new source file and we're just going to call it SimpleLED and that will be a VHDL module. And we'll add that to the project. And this is where you tell it basically what is coming in this module and out of this module. And in our case we're going to have switches that are going to be inputs and they're going to be a bus and this is the most significant bit we'll say three down to zero. So there's basically a vector of four inputs that are switches and we can address them as SW0, SW1. And our LEDs are going to be our output. So we say direction out and a bus. There's eight of those. So we'll say seven down to zero. It's asking me if it exists. If it doesn't exist do I want to create it? And no existing sources. We'll create a project. Okay and then the next most important thing is to create the netlist file, the constraints file. So we say new source and pick implementation constraints file and I'm just going to call it constraints. That's going to pop up here. And I'm going to say they have like a built in constraint editor but it's easier to just do this in text since Sylinx already gives them to you. So you can say edit constraints and we can just copy this right from here, the switches and paste it right in there since we called them the same thing. It's really important that your ports in your VHDL file have the same names as the nets in your constraints file because it uses those to map the two together so it knows that they're the same thing. So then we're going to add the LEDs to that too. So we have discrete LEDs, UCF location constraints and then we're just going to select all these and copy and paste them. So now we have our constraints file. These are the only things that we're going to interact with on the board at this point and now we can go ahead and write our VHDL file. It already kind of created an outline for us and it added in the libraries that we're going to need automatically. If you had any custom libraries that other people write online, you can go look up VHDL code online and there's a lot of other libraries you can add them in there. And we're just going to write very simple VHDL code. Now I'm going to put a process in here because it's kind of implied. We're just going to directly map hardware. What we're going to say now is LED0. We're addressing LED0. We're saying that's going to be mapped directly to and then we can do whatever we want here. So I can say switch0 and I can actually give it a hardware gate. So I can say is switch0 and switch1. Let's find out. Is that better? Okay so you can put in any kind of gate. You're basically telling it exactly what this is direct hardware mapping. So LED1 is going to be connected to a gate of switch0 or switch1. LED3 will say switch0 exclusivore switch1 LED4 let's make this 2 3 and these last four I'm just going to directly map. So we'll just say LED4 is the same as switch0. LED5 is switch1. Now it's not really case-sensitive. I'm just trying to make them look the same. It's not sure about Veralog but VHDL is insensitive. Most of them, yeah. Can you use the standard stuff like ampersands and pipes and things for ands and ores and stuff? So I'm going to save that and down in the processes section I can configure target device. So it knows to start with synthesis so this is actually a pretty small design so it's not going to take very long until you start getting more complex designs like AES encryption and like VGA controllers it can take a little bit longer to synthesize and place and route your design. It's already done with synthesis it's moved on to the implement design phase and there's actually subcategories in this so you can kind of take a look it's done with translating it's moving on to mapping. A processor actually, yeah. The faster you have a computer synthesis currently is mostly a single-threaded operation on the AES at least Xilinx software and I believe so with Altair also a Pentium not so much anymore but a year ago a Pentium 4 might have done better than a slower Core 2 because it didn't take advantage of the second one but now I think the A7 would kick its ass. So now basically it's telling me Xilinx has this thing called Impact Project Manager which is basically a project to help you program through whatever means you have available here we're going to do it through JTAG it's like a USB to JTAG configuration so it's going to scan and look for a download cable and it finds the three devices that are on the Spartan 3 FPGA so it knows there's a 3500 SE a prom chip on there and a CPLD and you can see the FPGA is the first one so we're going to say program with this bit file we just created and we're just going to bypass the other two because we don't want to program them right now we don't have any configuration for them we're going to say okay that's okay and I'm going to click on this the FPGA and just click program and it just programmed the FPGA so now I'm going to actually switch this over to the video input there's other three devices those are the ones that you can use to have your FPGA program on startup the first thing on the chip on the left is the one where you can just program it instantaneously while it's powered on okay so this is our demo board here it's a demo board here I'm just going to flicker on the switches so you can kind of see the reaction of the LEDs basically what we just wrote in the HDL so these are the so the two switches on the on the left are switch 3 and switch 4 and they were directly mapped only the two LEDs so you can see them turning on and off and the first two are switch 1 and switch 0 switch 0 and 1 which we had all of the gates hooked up to so you can kind of see the LEDs react to the different gate configurations that we had yeah you can actually write your test bench before you write the code right so what you would want to do if you wanted to do simulation that's where the test bench would come into play you need a test bench to do a simulation otherwise you don't have any input so you're not going to see any output in simulation you don't actually have to create a test bench if you just want to put it into hardware and check to see if it works but when you start to get into more complex systems it almost becomes essential to create some kind of test bench so you can test individual modules of your system without having the whole thing hooked up and together usually not yeah he asked can you damage the device if it's not working correctly or will it just not work most of the time you really won't damage too many devices but you know you could be connected to a component that takes a much lower voltage level and if you're pumping a string wrong and you're pumping three and a half volts into something that isn't supposed to take three and a half volts you can potentially mess something up but if you're just dealing with the FPGA it's pretty hard to write code that destroys it you can make it warmer if you do certain things but I've never seen if you saw our talk last year we actually did a hardware trojan basically making the processor hotter and colder based on certain operations we were doing we definitely do things like that but most of the time you're getting in trouble with interfacing things outside of the FPGA with your FPGA and you're not taking all the proper IO considerations okay so I'm going to show you one other really useful thing with the Xilinx ISD I pulled some code off the internet a couple days ago just some like VHDL example VGA example code that just uses a VGA port and a 50 megahertz clock so I'm just going to do that real quick I'm going to implement that I'm going to basically pull in the code that I got off the internet and put it into ISE and make it work with the Spartan 3E board and this was actually just written for the pins on a VGA connector all you need is a VGA connector and a 50 megahertz clock and an FPGA so you could do this on any board that has those three things not just the Spartan 3E so we're going to go through the same process and I'm going to add in that source file here and put it here it's called squares.vhd and it's going to copy it to this project yep there's linux and used to be Solaris yes if there's linux version actually the EDK runs better under linux because when you install EDK under windows it installs Sigwin the Spartan 149 if any of you are still in school or educators you can get discounts from Xilinx we're giving away these boards actually so you can win it for free right now so obviously the most important thing to do is to create a constraints file first and we have to have a constraints file that includes all of these inputs that are there in this VHDL module that was we got off the internet so I'm going to create another constraints file I'm pretty sure it's a binary so whether it runs on x86 only the linux version so we're going to go back to the Spartan 3E again user guide and we're going to go to the VGA display port and pull down those constraints here is that these are named differently because this is just code that's off the internet so I'm going to dump this the Spartan 3E constraints in here but you can see that or not see because it's like gray or something but it says VGA red, VGA green whereas in our VHDL module it's called red out, green out because right now it would not know that those are the same signal that we're talking about and it wouldn't map them to the FPGA so I have to make sure that those are named the same so basically I have to say this is red out here that we're talking about so I'm going to copy and paste red out into there and green out into the next one those are specific he asked what slew and drive are those kind of fields are basically very specific tweaks to IO standards so the slew would effect like how the rise and the fall from a zero to a one transition would look like what's the unit to drive current so last thing we have to add in here is the clock the Spartan 3E has 50 megahertz oscillator on it the FPGA can pretty much take anything I think there's a certain, it maxes out at some point in megahertz what clock signal you can drive into it but you can pretty much drive any clock signal you want so anything like 13 to 25 megahertz if you want and the interesting thing about this is we're feeding in a 50 megahertz clock because that's what the Spartan 3E has but it actually uses a 25 megahertz clock so this is clock 50 megahertz so I'm just going to make this the same so I'm going to save that constraints file but you'll notice in this VHDL file we have a signal here it's that we created it's kind of like a variable called clock 25 and then we have this process here so this kind of runs in parallel with any other processes that are going on and this process takes the 50 megahertz clock and turns it into a 25 megahertz clock basically that this VGA process needs in order to operate it the speed that the projector can take in so we're done here because this is a pre-made module and I'm just going to configure this a while but if you take a look here this is what VHDL is really good at it's really good at taking things that need specific timing where timing is crucial and you can kind of write in a very easy to understand language so like if the 50 megahertz clock event happens and the 50 megahertz clock is at logic signal 1 so basically if we see a rising edge we can do this and likewise you can see below you just say if this signal is at logic 0 now do this so that's where VHDL comes in really handy that you can't really guarantee timing with a microprocessor when you have want to do several things at once because you've kind of got this multi-threading and you're never guaranteed to get specific timing down and the cool thing about these processes is that they're no scheduler they're always on the CPU they're always ready to trigger there's no starvation you basically have the entire resources of the board ready to trigger at any moment based on your design so in that sense it blows away a single-threaded CPU for timing real-time programming is a joke compared to writing HDL so I'm going to program the FPGA again real quick and see what it outputs so that's this code that I downloaded off the internet this is what it outputs on the VGA port so it's basically just a bunch of squares it's like a test signal but you can see that's probably a page and a half of code to put that out on your VGA port so you can see how useful the ISE can be yeah if you're using this VGA imagine what you can do you can basically write a game code for example and run it from your just Spartan 3 board like this is a basic starter board and play it without having any other peripherals or other things yeah we actually do that in our senior design course all the students wrote their video game some of them are varying degrees more complicated than Pong less complicated than Mario but that's the kind of stuff you can do with these boards it's in the fall the senior year just one so this is the end of the demo for the ISE and I believe we have contest winners yeah we have contest winners and another contest Corey's going to come back up okay so we went through and found out who got questions right and wrong and we separated out the right answers and we're going to draw some right answers I'm going to have two of my colleagues Steve and Mike come up here and help us out the right answer is approximately 400 terahertz the human eye has about a 400 terahertz bandwidth quite impressive but we accepted anything that was kind of close to that or at least within the band up to about 790 terahertz yeah but we had to reject things like 60 hertz and bits per second and nanometers so just because Google says that it's 10 million bits per second it was what we were looking for Google isn't always right but Wikipedia is um so these guys are going to draw the answers they're going to draw the names and then you'll come up to me and give me your password and we'll give you some prizes alright who's ready come on guys wake up alright you ready? let's get a little anticipation first person is this is for the Spartan 3 board we're going to get that one knocked out right now Tom Tom what do you mean? alright come on is Tom here? raise your hand if you're Tom nope close I mean this is a highly forceable password here we're going to draw another one but this wouldn't make it past Jack the Ripper sorry let's hope for a better cheese burrito cheese burritos here alright he wins the Spartan 3 let's give him a round of applause alright Corey will authenticate him alright what do we have next core alright we're giving away some mugs alright ready exciting here we go these are official from intel the winner is Votman alright come on up we need another one alright let's give him a round of applause see this is great you guys come out early get to learn about fpga take some cool prizes home it's a win-win next guy Matt A Matt A going once going twice Chris alright we need what looks like a 2 alright alright maybe cry 2 I'm sorry alright we got 2 intel t-shirts Dave King Dave King alright coming on up alright round of applause last but not least that was a good one Joel Voss Joel are you here alright alright we got 3 more contests coming up plenty of demos we're trying to make the 3 hours go by a little smoother but please for your passwords let's make them a little bit stronger hello does not count as a good password alright thank you okay that's one contest down but uh fear not cause we got another one coming right up now so we're giving away more prizes we got another fpga board we got some intel bobbleheads and some more t-shirts question for number 2 and same rules apply guys look around for raise your hand if you need a slip you don't even know what the question is yet what are you raising your hands for it might be anyone raising their hands gives me 10 dollars right now actually this is not really a question but um you see some vhdl code right up here what does it do and keep it simple I don't want paragraphs of text although if you make me laugh I might consider it one word should be sufficient one word should do it while people are passing things out does anyone have any questions for tyrell or ryan over here about anything isa related just kind of stand up and shout it out funny funny okay well actually vhdl um probably most of the market uses verlog actually um but we learn to vhdl verlog is pretty similar the reason you use vhdl is if you do anything for the government they require it generally speaking um and some people say it's easier to learn the syntax they find it easier but it's pretty much the same if you don't have a slip in sorry if you don't have a slip and don't feel like waiting for one and you just have scrap paper feel free to just write it down with name password yeah it has some IP they call ip um intellectual property with it um you can some stuff you can actually use non-commercially for free um some stuff you can buy like mg4 encoders or you could find it online um actually a good source for libraries is opencores.org I believe they have tons of hdl code that you can just download and load up on your favorite fpga um when np complete problems get easy I guess he asked how to get started with this kind of stuff if mainly you've done software I mean if you've done parallel coding you'll you'll suddenly realize that a lot of the problems are very similar you know if you've wrote single predatory programs you might start beating your head against the wall because you you need to have control over when things happen so um writing vhdl it's completely parallelized you need to have signals for when things happen you need to have locks if you're having multiple things access the same resource um so these boards are fine to get started um I would recommend having a project that you want to do I've seen youtube videos of people programming in fpga so it plays guitar hero automatically um you know uh if you want to get started without any hardware we're going to be talking about uh but I think the really way to get interested is to say you know I I have this little thing that I want to do that I think I can actually pretty much draw out how it should work like the way you actually really complex stuff a lot of computer science guys know it because it's finite state machines you need to have good state machines like you should not have lots of nested if statements you should have um basically a state variable that kind of keeps you where you are in the current operation anything big like an AES core is going to use something like that um a lot of the old rules with a lot of the kind of behind the scene stuff and writing C kind of comes out to play when you're writing very complicated systems um as for actually purchasing hardware um the two major manufacturers of FPGAs are Xilinx and Altera um one of our sponsors Digilent um actually makes a variety of various FPGA boards um of various complexities and what not that you could get so I think we're finishing up with yeah questions or yeah actually we just installed it um we don't like how it well for the version we have it it requires a network license but if you get down with the free version it doesn't um it it makes a lot of improvements I haven't had a lot of sit down time with it to see what breaks from the other version but um overall there's it looks like a nice solid incremental build uh right now we're sticking with 10 for a while but 11 we're installing 11 on some machines yeah yeah well we'll cover that actually is that next yeah so that's so we'll get to that is anyone need to see the screen up there anymore can we move on Cory's working his way back up here it's actually his talk and Steve is back there okay so I'm actually going to not talk about something contest related this time which I'm sorry about but we'll get back to it um GHDL is a um GNU VHDL simulator if you don't have the money to shell out for a board but you want to start playing around with VHDL it's a great way to get started it use the GCC compiler technology it's command line interface there's the URL for it if you want to download it um completely free I the current version I believe is 0.26 or 0.27 we we use 0.25 don't ask me why we just do the beauty of this is as it was explained VHDL DOD approved language GHDL coded in adda another DOD language so you're going to be doing a lot of compiling sorry about that but there's a lot of binary packages out there so just a heads up so why use VHDL obviously it's free it's easy to download news um if you have linux there's a people have tried to compile it for sigwin and it just fails miserably I don't know why but there is a windows version of it I couldn't get it working but you guys might do better than that and there's no FPGA required so it's literally free you don't need any to shell out any money whatsoever um I'm also going to talk a little about the MIPS architecture which probably most people know about it's a simple 32-bit risk architecture um used all over the place to teach basics of computer architecture um a common simulator is called SPIM it's primarily used in embedded systems Tivo Cisco routers and a lot of game uh game consoles PlayStation PlayStation 2 PlayStation portable N64 you know so it's a fairly uh commonly used architecture and um for one of the courses at University of Delaware we actually designed and coded in VHDL a 32-bit MIPS multi-cycle CPU um using a finite state machine controller five-stage data path um we didn't program the full ISA but about six instructions if you want to add more obviously it's just a matter of coding more um test benches are a big thing in GHDL because you don't use a an FPGA in order to see if your uh code works you need to write a test bench for it give it inputs and try and program um see if it gives you the right outputs so it will basically a test bench will create an instance of the code you want to test create a running clock and then run it against uh input and assert correct output and hopefully what you assert is right so GHDL like I said is a command line program there are a bunch of flags up there you don't need to memorize them because there's the manual page for it um but you know you have to analyze your code you have to create your executable of your test bench you have to run your executable that last little function down there is for a program called GTK wave which we'll talk about uh Steve's going to talk about later um so this is you know the series that you have to run something you compile you analyze your if you want to make a shift register you write your shift register program and then you write your test bench for it um you analyze both of them create your executable of your test bench and run the test bench and hopefully it doesn't say error which more often than not it will say error especially when you're just getting started GTK wave is very similar to the ISC waveform simulator um but again it's open source uses GTK who to thunk um it can view you can view any of the signals and any of the code that you're running and you can view it as binary hex integers anything that's useful for you for for the vectors um you can also see for signals it just gives you a waveform so we're going to give you a quick demonstration of a uh miss micro processor that we wrote uh multi cycle 32 bit like we talked about earlier um Steve's gonna gonna run through it and just show you some code and show you it running hopefully and then show you GTK wave. Alright so a couple things now I've heard some people they've talked to me before and they've said well I don't know VHDL and that's really the you know stopping block from getting me playing with that stuff and I don't want to go out and spend the initial money to get the FPGA I didn't either until I found this it's very easy and as you're gonna see as we walk you through our little virtual machine that it's really not as hard as it may seem so here we have our CPU that as he said was done by a team of three we were undergrads we had no knowledge about the processor and uh how to make it how to code VHDL so let's see if we can zoom in control hold can we make it bigger let's full screen it does that help at all no no no great let's try this let's see and hopefully better better I know it's not perfect we'll post this code up if you want you want to do that we'll put the code up on the website so if you want to pull it down later and take a look I'll go over the basic flow so basically as basically there's a bunch of VHDL files each time you make an entity kind of like how you might make an object in coding you'll make it its own VHDL file and you'll make it its own entity so for instance when we wanted to register we would make the reg dot VHDL file now you can make these things generic and all that fun stuff all those details that are wonderfully documented online but what we're going to look at right now is the part that brings it all together the super CPU as we called it do we alright disclaimer I did not make this VM so he can't yell at me Emacs VI I know I don't want to start the war so Nano Nano I know comes default on gen 2 so when all else fails I go drop down the nano you know pico for those who want to go even older so like they've gone over you know you've got your library your includes build the CPU bring it all together as you can see in here we've got stuff like the ALU all the stuff that we coded individually right but none of this really makes sense to us at least from analyzing it because all this is done is actually glued it together imagine you have a circuit all this is done is connected the wires so now what we have is as Cory was pointing out the test bench ok now the test bench has a certain format I'll be honest I never memorized it we were given a test bench and I just kept editing it so it it makes sense eventually but it's not something I've memorized however what you do is basically this you've got a black box at this point you've got all the connectors to the outside what you do is you start hooking up inputs to them for instance here we might set the signal for the reset to one the clock to one and the done to zero right so these are the initial states we'll set it to then after this we start beginning a process let's see it's a little bit down further there it is right here where we actually start driving input into our black box alright and we start hoping that output comes out if you were to want to actually test the functionality let's look at the register ours ok what's got a test bench there's any test benches? well alright sorry about that we'll go back to this one if you wanted to actually test the functionality of something you can do things just like in C you can assert the states and stuff like that and have it print out wonderfulness like this isn't right usually you'll find out it's due to things like timing so it gives a nice wonderful output telling you at what millisecond or what exact clock cycle it failed and that's basically it it's just like getting the output from a C compiler you get a bunch of stuff and you got to hope you understand it so what we have over here is what's known as GTK wave let's full screen this alright now GTK takes a special output file that's generated by GHDL think of it more as the sort of like it took snapshots along the way of what was happening at every instance and it records that in a file and then this allows you to visualize it so here we have different inputs from our CPU actually inside it remember before I said the test bench can't test the internals it'll test the externals GTK wave allows you to view the internals view every signal inside of it we were so excited when we got that we could see inside our CPU and didn't have to keep guessing based on it was just not working so over here on the left you'll get a wonderful list we're going to ignore that moving right along it'll give you all your signals broken down from every component for instance the memory you can look at the clock cycle that's going into the memory to find out is one point that we somehow inverted the clock going into our memory wasn't fun over here you can then drag the signals that'll show up down here from the components over here and it'll give you in terms of the time unit here we've got our clock going we've got some data output we've got different stuff I think we had a component is this the super CPU okay so we've got some operations occurring and as you can see here you can see them in hex we can blow this up and view them in binary we could look at them in any type of format you want so if you've got ASCII characters going through you can look at that now you'll notice here at the top you see PS for picoseconds this is simulation we called it the super CPU because we could set whatever time we wanted and our processor ran at it so do not take this literally and translate it into hardware because it will fail as Rodney was pointing out there's a stage in the actual ISE step that'll show you where that simulation goes into reality and takes into those effects no matter no matter how much you want you will not design a 500 gigahertz CPU with your FPGA you can do it on this though it's fun although our processor was you know 2 gigahertz somehow we were able to simulate 500 gigahertz the beauty of simulation so within here you'll see that we have 32 bit right here it says 31 to 0 32 bits wide and we can decode all those lines we can even expand them and look at the individual lines if we wanted to you can look at any of the clock intervals and do wonderful things like that search, set markers, all the stuff you might do if you were doing say a GDB trace through your source code so you can think of it that way again it's available across all the platforms we've run it on OSX we've run it on Linux, we've run it on Windows so it's easy to get into GHDL, running on all those but GTKWave and kind of a forewarning there's two outputs that you can create off GHDL one will say that it's the GTKWave format one that says it's the Verilog format avoid the Verilog one, it's not fully compatible and you'll only get to see some of your things so when you go back and look at the slides Corey gave the proper argument for that so that's it I think that about wraps it up so I'm going to now that you guys sat through our lovely little discussion about that I'm going to set this back to the right screen size hopefully and yep you guessed it it's contest time again so we're going to announce our winners again we're giving away another FPGA board we're giving away some bobbleheads and some t-shirts so we're going to do the same thing we did last time and hopefully Bob or Chris shows up this time so we saw some pretty interesting answers this time some people thought that the code was a port scanner for some reason I'd love to see someone implement that on FPGA sure it's been done but no it wasn't it was actually a MUX and quite a few people got it right this time so should be interesting who gets the Spartan this time so for the Spartan 3e pseudo random Michael Bringle hey hey congratulations apparently we have some intel bobbleheads this should be good so we're going to move over to that Mike Johnson alright congratulations alright and the other bobblehead AGL there it is congratulations I'm feeling lucky alright for the t-shirt Jesse is there a few jessies alright let me check the password sorry other Jesse it's okay maybe I'll pick yours next and for the last t-shirt Kai of the Sky is it right Kai of the Sky oh right here in the front uh oh he's forgot the password doesn't have the password well does anybody else have Kai of the Sky in this room that would contest this this winner alright I don't see another one Bagelmonster that's a strong one alright well thank you and we got two more contests coming up so by now I think you guys got the general idea this time we're going to give away another board and some t-shirts and after this we're but one contest away from giving away the netbook so I hope people stay around for that the third question this time around what is the largest on-chip memory actually we haven't done that part yet we haven't done this yet apparently so I don't know what we want to do we'll just do the talk we'll do the talk and have the question after that so if anyone just read that and they're starting to think just keeping an ear out keeping an ear out it has something to do with memory so okay sorry about that okay so I'm Dr. Kai actually I teach some of the VHDL courses at University of Delaware so you guys here have taken these courses we have just to share with you we have three courses in this the first course they come in and just learn the language VHDL language and run GHDL second course they come in and they run a lot of Xilinx programs build a small video game do EDK stuff the third course we actually they design and build their PCB send it to fab it comes back the DDR RAM and then they actually build their own box it could be a game it could be a wireless LAN or something like that so it's a lot of fun so I'm going to give you a background on EDK EDK is very powerful stuff it's kind of the next level you know we're starting to see so complex systems now you know with all kinds of functions and when you're building these things you don't want to start from scratch right you want to sort of bring in a lot of components a lot of it's called IP Intellectual Property on and that's what the EDK allows you to do so the embedded development kit is a piece of software from Xilinx and that enables you to develop embedded systems it includes all the tools documentation and IP components that you need to build pre reasonable systems and it enables you to integrate both hardware which is your hardware design with the software and I'll show you how to do that now unfortunately EDK is not free it is $495 to buy and you can buy it from these two distributors and there is a 30 day evaluation that you can get from Xilinx and there's also a link at the bottom for manuals and application notes if you're interested to learn more about the EDK all right so this is going to be a little bit of repeat of what Rodney did in the very beginning so if you want to build an embedded system something that has a fixed function not a general purpose computer you have a number of choices today you can take a microcontroller and the DEF CON badge is a good example right if you were here last year the badge had a microcontroller and now this year the DEF CON is great to do it if you have a very large volume and you have a very low cost target per unit then you might actually consider building your own ASIC basically a custom integrated circuit costs a lot of money there's a lot of upfront cost but this is the way to get parts a 10 cents apart or something like that and then the fourth way which I'm going to be talking about here with you is using FPGAs using the EDK and hopefully I can illustrate to you why you would want to consider an FPGA for an embedded system so the steps that you need to take when you're designing embedded systems in an FPGA are the following you first develop your hardware design your hardware design is am I going to use a CPU what type of CPU I'm going to have is it going to have an instruction cache data cache it's going to be CR it's going to be flash what IP components do I need do I need an Ethernet controller do I need a PCI interface once you've done with your hardware design the next step would be to generate the drivers and libraries so in essence you've built a custom computer for yourself and now whoever is going to write the software will need the library files and will need the include files and you need to generate that and this thing over to somebody who knows very little about FPGAs is more at an application software level and they can develop the code that implements your application so what I'm showing here is a typical embedded system this is for the boards that we have right now and what you can see there is that the heart of it all is a micro blaze processor it's a 32 bit processor and then you would select this is a soft processor you would select it you would configure it with the options you like and it would be compiled and thrown on to the FPGA and then with that processor you would select whatever IP you need so whatever your embedded system needs you would pick the components that you need and add them to your design and the micro blaze is one of two processors that Xilinx provides for this particular board that we're giving away today that's the only option but their more powerful vertex devices can do a power PC type of processor so the micro blaze is a 32 bit processor it's soft configurable there's lots of options you can configure it to be a 3 stage or a 5 stage you can have instruction data cache you can have a floating point unit if you wish you can also have a virtual memory option you have 32 bit general purpose registers 32 of them and you have two different instruction types and this shows you some assembly language code for that now I said that one of the keys to embedded system development is these IP cores because you got to get your system built really fast and it's got to follow all these standards and the fastest way to do it is rather than writing your own code pull in these components that are pre-made and so Xilinx has created a wide variety of IP cores and you will see in the demo you can just pull them and drop them into your design you can also go to opensource.org and get the source code for these cores the stuff you get from Xilinx about half of it is free and you can use it on a royalty free basis and I believe the other half is actually either from Xilinx or from other vendors, third party vendors you can try it if you like it you can go on to that level but I believe you'll have to pay royalties for usage now one thing I want to say is this whole design is based on memory mapped IO in other words when you write code for your microprocessor the memory space the 32-bit address space is basically going to be partitioned and you're going to have your main memory is going to be in there and then your peripherals will actually be mapped into the address space so if you didn't write in your code to the memory locations you might be actually writing to RAM or you might be talking to your peripherals you may be sending stuff over the ethernet controller and the thing I want to make you aware of is that there's different latencies and penalties from the code point of view it's the same C or assembly language instruction that does the write but if you're writing to a DDR RAM your latency might be five clock cycles but I know that if you're writing a UART or a USB device that is sitting on a bus then the latency is going to be at least 50 clock cycles and if the bus is busy with other transactions it might take longer so you might wonder well why should I use FPGAs to build embedded systems so the main thing in my opinion is that it allows you to trade off RAM software let's say you write some function on a CPU and you run it and you find it's not fast enough for your application so then what you have is you have this thing called fast simplex links and fast simplex links is basically if you have something it doesn't work fast enough you go off to the side and you write a piece of VHDL code using what Ryan just showed you and that accelerates that by thousand, maybe 100,000 times and then you use a fast simplex link to actually put it inside the processor pipeline and so then you basically execute you can dispatch work for your custom functions from the processor and the latency penalty is only a few clock cycles so you can literally trade off hardware and software and you can sort of move that boundary and that's what the power of EDK is and those functions are actually implemented in hardware the ones that you want to accelerate and you can have multiple accelerators in your design the FSL bus is implemented using a FIFO so you basically right inside of your processor as soon as you get instructions to the FSL they go into a FIFO and they come out on the FIFO on the other end so if your accelerator has a latency of one clock cycle you will get that result on the next clock cycle it's really fast so for example for our project where the students build a video game they design their own graphics card right they design their graphics accelerator that drives the VGA that graphic accelerator runs on the FSL bus and you can imagine if you did it on a PLB bus where you have clock cycle latency the video game would be very stuttery so now I want to talk about the tools so there are actually three tools that are in the play when you do embedded development the tool over here is basically what Ryan showed you that's the standard ISC stuff what we have on the left here is basically an SDK it's a software development environment you're just writing C code and in the middle here is the embedded line system so how does it work well you start out here you're the computer architect and you say what do I need I'm going to need two processors I'm going to need an IO controller an ethernet port, wifi controller so you specify that what you want and then that creates a system net list and then that net list is actually hundreds of thousands of lines of VHDL code that's dropped into ISC and ISC runs compile so compile of hardware for EDK can take a very long time because you are compiling a large pieces of code then that produces the bitfile okay and you can actually take that bitfile and you can download it on an FPGA and many students do that and then they find out that it does nothing why is that it's not there right so the when you throw that onto the FPGA your processor is probably executing a NOAP loop and it's just going to sit there doing nothing so what we need is we have our embedded system it's ready to go but we haven't written the software so the next step you do is you create a board support package this is done for you automatically and this is a bunch of libraries header files that the software needs to have then you go into this SDK environment which basically has nothing to do with FPGAs and you write your code alright and that produces link files and the final step is this application called data2mem which takes your hardware image takes your software image brings them together into one unified bitfile and then that gets downloaded onto the FPGA and then you're up and running then you download that and you've got your iPod or a video game or whatever it is that you're building so to summarize the flow consists of these steps first you develop the hardware decide what pieces you want next step is to develop the embedded software and then you operate in hardware okay yes you could do it that way or you could have it hard coded right into the CPU you can actually have a file system where you load programs then you start to get an operating system land so okay can you repeat the question please okay let me repeat for the rest of the audience your question is your writing code where does that code go okay there are lots of options the FPGA itself has an onboard memory the device we have on this board has 32 kilobytes of onboard memory it's incredibly fast because it's onboard now so you can put your program there but if your program is pretty big on our particular board we have 64 megabyte DDR RAM chip so you can have it loaded there we also have parallel flash you can put your program there we have serial flash you can put your program there there are many different options when the students design their board in a class they choose some people put SD card and they put the code there the EDK supports that and you specify where you want your code to go and it kind of automatically manages all that which is really nice you know all that memory mapped IO it's done for you and you'll see that in the demo other questions and manage all that mapping and from the C point of view you're just writing to memory the question is if I was writing an embedded system that has a GUI would I do the GUI on the software side or would I do the GUI on the VHDL or hardware side I think the answer to that in my opinion would be that if you want to do accelerated GUI functions like putting up windows you could actually write some cool VHDL to really do that fast and then on the software side you would call those hardware functions can somebody else answer the question was does VHDL support a GUI framework in VHDL you're writing in hardware so you're kind of creating your own driver in a sense for VGA or whatever you're outputting to so I mean whatever functionality you wanted to include you write you could probably say about this and also kind of an aside I think the reason why this software still costs money is because it's fairly well it's been around for a while but it just started to come into its own and the Linux kernel actually a couple major revisions ago just added the micro blaze processor as one of its supported architectures so a lot of these questions are kind of open because you can run Linux on the and you got your VGA controller you don't need to write a GUI framework if you theoretically could you write your own I think that you're quickly you I think where this is going is there's going to be a lot of Linux and there's going to be a lot of reusing of code because you don't want to reinvent the wheel you don't want to code an entire operating system the idea is that you can do the hardware parts that you want to do that are very specific to your application then reuse a bunch of code that's good code so I think that we haven't done GUI programs yet on ours we're kind of in the Commodore 64 era if you will with our development of this stuff but I think that it's quickly it's going to vary over the next couple of years on the complexity of this okay so let's do a demo so here's my board it's all hooked up to the PCF I've got the power cable I have a serial port that I'm going to one of the peripherals I'm going to show you that I'm going to instantiate is a serial port so that's my serial port cable here the other peripheral I'm using there's a USB port here and it's used for programming the FPGA that's how we send the bit file and I'll show you also we'll run a hardware debugger and actually step through the processor step by step through instructions and the debugging is done over the USB port so I'm going to set that down and launch the SDK for you the EDK so yeah I'll try to increase the font size so the EDK I'm going to use a a wizard you know to sort of speed things up and I'm going to give it a directory it is really small huh can I see it on back hold on yeah we'll change that it really that's annoying here we go yes okay alright so I'm going to create a new design for this particular board so I'm going to say create a new design and this board is made by Xilinx and they make a number of different boards so I know that this is this board and I know that it's revision D so I'm going to select that alright so the wizard actually knows that this board is got this FPGA Spartan 3 and it knows all the various parts on it so now it's basically offering me to configure peripherals on this board for my design so the first thing I'm going to do is I'm going to configure a processor I'm going to use the micro blaze at a different speed I'm going to run it at 50 megahertz as I said in order to have real-time debugging capability as we write software we need to include the on-chip hardware debug module and I said earlier that the maximum on-chip memory we can use is 32 kilobytes I'm just going to go with 16 here and if our program is larger than that you'll see there is an option later to use other memory we're not going to use a cache micro blaze has about two dozen other options that you can drill down later on the wizard is kind of for simple use you know it doesn't expose all those we're not this is the peripherals you know basically what peripherals on your board do you want to use in your embedded design I'm just going to use one peripheral and that is the RS232 board that's the cable I showed you and so I'm going to uncheck you know the LEDs I'm not going to use them buttons and when I uncheck that that means there's actually not going to be hardware generated on the FPGA to interface with those components all right so you can see that DDRS DRAM I'm not going to use that and that will actually save a lot of FPGA area on the other hand if your program is very large you would want that probably there is an Ethernet interface I'm not going to use it so I'm going to uncheck that all right so at this point I have my I'm sort of at the end of this and what it's telling me here is that my standard I will go to the RS232 port and so to see it will actually run Terra Term and see it in the Terra Term window and then my boot memory that was a question earlier where is your code coming executing from the FPGA that's basically where you say okay my code will run from ILMB controller which is the local memory on the FPGA here I'm going to pick an application it's actually going to make me an application self-test application so it's going to have okay and this screen here is telling me where do you want your instructions data stack and heap so again you can put all these in different types of memories in your device okay here's your memory map you have the UART this is your serial port this is the base address for the serial port this is the hardware debugger and has a different base address here's your local memory all 32 kilobytes of local memory this by the way is your one of them is your instruction memory and the other one is your data and they basically share the same space and now I hit generate and once I hit generate it'll come back and here's my architecture basically so let's look at this this is kind of my you know main screen into the EDK what you see here I can draw a block diagram and you'll see this this is my design it kind of looks like an ipod but this is my processor and this is my memory and so this is one view this is kind of a graphical view I can also go here and I can see this system view so you can see it's probably small font but these all of these things are your components and remember I told you about the ip components if I click here on the ip catalog you can see it's again I apologize for the small font but there's lots of different components so you can go here and look at PCI here's a PCI arbiter and if I want to include that in my design all I have to do is drag it here and drop it into my hardware design and it appears now I don't think I want to do that in my case right now so I'm going to delete it yeah 495 you get everything and if I click here on some of these things where is that you will see that the ones that have a green star are free and you can use them to your heart's content but there is some paid stuff somewhere here so you can see like this right with a dollar sign and a lock you can use that but I think if you start selling it you need to pay alright so let's move on here so you've built your hardware these are the components you can add components you can go into your processor you can right click and you can configure your processor so as I said there are tons of options for microblades you have a barrel shifter just configure whatever you like once you're happy with this you can go into your hardware and you would generate netlist and what that would do is it would go and grab the VHDL or verilog for all these different components and stuff that you pay for probably is going to be encrypted verilog or VHDL because they typically don't want to show the source code and it's going to create this one netlist which is I don't know 100,000 lines and it's going to run a compile and so it's a very long compile you can see this arrow here spinning so what I'm going to do is I'm actually going to interrupt this process and I'm going to load something the same thing that's already been compiled so we can just move on quickly so here is a design and it's the same design but except that I've already compiled it alright so it's been compiled and what I normally would do after generating the netlist I would generate the bitstream okay because it's already been done now I can send that to this board and nothing would happen because my software isn't done yet my software is under here under the applications tab I have a default project and here is my source code here so here's my source code alright okay so what I would do is I'd go under software and I would generate all build all user applications alright and again that's already been compiled so it's telling me that you know everything is cool remember this thing I mentioned that you combine your software image with your hardware image that's the update bitstream part and then once that's done you download the bitstream onto the FPGA and as it's downloading I'm going to quickly switch to this Terra Term window and what we'll hopefully see is actually our program so there it is on the board it just brings this message and that's basically this test application and just to show you that it is really our test application let's go in there and let's do something like print hello world let's it's okay for them so let's just go like this and we'll say alright we're going to save that and we're going to generate the application the bitstream and then we're going to download the bitstream and I'm going to go back to this okay and you should see a bunch of hello worlds come up yeah maybe reset it oh oh it's there there it is right? oh it didn't what? oh okay yeah maybe but one thing you want to notice is that when you change the software it doesn't have to recompile the hardware so if you need to change one line the hardware is the part that takes like 30 minutes to compile depending on the complexity and so if you change a couple lines in the C it doesn't only takes as long as it does to compile however long you complicate your C which usually isn't that complicated is it still misbehaving? okay okay well we'll move on sorry about that alright so what I want to show you next is basically you don't have to program your C from this platform what you can do is you can launch a software development kit which is SDK and at that point you can hand this design over to somebody who is just doing C programming at the SDK level they'll just be writing C programs that will run on the FPGA and hopefully we'll get that hello world working there alright so we're going to create a new application project here and I'm going to say test program alright and let's try the hello world again here print hello okay and when I save it it will automatically generate a link file and now I'm going to run it on the device alright so I'm going to run the debugger remember when we configured the hardware we made a hardware debugger so we're actually going to step through this program in C on the hardware so I'm going to debug on hardware and if you notice there was actually an option to debug it on the simulator so if you don't have the board you can actually run an instruction simulator on the hardware to do this so this is my program let me bring the terror term here and let's clear the screen clear the buffer and then this little icon here is to run the program so if I hit it here and I go back to the terror term there's my hello world so this is an SDK it's probably something familiar to you if you write a lot of C++ or C code and you can basically write a lot of software for the embedded system from the SDK so that concludes this part of the talk contest time okay now we're going to do this contest I promise so are we doing contest 3 and 4 in parallel no okay I don't even want to think about that I'm not a parallel programmer I haven't taken that course yet so I don't even want to think that way so yeah we're going to do the same thing okay that's not even helpful so like I said before we're going to give away another Spartan board and some more t-shirts so the question if you're paying attention last time what is the largest on-chip memory size that can be used on the Spartan 3 e-board so same rules apply as before answer questions and we'll get back we're actually going to have Furkan demonstrate his Linux on FPGA and right after that before we do the Altera demo we'll have our netbook question up so best of luck to everyone on that anybody have any questions and if anyone has any questions for Dr. K about any of the EDK stuff you just saw feel free to stand up shout it out so the question was that open course is free and I can imply from that I can jump from that that you can probably get a processor source source code for a processor and you can roll your own EDK so save $500 the answer is yes you can save money and roll your own what the EDK does is it integrates all these things together and it gives you all these IP peripherals they all plug in the bus is compatible so it's a convenience actually going along with what Dr. K just said in preparing for this presentation I went online and actually found the VHDL source code for an HC-11 Motorola microprocessor online for free so you don't really have to look that hard in order to find these things apparently Nintendo is online too if you want to FPGA Nintendo NES Steve? NES there you go who doesn't want an NES on an FPGA what I thought by the way the answer to this contest question was in the talk twice does anyone else need the question up there otherwise we're going to switch over to another okay I hear no shouts oh you're actually on here okay we can do it we can do it okay I was going to bring Steve down yeah yeah it is the same board yeah we talk about this game demo that everybody like talk about like game game game and you were wondering like what this might be it's up on the screen it's just running on this small board here it's basically like I don't know have you played Roadrunner I believe it was the name just like cars coming down and then the red car is yours and then you just trying to escape from the cars you know like basically is this stuff here so you know you're trying to escape the cars and after some time it's going to get like the speed is going to increase so like you know and then so yeah you can do this kind of stuff like you know with an FPGA using a VGA okay well basically what it does is like just you write the VGA code in VHDL and then you pass some arguments from C code you like keep track of the speed and the button movements and stuff in C and then you pass the code to V VHDL you know you have a pretty nice game over there there's a problem here my machine hi everybody again my name is Furkan I'm one of the SeaWalk members here I'm a graduate student at the University of Tel Aviv I would like to talk about Linux on Spartan 3 so first of all what we need to run Linux on this board of course we need an FPGA word in this case we use Xilinx Spartan 3 500 and the software is Xilinx ISE EDK you can download from Xilinx.com and for Linux that we run there are some Linux distributions that you can use one of them is like Petal Linux which is one of the good ones and then it's free also and mostly it's like GPL so there are some other solutions like BlueCat or like Montavista maybe so you can download the Linux from PetalLogix.com the version 0.4 is out I think the latest version and for the like the machine you can run it on Linux as someone asked is ISE and EDK can we run it on Linux you can install it on Linux and then you can run it so in this particular case I use Arch Linux and Partos so what are the steps to just you know keep you up dated the step one is like to prepare the workaround first of all we would need to install Xilinx ISE in the case of Air and then install the Xilinx USB cable installing the Xilinx USB cable in Linux is a little bit like hard you need to do some hacks maybe unlike Windows version Xilinx give support like official support to Red Hat Enterprise I think I mean if you are using like CentOS Red Hat Enterprise maybe you would be fine but if you are using another like distribution you would need to do some like hacks about USB thing so you can well it just doesn't seem right but okay you can find some information on my blog over there you can see the slides on from our website and also to download the image to the board you would need TFTP server up and running this is not a necessary step but it's lot faster than downloading on a serial line so I mean you can use like NFS share or stuff and also you would need like terminal to see this stuff which in Linux you have I think Kermit and Minicom solutions for that you can go and download them also the bad rate for this particular pedolinix the good thing about pedolinix is they they do all the stuff for you I mean they arrange all the cross compires stuff and then they build like they pre-build all the stuff like as you saw from that case presentation like the peripherals like choosing the peripherals they do all that stuff for you so you don't need to worry about like choosing peripherals and other stuff so they define like fixed bad rate to as like 11, 52 100 yeah so the next step is to prepare the software after like downloading the code extract it to your home directory and then open up a terminal and then go to your home directory change directory to pedolinix version 04 I believe the latest one is rc4 and then after that there is a settings file inside this directory you can force it in order to like to run the commands inside the program there are just two versions of it one is for bash and the other is for C shell so if you are using like Z shell or another shell you need to change to bash I mean it's good to change to bash so let's see some demos hopefully I'll not have having VGA issues well we're trying to figure out these problems we're actually going to give out the next set of prizes so I'm pretty sure a lot of people got this one right as Dr. K did say at least two times the answer is 32 kilobytes that's the maximum amount of memory so Steve is going to draw some names alright just to clarify kilobytes not kilobits and capital B and real quick I was alerted to the fact that the real Leroy Jenkins is in the audience so I wanted to just say hi to him and you know wave it out but now we're going to do the drawing alright and you want to give us a help Nalia alright Corey Johnson Mikey and while we're waiting for Corey to come up and give us the last question the truck up here just want to ask everyone to please give a round of applause to Dr. Keonlev up here not only did he get funding to bring us all out here and everything he got you all the prizes that were given away today so let's give him a round of applause thanks a lot actually the students made me do it but still we can thank him and Corey's going to come up and give us the question and we're going to try to do that okay guys this is the question I know you've been waiting for and you've been patient I know three hours is a long time so how about a round of applause for yourselves just because I've sat through lectures and I know how it can be so okay so like I said this is the one we've been waiting for we're going to give away the Acer inspire notebook or a netbook six tumblers and a couple t-shirts I know the other ones don't really seem all that thrilling but trust me they are so we're going to give you probably about ten minutes ish to figure this one out this is obviously a little trickier and you know however you want to try and figure it out you can try and figure it out so the question is not being shamelessly plugging or anything how many 128 bit registers are in each core of the Intel core i7 processor so again if you need some slips we might be running low so if you have just scrap paper you know raise your hand and good luck does anyone need the question still up there of course if anyone wants to try and bribe the contest manager we'll verbally repeat it we're going to get this vga thing working so once again the question is how many 128 bit registers are in each core the Intel core i7 processor and this is either for a netbook or a lovely tumblr I've been told to inform you that the netbook comes with a beautiful Intel carrying case so sweeten the deal a little bit it's like a mug kind of but without a handle and major props to anyone who chanced going on the defcon network to get this answer hopefully the netbook will help you know reimburse you for getting whatever computer you use completely owned another to repeat the question again it's how many 128 bit registers are in each core of the Intel core i7 processor so we'll let you keep working on this and I believe furcon has a demo for you so if you'll direct your attention up front we have linux on an FPGA sorry about that there was like VGA problems and hopefully it's like solved now let's see a demo can the font be seen back from the back is it okay the font so this is let's go to so this is the code that we downloaded from petalogics as you can see there are like three different stacks hardware, software and tools the hardware part is for is for the EDK part that you have seen from Dr. K's presentation the software site is the linux site where you can go ahead and compile the kernel and so I'm using a Z shell so I'm going to change it to bash and source settings .sh now I have all the linux executables over there in my path now I'll go to software and then compile the kernel thing so in vendor product settings there are two options here like there is one with petalogics on it and the second one is like xylings the petalogic is basically like the some power pc or micro plays that you can do by yourself and we are going to do the demo for our spartan free 500 so we have a lot of different kinds of spartan boards or ml401 board here we are going to choose the spartan free 500 and then in kernel settings we have two different stacks one is 2.4 the old stack and the 2.6 the new stack and we are going to come back here later to examine the customization settings now we are just going to create the first project so after we do that we are going to go to hardware side and then as you can see in reference designs petalogics made all these cool designs for us so there is our platform here so we are going to start a new edk project edk from linux if you want to run from command line it's xps and we are going to do that but we are not going to use a GUI so it's with a no window option and then our project is system.xmp so we are now in xps shell so we are not going to do anything here because all the things are done for us we just save the file and then start compiling it so I compiled like I think recently because it's going to take some time as you can remember from that presentation so I pre-confiled it so it says nothing to be done for bits you first go ahead and compile the bits for the bit files and then you go ahead and compile the libraries and also this is also pre-done and then you go ahead and program the fsboot in order to like run a code there is a fsboot which is I think first stage boot so you put that code inside the bram inside fpga which so you put that code and then this is the first bootloader and after this bootloader like boots up you download the code to like flash or other place microboot so it boosts the second bootloader which you can go ahead and then start your program boot up your kernel so we are going to make it to initiate in bram and then so everything is done here basically these steps are going to take like 10 minutes depending on your processor speed and then excuse me no question so now between the hardware and software projects Peta Linux came up with a nice script that you can run and then after that settings that you have done with this hardware site are going to be transferred to the software site and then be written in the configuration file and then you can go ahead and compile your kernel depending on those settings so the command is like Peta Linux copy auto config so now it's doing that yep we are done now the auto config file successful updated we are basically done here we are going to go to our software site and compile our kernel now our vendor settings are same so there are like four different things here default all settings, customize kernel settings, customize vendor user settings update default vendor settings let's go ahead and customize kernel settings and the vendor user settings and hopefully most of you are familiar with this part of the thing basic kernel compilation so this is generally the basic kernel compilation stuff like networking bluetooth device or SCIC device or whatever I mean you can choose what to compile and then file systems there are different file systems here we are going to choose our file system is to be like ROM read only so I'm not going to change any settings here and then the second step here is about is mostly the first step is already done I think because you don't need to worry about that but the second step is important here because you choose what program you want to use on your FPGA so the first system settings are like network address here here you can define your ethernet mega address and then you can choose to obtain IP address like dynamic or you can choose to give a study IP address you can find the server IP address also to communicate with your board basically after you download your code or basically after you download the micro boot if you remember I said I mentioned about TFTP server you can get the kernel image from TFTP we are these IP addresses so just make sure that you know the IP addresses and you set them up correctly and default hostname we are going to choose our default hostname to be like DEF CON demo and default root passport is going to be DEF CON so root file system types there are different root file system types you can choose like copy file image to TFTP boot if you are familiar with TFTP server there is a TFTP boot folder that you can go ahead and pull up the files from there so this is basically that directory you define that directory to be whatever you want and then the core applications here you choose the core applications what like the executables do you want to like run on your machine so there are some cool stuff here like libraries which libraries you want to choose and file stem applications like mount unmount or like some if you want to run like Samba you can choose it also network applications so you might not you know ever seen like in this screen like where you pick what applications you want and why you would pick applications here is because these are actually applications that are going to be built into the image that's put on the FPGA you could stick on an SD card use a cross compiler and compile whatever external applications you want but these are ones that are going to be built in no matter what into the root boot file system so GACP some Ethernet tools HTTP server FTP server and that's that there should be open SSL open VPN so pretty much cool stuff here SSH Telnet TFTP most of the stuff you can do so other applications like mobile applications like Perl, Python you can write like calls and then compile it so yeah and three different games dungeon if you ever played so yeah basically we are done here so we are just going to go ahead and just run the process here hopefully it's not going to take a lot of time it takes four minutes for me yeah we actually want to start the TFTP server right okay I'm going to interrupt it here I think it's going to take some time let's go ahead and pre-build here so after you compile the kernel you will get some files some files inside your TFTP boot directory some are like kernel images in different formats and some are like microboot things that you want to download there are some for example there is one u-boot srack here and then u-boot dash srack here dash s is basically if you want to this is generally if you close the power of your board your code is going to go away and you are not going to be able to run it again if you power on so what you want it if you want to run it initially you can download the microboot dash s and then you know you can run it initially so we are going to go ahead into serial port before that we should start our yeah so this is the serial port on our FBJ on the button and on top I'm going to dump the code inside the serial port and you are going to see hopefully before that if you remember there was like server IP address and client IP address that was one more step I forgot we generated code now if you remember we generate the libraries, the bit files and the program but we didn't dump it to our FBJ so we are going to go ahead and then download it to our FBJ there you go so as you can see here the first stage bootloader has started we dumped the code inside the FBJ it's bram and then it's waiting for a src image to be downloaded so now we are good to we are good to download our microboot so as you can see it's spinning like a dash over there it's downloading code over serial line and what we are going to see is microboot loading up comparing the size of the kernel and microboot it's going to if you were to download the kernel it was going to take like a lot of time so 300k versus 2.5 mech so we are in prompt of microboot are here this is we have some commands that we can run so there are some different kinds of options here that we can use so we have the tftp server running yeah we have the tftp server running so let's go ahead and download our image as you as you can see here I don't know if you can read but there is a register over there register address over there that you can microboot starts melloc starts and there is a number over there so what we want to do is we want to pass that number and then write our image over that number so it's 8D so we want to use 8E so tftp 8E and then our image is image.UB yeah it's loading the image what we do we just downloaded our kernel image that we compiled it's now on our FPGA we just wrote it and now we are going to go ahead and execute that so in order to do let's first of all check yeah that's correct so we are going to execute it with boot M 8E 0000 there you go now we are loading up our Linux kernel at least at last there we go we see the DEF CON demo login over there we go ahead enter the password what was the password there you go there you go we are now inside our FPGA box here so you know if we do a processor just to make sure cpu family microblades FPGA are Spartan 3e and then cpu version like 7.10c so yeah I hope you can turn that into it yeah as you can see it's running a like 10 net server so you can turn it into it alright so give for a round of a hand for doing this Linux stuff no it will not that's a real advantage of Linux is that it can run on pretty much any architecture as you can see the real question on all of our mind is I wouldn't want it too I wouldn't want it I guess we're ready for the netbook then one more thing I guess one more thing we promise so we're not totally Xilinx idiots here you can see that Altera has some software too so the only yeah if you can see there's a cool board here it's an Altera board the second the other company other FPGA company on the market so there are different kinds of like boards and this one is true I know the pronunciation so it has a cool touch screen over there it's running so yeah it has a touch screen over here and then a 5 megapixel camera here it has a lot of like switches and LEDs over here like four buttons and back on the board there's an SD card over on the top there is like microphone in and line out for speakers and there is also a VGA port on this FPGA it's pretty cool there is also an LCD screen here you can like put up some cool stuff on that and yeah let me show you a cool demo about this board so okay let me first pull up here so this quarter software is Altera's ISE you can download it and there is one there is this Nios software is for embedded applications also you can download it has Linux version but it's pretty expensive write them nasty letters so they make it free like the Windows version yeah that's why I'm running it on VM over a crappy XP so I will plug the demo for this board so I didn't have so much time to like examine all the stuff on that so this is the demo from the Altera thanks to Brian to support so here as you can see the interface is pretty much the same as ISE you can see the files over here I don't know if you can see it from back yeah so yeah the compilation process is here and the messages are on the button so we are gonna go ahead and start compilation it's already again program filed so full compilation was successful we are gonna go ahead and plug the programmer it's like impact in Xilinx yeah I will so it's downloading the code yeah so I will gonna give you guys the camera basically the software demo on here actually does edge detection so it takes the picture that it takes in via the camera and can actually detect like shapes that are different colors different brightnesses and different things like that so after we show this demo we're announced the netbook winner changes again changes like it swaps the colors basically that's it alright thanks Fergan if you have any questions let me know so this is I guess what well everyone who chose to wait this is what you've all been waiting for and once again I'd like to thank everyone for sticking around and hearing our talk hope you learned something cool about FPGAs and you know once we're done feel free to ask questions and if you see us throughout the rest of the con ask us questions and we'll be happy to try and answer them so Steve and Mike here are going to pull some names to see who wins okay we'll do the answers as we like go over the questions but before we give the answer to this I just want to ask is Rodney D. Caratoret Rodney D. Caratoret is here okay I just want to return this business card and I wouldn't want him to lose it knowing that it says USTrackCom on it and Rodney.Decaratet.JTNFG you know got mill so if anybody wanted to email him and let him know how you feel about him leaving his USTrackCom business card around you can just leave it right there we had to check the rules we found out we can't apply that for spot the fed so it was worth a shot so for the question how many 128 bit registers are in each core Intel Core i7 Neoham processor it was 16 so everybody got their right good job when they first did the 128 registers they did 8 and then they doubled it not in the i7 but in the ones before it but the i7 has 16 too kind of John how many Johns we got one oh just one okay good yeah sorry we got to save the best for last sorry we forgot to announce we're drawing we're drawing the netbook last and for those of you who didn't get called I'm just happy though right alright alright we'll play it fair we'll play it fair alright we're gonna go backwards alright we should put his name back yeah we'll chuck it back in there alright fair legit here's your entry going back in there let's give it that was my fault I'm sorry I didn't remember to announce it so for another shirt if you win the netbook you don't get the t-shirt huh so don't be excited Brett I apologize if I can't pronounce that Brett come on up Corey Corey our authentication is lacking in implementation I apologize alright here we go Mike hit me again and a punch to the face with Matt T Matt T alright that was for a mug you can thank Intel alright C9H1 3N anyone actually I'll give this to you if you can guess their password now now I'm telling you you have a very good shot of this if you think carefully about what a common password might be he said it their password is password so for a netbook you could have had a netbook and alright we got we got a few more slips this is for what are these chords what is a tumbler Corey travel mug travel mug okay we're going to try to speed this up Chris I'm going to need a password on this one wait there are two crises I'm seeing two crises we're going to need alright Milo we're going to draw the next one you already got one so Albert Caroline I apologize sorry Al go ahead Mike Tim hey Tim otherwise it's not going to be fair to John we're going to shake it off what's this for this is for one more tumbler or travel mug by the way there's very few correct answers for this John you can keep both John is the most unlucky guy the unlucky guy alright last drawing shaking it up reaching in the other the other Jesse alright alright everyone round of applause thank you very much for coming out and I hope you guys have a good Defcon