In today's lecture that is the 17th lecture we are going to continue our discussion on feedback amplifier and its application. However we will be first concentrating on active device which is just a simple single transistor and corresponding feedback amplifiers. The advantage of such a circuit is that in the present day VLSI the design should be rugged should work under all conditions without any problem or need without any need for any adjustment later. So in the present day VLSI only single transistor active device is used in feedback and then that local feedback circuit is cascaded with similar such single transistor circuits to form any complex amplifier like single transistor circuit we have already discussed in the last class at the end of the lecture as trans conductor amplifier and trans resistance amplifier. Coupling this together putting trans conductor first and trans resistor later you can design a voltage control voltage source or voltage amplifier and putting a trans resistor first and then a trans conductor you can design a current control current source. So all the 4 amplifiers can be designed with local feedback for the active device and that is best suited and the most rugged okay feedback amplifier ever. Using known number of active devices in cascade is beset with problems of instability because of the fact that a single transistor naturally involves two time constants minimum okay and one at the input one at the output whereas if you cascade two transistors together it will increase the order minimum two three one at the input one at the output one intermediate moment it becomes a third order system we have seen that the system with feedback is likely to become unstable particularly at high frequencies. Now let us continue with that and today we will be discussing first that how to convert this feedback amplifier structures to one that is suitable for IC. So biasing strategy that we have to adopt and how to improve the signal to noise ratio in the IC that has been designed this is the primary objective and in that exercise will show how systematically any single input single output stage can be converted to differential input and differential output in order to facilitate signal coming as differential and noise coming as common mode okay normally noise gets transmitted through power line and therefore power line voltage or power line derived current which is required for biasing is always connected as common mode to this symmetric structure. So how systematically we can arrive at a symmetric structure which is going to be differential input and differential output okay that is the strategy and further will migrate over to application of op amp circuits in terms of instrumentation amplifier design and perhaps conclude in that particular topic for today. Let us see how we are going to now discuss the transistor IC design starting from basic okay. So these are the last two circuits that were designed in the last lecture design of trans impedance amplifier you can see the single MOSFET or bipolar transistor for that matter is used in feedback with this as the feedback network this is the source admittance this is the load admittance and this is the equivalent circuit of our active device which is Delta VGS getting converted as GM into Delta VGS with descent admittance GDS. So we have seen how this is why feedback and therefore why parameters we have added of the feedback network and the amplifier network including source and load and then how we have to invert it and get the Z matrix ultimately if GM is made much greater than any of the G's that are present in this then all the other parameters go towards zero Z parameters and this transfer parameter alone becomes independent of the active device and is equal to minus RF that is how we get the trans impedance amplifier design. A trans resistance amplifier was then considered using for example MOSFET or bipolar as the active device then this is the leakage resistance at the input if it is existing and this is the feedback resistance RF linking the input with the output and this is the load and now the Z parameters at this is called Z feedback and why matrix is what we desired and we see that the matrix now is dependent upon GM it is going to be very large if GM is very large so then all the other parameters Y parameters go to zero except for the transfer parameter which is going to depend only on the RF and over RF. Now we start with therefore let us say either bipolar trans conductance amplifier as depicted earlier or MOS trans conductance amplifier and get its Y matrix ideal amplifier as above then using bipolar or MOS trans resistance amplifiers and trans conductance amplifiers we can design all the other four types of amplifiers okay. So the now how to obtain a bipolar differential trans conductance amplifier is going to be illustrated you just take two single ended trans conductors to form a differential structure that is the differential trans conductance amplifier is to be designed so the procedure is this is the single stage trans conductor using bipolar transistor it can be a MOS also we are taking for example a bipolar stage so that we end up with a bipolar structure for the trans conductor if you want to have a MOS stage you take the corresponding MOS trans conductance amplifier with the ideal matrix as shown. Now trans resistance amplifier is basically this structure with feedback forming the trans resistance and II comes here II into RF flows here and voltage appears as minus II into RF in the previous one when VI is applied here VI by RF VI into GF current flows through this that current is same as this current so that is how the transfer parameter is GF. Now this is input is a nullator here because the input is nullator here this VI appears directly across this it does not draw any current here it appears as a short circuit at the input. Now let us say we have obtained such a trans conductor okay and how to bias it now so base to emitter junction has to be forward bias because it is N type of NPN transistor or N channel MOSFET so we apply common mode voltage correspondingly which is okay say such that this particular junction gets forward biased and the current will be accordingly determined as this voltage is a roughly V gamma we see plus VD by 2 minus V gamma okay plus VS by RS is the current flowing through this. So that current is going to be flowing almost here also and therefore we have fixed this potential such that base collector potential that is collector base potential is having a positive voltage so that it is reverse biased. So identical structure is drawn okay here so that base collector potential collector base potential is positive so that it is reverse biased base emitter potential is negative base emitter potential is also positive here so that this is forward bias. So the transistor action takes place so we can assume it as nullator at the input and this current is nearly same as this current so this is a nice way of biasing but you can see that we are connecting the load resistance to VDD in order to facilitate higher potential than the base potential to occur here so the operating points will be decided appropriately so that there is a forward that is a drop which is positive from here to here okay. Now this is a symmetric structure now such a symmetric structure can be just converted into a very simple differential structure by connecting a resistance between these 2 emitters which is twice RS. So what happens in such a situation is that if you put RS and RS here to these 2 emitters let us say this is E1 this is E2 so this becomes a symmetric structure and this common mode point here okay this is a common mode point okay for differential signals the change in potential here is going to be 0 at all times whatever be the differential signal here if this is VDD by 2 and this is minus VDD by 2 okay whatever be the value of VDD this potential keeps remaining at all times at 0. So you can either ground it or connect it through a current source does not make any difference as far as the differential signal is concerned. So we decide to use okay let us say a current source here this is also equivalent to a symmetric structure which is twice RS and if this is let us say twice I naught right you can split that I naught into I naught and I naught here and from the same differential structure. So now this can be connected to some potential it is of no consequence as far as the differential mode operation is concerned. So only in the common mode we have this current okay flowing through these resistances and developing a DC potential that DC drop is totally unnecessary right to be incurred okay and therefore we can just split it into two equivalent circuits two current sources I naught and I naught and still remain retain this symmetry and that is the strategy adopted. Then actually in this there will be only the differential mode signal that is going to carry current okay and therefore the common mode current which has been already split as I naught and I naught it will flow through the individual transistors that is going to bias these two transistors appropriately okay forward bias these two transistors. So please understand that in a later at the emitter point you have to have the current source okay biasing so that collector current is equal to emitter current okay I naught. So we have this I naught flowing here okay this I naught is flowing here okay through this whatever flows is going to be now you can see this is going to be just the differential signal because this is as far as the signal is concerned zero drop so and this also is zero drop now later so this is going to be VD divided by twice RS current. So the total current in this is I naught plus okay VD by two RS okay and this will be I naught minus VD by two RS so that will be the current flowing in this so the output will be having only the common mode drop which is VDD minus I naught RL here VDD minus I naught RL here that is the common mode voltage okay and that can be set by proper selection of I naught so that this junction is reverse biased that is a positive voltage here. So this is the universal method of IC design okay wherein we lift the emitter point okay which is common mode okay to a current source okay and then split the current into two identical one so there is no need for a DC drop unnecessarily getting wasted in RS okay and therefore minus VSS can be now of a lower value than before okay. So this is the way we have arrored at IC trans conductor okay and this current can get converted to voltage by RL and RL. So this VD by two RS will flow to two RL as the differential load and develop that times two RL VD by two RS into two RL is the output voltage differential voltage of this structure. So this trans conductor mainly is formulated by the transistors and this common resistor connecting the two transistors together right. So this will carry only the signal which is differential signal it has no component coming into picture in terms of the DC bias. So it is such a thing is possible only if there is perfect symmetry in terms of transistors being identical and the current being identical which is what is possible today in the present day technology that you might be able to match these transistors and the current sources okay and those resistors better in IC design than in discrete design. So this nobody should therefore go for single ended structures which are outdated structures of today in the era of IC all the analog front end must be made up of differential structure at the input so that the common mode noise gets eliminated at the output in this structure of two such symmetric things what happens is the common mode component also produces current in the load okay whereas in this structure okay the common mode noise has no effect at the output or the common mode green of this ideal structure is 0 that means VC does not have any influence in producing any output at the load whereas here two identical structures and subtracting this also will result in difference operation and you will get the differential signal right if they are identical however the common mode still appears okay as the output. So the common mode influence if it is actually a common mode signal which is interfering it is a nuisance because the signal to noise ratio has not improved by using such a difference structure whereas a differential structure improves the signal to noise ratio considerably okay so this is the main operation of converting every single input single output structure existing to differential input differential output suitable for IC design particularly in the front end. Now let us do the same thing for the differential trans resistor now what is done is the same strategy that this is the single structure so I start with the single structure now I bias it suitably so that collector base junction is reverse biased so this is connected to a positive potential and this might have to be connected to a negative potential or yeah this is the way. Now you repeat the same thing and cause asymmetry to exist then this is the common point instead of grounding it I will lift it through a current source required for biasing okay and then you have the resultant differential trans resistor very simple if this is twice I not this will be I not and this will be I not by symmetry. So you have biased it in a stable fashion without using any of those bypass capacitors and other things that may be required later in the discrete circuit design you have used it and there is no need to start with the single ended structure at all that is meant for discrete circuit design okay in order to save in terms of the active devices by using a differential structure like this right it has not only got rid of all these bypass capacitors etc and resulted in improvement in signal to noise ratio improvement in performance in terms of drift voltage causing interference etc so offset compensation also is going to occur this way therefore these are the important building blocks of today in ICs. So what will be the thing the differential current which is applied between these two terminals ID source through RF okay and generates this minus to RF into ID as the voltage differential voltage at the output it is independent of the load resistance because it is a feedback structure that we had already shown. Now combining the differential trans conductor this is the differential trans conductor so we have the common mode voltage plus Vdi by 2 common mode voltage minus Vdi by 2 input common mode voltage can be anything okay so that collector base is still reverse biased all the time when the signal also is there that is the only condition okay and then it is cascaded to another structure that is what is this this is the differential trans resistor to form what is called as differential voltage amplifier differential input differential output the common mode output voltage is determined by primarily by I naught okay and some current that is going to flow through this okay so that is the differential voltage amplifier whose voltage gain is differential voltage gain Vdo by Vdi is twice RF divided by this R it was earlier represented as twice RS right so it gives the same gain as the single ended ultimately RF by RS right the load resistance by the total source resistance right so that is the feedback amplifier gain okay however right now it is biased automatically properly this current is chosen for giving you the required string at the output okay this current is the one that determines the input impedance of this bipolar structure right. So along with R so 1 over GM of this gets added to R as this is not truly analytic 1 over GM of this also gets added to this so effectively the R changes to R plus 2 over GM of the input transistors that into beta plus 1 okay is the input impedance of the structure output impedance is primarily determined by the shunt feedback at the output RF and the GM of this that we have already determined in the earlier feedback amplifier design course okay lecture. Now this is a commercial ahh differential voltage amplifier or video amplifier for picture amplification video signal 733 ahh still ahh available with TI in the era of bipolar ahh ICs and this is an important structure using MOS you can replace all these transistor by MOS and the performance will be ahh similar to that of this except that right ahh the GM of the MOS is an order of magnitude less than the GM of the corresponding ahh equal sized bipolar okay. So this bipolar structure is nearer ideal ahh amplified for feedback than the MOS structures. However MOS has become popular okay both in now analog and digital the analog usage is because of the digital ahh system covering most of the ahh system on a chip okay processing activity. So now this is the ahh what is that structure which is the trans conductor here you can see the trans conductor is having ahh load of 2.4K that is of no consequence because this input stage acts as a short circuit takes away all the signal current okay this is only for biasing purposes okay. Here also 1.1K is only for biasing purposes here the current source ahh I naught prime is this this is I naught. So the current source is obtained by a reference current okay which is generated through this 10K and diode okay connected transistor. So it will be roughly the supply voltage divided by 11.4K that current gets reflected proportionately because different emitter resistances are used okay this will be ahh almost ahh 5 times more than this because ahh this is 5 times higher than this. So ahh this current is going to be the same as this current here okay and these are emitter followers or unity gain stages that we have already discussed okay voltage follower okay with full local feedback. So the output impedance is still lower okay and this is the feedback resistance RF that we have thought of okay so 7K 7K so 7K divided by ahh 590 plus 50 let us calculate that 7K is the RF divided by 590 plus 50 plus 1 over GM depending upon the operating current here so the ahh plus 1 over GM. So you will see that this is nearly equal to ahh 640 plus let us say this is going to be ahh causing it to nearly become 700 ohms. So that means this will be nearly equal to 10 which is given ahh as the minimum ahh gain of the structure. So you see how quickly I arrived at the gain okay because it is a feedback amplifier gain is totally independent of the transistors that are used as long as the GM of the transistors are high. I can make it 100 okay or ahh 400 by shorting these ahh resistances respectively external facilities there for gain adjustment. So 100 ahh 10 is when it is fully open 100 when this is shorted and ahh 400 when these 2 are shorted. So that is the kind of ahh gain that you get and the input impedance is typically now the total resistance is let us say 700 plus 700 okay that is about 1.4 K into beta is let us say 200 this is the beta this is the typical beta of most of the bipolar transistors used in ICs. So you get this as about ahh 280 kilo ohms right. So 700 plus 700 okay 1.4 K into 200 which is going to be 280 kilo ohms okay you can see it is roughly 250 kilo ohms input resistance. You can therefore see how nicely these and how simply okay this ahh IC can be analyzed for its performance 200 megahertz bandwidth. So that is the video range that it can cover this kind of gain no frequency compensation needed okay because these are local feedback structures that is why no frequency compensation is ever needed and such structures are popular inside the IC okay. So that they simply work. So now we will be covering the ahh effect of gain bandwidth product and other non-idealities on the performance of the amplifier. So once again this has to be thoroughly understood in selecting what op-amp one should have for a given application this is an important consideration. See all these are considering that GB is infinity for this amplifier that I can assume that the input voltage between the two terminals of the op-amp is always going towards 0 that is the strategy that happen due to feedback because the loop gain is very high. Now the loop gain is not very high that means it has ahh finite gain and finite bandwidth effect coming into picture okay. So ahh what is the effect of that. So we have the gain which is defined as A of this amplifier is going to be A naught divided by this we had seen when we discussed the characteristic of the ahh active element and it is limited bandwidth maybe it has high gain okay but it has limited bandwidth and other poles are made to appear okay at frequencies beyond or at gain banded product or beyond gain banded product that means A naught into omega t the second pole should only occur at that point then only they are ahh good as feedback stages this is what we have shown. So the gain bandwidth product okay should be ahh same as the position of the second pole that is Q equal to 1 that is the strategy that is for most of the useful frequency range it can be approximated as S by omega t this is important. So in its dynamic range of operation what is important is the gain into bandwidth product in assessing its performance. So A can be approximated as GB by S if such is the case then the gain of this thing any ahh feedback amplifier structure is the ideal gain in this case let us say K and if you want K as the gain that is 1 over G2 please remember that in the feedback network that so the bandwidth of the thing is limited to GB by K. So that is how do you get this this is always equal to ideal value divided by 1 plus 1 over the loop K what is the loop gain here this is A which is GB by S into K. So GB by K into GB ahh into ahh let us say 1 over K right. So this is the 1 over K that is going to be feedback okay. So ahh the ahh you can therefore see that the ahh bandwidth of this is gain bandwidth product divided by K okay. So this is the whole strategy of ahh your feedback right amplifier design 1 over loop gain okay. So GB by S into 1 over K. So 1 over K is what is feedback okay so K becomes the gain of the structure okay. So you have seen this attenuator whose transfer function is 1 over K. Now let us consider that the amplifier has a gain of 1 unity right then what happens is full feedback is given okay K is equal to 1. So the bandwidth is going to be K okay 1 plus S by GB that is also called unity gain bandwidth okay. So K is equal to 1 suppose we design okay an amplifier which is ahh so called inverting amplifier same thing feedback is 1 over K right R and let us say now K R so feedback is going to be 1 by 1 plus K okay. So GB by 1 plus K that means feedback factor is going to be still determined by both these resistors right. So the bandwidth of this gets reduced by GB divided by 1 plus K when realizing inverting gain of K right this is inverting amplifier so that is minus that is if K is equal to 1 here right the bandwidth is going to be minus 1 divided by 1 plus 2 S by GB. So designing a non-inverting amplifier with gain of 2 results in the same bandwidth which is GB by 2 as that of the inverting amplifier with minus 1 what is this puzzle right that means this can give the same bandwidth for a loss less gain than that okay that is because this is primarily not a voltage amplifier you are just using it as a voltage amplifier by her first it is nothing but a what trans resistance amplifier where I is the input and then it is converted to voltage which is I into K R that is how V naught is equal to minus I into K R it is just that I is made equal to VI by R by assuming that this is a short circuit so this is the voltage to current converter okay because this is virtual ground here this voltage gets converted to current here and then that convert that gets converted to voltage back. So voltage to current conversion and current to voltage conversion is the step involved so basically this is a trans resistance amplifier that is why the bandwidth is remaining same as then this is the source resistance maybe which is converting the source voltage into a current okay and that is responsible for this kind of anomaly regarding the gain and the bandwidth. So here please understand that right this is the non-ideality of the source which is making the bandwidth get reduced to factor of GB by 2 if it is really a current source then the bandwidth would have been the full bandwidth of GB okay because full voltage is fed back here okay if this is a current source this is what is to be understood this is what is not really understood when you call this as a inverting voltage amplifier okay it is still a trans resistance amplifier so please understand this major distinction. So this trans resistance amplifier can be used for a variety of applications today we will see before we migrate over to other applications let us see the effect of offset input offset voltage input offset voltage and input bias current are the other effects that come into the performance of the amplifier this is particularly so under the application of very low frequency applications like biomedical applications and geological applications etc in such amplifiers okay it is of very low frequency and the offset voltage drift with temperature mingles with the signal and in such situation we have to reduce the effect of this offset voltage already these are perfectly matched hopefully at the input so that offset in the case of bipolar is as low as about a few millivolts in the case of mass it may be tens of millivolts okay whereas the bias current offset primarily exists in the bipolar as IB1 and IB2 the input pair bias currents okay and is non existent in the case of mass. So what is the effect of this input offset as far as input offset voltage is concerned it appears as a offset voltage here so it is going to be simply appearing as okay K times if K is the gain K times the input offset voltage here. So higher the gain higher is the offset here limiting the voltage swing considerably if you are designing for high gain so if offset is interfering with your signal do not design it for high gain unless you compensate for this kind of offset at the input how do you do it you can actually apply an opposite offset voltage at this input point there are IC available with offset compensation terminal being made available where you can apply the suitable offset current or voltage at the input of the stage in order to make the output offset code to 0. Now the bias current offset how does it cause offset problems so the bias current for example in this particular case let us see we have IB2 and this is IB1 this IB2 flows through a combination of R and okay K-1 into R. So this resistance if it is very high okay then there is an offset voltage generated which is IB2 into this that can be compensated for okay by putting in series with the source okay the actual source a source resistance okay which is equal to R parallel K-1 R of that value is put in order to compensate for the bias current that is flowing through that. Now these are the strategies so for example if you are designing a buffer stage normally you are connecting the output like this but that might be a high impedance sensor at the input. So how to compensate for the offset here you just introduce dummy resistance here okay at the terminal of this and this output and input terminal here where negative feedback is given which will also carry the same current as the IB2 okay hopefully IB1 is equal to IB2 the IB1 – IB2 is called delta IB offset okay so that is difficult to compensate okay because you have to adjust these resistances so that it gets compensated it is never done in practice. So these are the non idealities that we normally bother about effect of slew rate in amplifiers slew rate limits the power bandwidth of the amplifier what is slew rate slew rate is the maximum rate at which output is capable of rising this comes about because of the capacity effect okay at the output okay so this is the maximum rate at which output is capable of rising okay and our output if for a sine wave input let us say for testing it we may apply a sine wave input so our output is VPO sine omega t expected value for a sine wave input however delta V naught by delta t of this output voltage now is VPO into omega cos omega t. So at the zero crossover the rate of rise is the highest and if this rate of rise is not matched by your op amp okay and if this exceeds the slew rate so then you equate it to slew rate and find out the maximum frequency up to which it is capable of giving VP naught as the output. So for example just let us take TL081 which is having 13 volts per micro second as the slew rate so that let us say we want it go up to 10 volts okay then the f max is going to be 13 into 10 to power minus plus 6 divided by 10 into 2 pi. So this comes out as 20 into let us say 3 also okay so this comes out as let us say this is 3 about 4 okay and about 200 kilohertz okay. So if you want to go up to a few megahertz let us say 2 megahertz in order to measure the bandwidth of the gain bandwidth product of the device you might have to apply signal up to 2 to 3 megahertz. So what happens 2 megahertz it is only capable of giving okay perfect sine wave only of 1 volt magnitude okay. So that means 10 times less than this 10 volts that we have so that means VPO equal to 10 volts okay can be generated okay generating a perfect sine wave at the output only for less than 200 kilohertz for the TL082 okay and if you use 741 it is going to be still just 1 volt even at 200 kilohertz right. So you cannot really use these things okay for the full swing at the output and this is something that is not been thoroughly understood in the application of op amps okay it is an important last signal limitation of any op amp. Now these are the non idealities that we have discussed finite gain bandwidth product, finite slew rate, finite offset. Now let us come back to signal processing activities which are the mathematical operations of actual electrical signal processing summing amplifier. You want to sum up let us say currents so that is easily done by the trans resistance amplifier at this node it is appearing as a short circuit okay. So it is current control so it is a short circuit at the input. So any number of currents can be simply added at this point okay and they will be simply summation of these currents flowing through this resistance develop okay V naught is equal to minus I I into R that summing the current can be done by applying voltages and series of resistances connected to this node okay. So let us say VI1 as R by alpha 1 VI2 as R by alpha 2 in R by alpha n all connected to R then what happens to these currents is being at 0 volts so these currents will be correspondingly alpha 1 VI1 by R okay alpha 2 VI2 by R adding up okay the whole thing multiplied by R results in a summation operation okay M equal to 1 to N okay V in into alpha M okay this is a simple design of a summing amplifier. Now the back end of for example this such a summing amplifier is one of the important components acting as a back end of a DAC wherein we have all the inputs connected to a reference which is absolutely constant and we have switches which will either connect this resistance to VR or 0. So what happens these currents are either existing or not existing based on the position of the switch SI0 or 1 means these currents add or not add okay. So and these currents are made binary weighted R so VR by R, R by 2, VR by R by 2 okay VR by R by 4, VR by R by 8. So it is going to be sigma of I equal to 0 to N minus 1 for N bit converter VR SI into 2 to power I. So the DAC 7821 Ti for example is a 12 bit parallel multiplying DAC which has as the back end okay 12 such a resistances okay or it may be R to R later network okay with this kind of strategy at the output it is a trans resistance amplifier okay coming here to obtain an output which is the analog voltage which is VR let us therefore look at this how this appears VR is the analog voltage analog it can be just VI okay into sigma okay SI 2 to power I which is the digital word. So it is called a multiplying DAC where VR is no longer a reference voltage VR is one input voltage okay multiplied by digital word that is why it is called a multiplying DAC. There are number of users in voltage control oscillator design voltage control filter design that digitally controlled filter digitally controlled oscillator okay and digital controlled amplifier designs okay and the future world is going to be digitally controlled front end or back end okay the analog front end and analog back end will be all digitally controlled because of the power of digital signal processor available today. Now summing amplifier as voltage amplifier as summing amplifier let us see. So even the voltage amplifier just as we used a trans resistance amplifier earlier we can use a voltage amplifier as summing this summing is done by a set of attenuating resistances connected in this manner R by beta 1 to V1 A R by beta 2 to V and A so on right and there is an R here. So what happens here from here to here the gain of the stage has already been established by us as 1 plus R2 over R1 is 1 by G1 G1 is R1 by R1 plus R2. So V naught is equal to VI dash into 1 plus R2 over R1. So what is the voltage VI dash here it is nothing but you can note that it is sigma of beta IVIA okay all these beta IVIA divided by sigma of beta I okay plus 1 because that is 1 has an input it is 0 so that it results in plus 1 R that is R that it is beta 0 beta 0 is equal to 1. So this is what happens the gain attenuation of this structure is sigma beta I into corresponding VI is divided by sigma beta I plus 1 that into 1 plus R2 over R1. So if you make your choice as R2 over R1 if it is chosen to be equal to sigma okay let us say 1 beta I then this becomes equal to sigma beta I I equal to 1 to N that is how you get this as a summing amplifier but the coefficients are all positive here okay because it is a non-inverting amplifier. So and this is one way to therefore combine those voltages which have to be added as positive coefficients at this point and those which have to be having negative coefficient as that the trans impedance amplifier or trans resistance amplifier and combining together we get this right. So this is the earlier strategy first strategy for trans resistance amplifier which results in this minus beta that is alpha IVIB okay and this one plus sigma VI A beta I okay with now okay these conditions okay you have to be satisfied that sigma of let us say M has to be same as N in order to exactly satisfy this otherwise we have to connect M minus N inputs or N minus M inputs depending upon whether M minus N is positive or N minus M is positive okay to ground that means we will make it 0. So that okay sigma of beta is same as sigma of alpha okay so that is the strategy as far as this is concerned. So now a special case of that is the difference amplifier wherein the difference amplifier okay works with R R by alpha R R by beta alpha equal to beta okay just single input okay at positive point and single input at the inverting point. So we have V naught equal to VA into beta okay minus VB into alpha strictly speaking it will be having a factor of 1 plus beta by 1 plus alpha and when alpha is equal to beta okay this is what is valid okay it is going to be let us say this is slightly to be corrected this is plus and this is minus okay and therefore is going to be VA beta okay minus VB alpha right. So alpha is equal to beta this is going to be alpha into VA minus VB right. So this is the strategy that actually speaking this is equal to okay VA into okay R by R plus R by beta so it is beta divided by 1 plus beta and then that into 1 plus alpha minus okay VB into beta this is the correct VB into alpha sorry. So this is the actual result if alpha is equal to beta you will see that this is VA into beta minus VB into alpha okay only then. So the differential gain is alpha okay so differential mode gain is alpha then when common voltage is applied when VA is equal to VB equal to VA equal to VB equal to a common mode voltage what will happen right alpha if it is equal to beta then only VA and VB get cancelled and no output occurs. So alpha is equal to beta only okay the common mode output is not amplified whereas if alpha and beta are different then this is what happens okay and you will see that it is going to be governed by this ratio 1 minus beta by alpha beta is a ratio of resistors alpha is a ratio of resistors. If the resistors have a tolerance okay R is R 1 plus or minus delta delta is called the tolerance then what happens the ratio of resistors will have a worst case tolerance of only 2 delta okay. So 1 plus delta divided by 1 minus delta so that is a tolerance of 2 delta and since 2 such ratios are involved as ratios okay beta and alpha in deciding how close it is to 1 okay then this will be 1 plus delta 2 delta 1 minus 2 delta so that means it will be 4 delta and therefore the common mode gain is going to be equal to 4 delta divided by 2 because 1 plus alpha is there.  So this get cancelled beta minus alpha the difference okay with respect to 1 is what is the cause for the error that is 4 delta 4 delta divided by 1 plus alpha okay which is equal to 1 so you get it as 2 delta so that is the common mode gain. So the common mode rejection ratio of this difference amplifier normally is alpha by 2 delta primarily governed by the tolerance of the components and therefore you have to have good precision resistances match resistances used for this difference amplifier right. So how to improve the common mode rejection ratio you therefore again start with the same tragedy there are 2 single ended amplifiers being used here this is identical to this so this is a symmetric structure with represented here so converting it from single ended to differential. So you get a common ground here and this ground is lifted and it pumps a differential structure. This has been synthesized using narrator and narrator earlier in our lectures and you will see that this has a common mode gain because this does not carry any current when this voltage is same as this voltage there is no current in this because this is VC this is VC so in these 2 are VC. So output is going to be at VC and VC only current will exist when this voltage is different from this voltage that means when there is a differential voltage. So that differential voltage divided by 2 R1 can be increased very much to boost up the differential mode gain of the structure. So this has a differential mode gain of 1 plus R2 over 2 R2 over 2 R1 okay so R1 plus R2 over R1 and a common mode gain of 1. So this is the beauty of this this as a common mode gain of 1 and the differential mode gain of 1 plus R2 over R1. So you can boost up the common mode rejection ratio of this by increasing R2 over R1 that is what is combined with the earlier difference amplifier in order to form a 3 amplifier version of instrumentation amplifier which has become famous and is designed by almost every IC manufacturer TI makes one such as INA 103 with gain varying ability by changing R dash 1 to 100 high gain in the product 100 megahertz at G of 1000 high CMRR 100 decibels okay using this kind of structure otherwise the tolerance of these equal resistors will prevent it from going to such high values and the 2 amplifier instrumentation amplifier has been given to you for evaluating its AD and AC. Please investigate this and see how well it compares with the previous version since it is one less op amp is it better to use this as against that. Now strain gauge sensors will cover this as a sensor input to instrumentation amplifier how to design this structure okay will be the topic of discussion in the next lecture. So it is nothing but a bridge arrangement with strain gauges okay which is normally going to be used for measurement of force velocity strain okay etc pressure so this is an important instrumentation sensor arrangement. So let us see how instrumentation amplifier has to be designed coupled with the sensor and how to decide this MRR on what basis in the next class. So thank you very much we have seen how variety of applications using op amp can be generated using a simple concept of current adding voltage adding voltage differencing okay and also seen how ICs can be generated starting from single ended single output structures to differential input differential output structure that is an important synthesis procedure okay select can conclude the conclusion path has already been dealt with right can I continue or is that time okay in conclusion we can say that we have a strategy for converting any single ended input single ended output IC to a corresponding differential input differential output IC and particularly for front ends we have seen how a transistor structure IC structure can be built starting from this concept of single ended input single ended output and putting a mirror image of that single ended input single ended output and lifting the common points correspondingly okay at the source ends by current sources okay at the drain end through resistors to voltage sources okay whether they are bipolar or MOS this strategy works. Now further we used basic concept of trans impedance and voltage amplifiers in summing and differencing and arriving at a general purpose op amp summer you extended this concept to an instrumentation amplifier again starting with single ended input and single ended output converting it to differential input differential output and improving the common mode rejection ratio of the difference amplifier.